2 Apr 2011 00:14
Re: ferrites article on PCD&F and other stories
Hi all, I have a question here: why could board resonance be the price of using ferrite beads? I agree that small isolated board would cause severe board resonances. However, the first modal resonance is always at several MHz. For board-level PDN design, we usually only care about the inductive curve up to 100 MHz. Chip with proper on-die decap and package will never see those board resonances. I think one advantage of using shared power plane for multiple chips is that all decaps on this power plane can be shared to low the impedance. However, the total loop inductance is consisted by two portions. One is the inductance caused by power vias connecting with decaps and the other portion is inductance due to IC power pin. Although by combing the power planes the inductance of decap via can be reduced, the mutual effects caused by mutual inductance of the IC power pins may worse the situations, even when the IC noise current of multiple chips is at the similar level. So I always use ferrite beads to isolate chips and control the PDN impedance for each chip. Although to use ferrite beads might not be the best solution to optimize decaps, it is always safe to prevent interferences. Regards, Siming Pan Cisco Systems On Fri, Apr 1, 2011 at 1:54 PM, Eric Bogatin <eric@...> wrote: > Hi folks- > > > I thought you might be interested in the piece I wrote for PCD&F magazine > based on Steve Weir's DesignCon talk on ferrites. Check it out here: >(Continue reading)
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