Vishwanath Elechithaya | 1 Jun 2010 12:22
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Re: Looking for an algorithm to clip waveforms

Hi Tim,
   That's the basic IDEA.I am clipping off all the initial delay with the
waveforms, i.e, where I see significant changes in the waveforms. This gives
me an excellent correlation of spice to IBIS with MAX corner. However, the
fall edges of the waveforms do not match  for the TYP & Min Corner (IBIS
waveforms were faster than the Spice). After a little more struggle, I added
little bit of delays on the fall waveforms of TYP & MIN, this gave me good
correlation of TYP & MIN waveforms too. Now the problem is that how to
arrive at the "initial delay" that NEEDS to be present on FALL waveforms so
as to match IBIS vs Spice!.
This is the approach I try to build.

1. Clip the waveforms (MIN, TYP & Max) to the maximum extent (till there is
significant change in the waveform).
2. Terminate the Waveform window to 1/freq (Ex: for a 1333MHz system, time
window of the VT table = 750ps).
3. Add "INITIAL DELAY" s to the typ & min Waveforms (but how much?) to match
the Spice waveforms.

There is a least preferred approach that to simulate the IBIS models &
extract the mismatch of the waveforms which can be used for calculating the
"INITIAL DELAY" that needs to be added. But would rather be an iterative
process.

Regards,
elechi
On Fri, May 28, 2010 at 10:04 PM, Timothy Coyle
<tim.coyle@...>wrote:

> Hi Elechi,
(Continue reading)

Lance Wang | 1 Jun 2010 16:03

IBIS Summit Fourth Call of Papers and Participations - DAC June15th, 2010, Anaheim CA


All:

This is the fourth announcement for the IBIS Summit Meeting scheduled along
with the Design Automation Conference in Anaheim, California on June 15,
2010.

We have several presentations lined up, but have room for more.  Please sign
up if you are coming.  Also, you can sign up for the free pass at DAC
exhibition on Monday if you are on site.

Lance Wang
IO Methodology Inc.
www.iometh.com

-----------------------------------------------------------------------
                          IBIS SUMMIT
                        FOURTH CALL FOR
                 PARTICIPATION & PRESENTATIONS
-----------------------------------------------------------------------
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

              I B I S   S U M M I T   M E E T I N G

Time/Date:  Tuesday June 15, 2010,  8:00 AM to 5:00 PM

Location:   Anaheim Marriott 
            777 Convention Way,
            Anaheim, California 92802
            Tel: 1-714-750-4321
(Continue reading)

Ben | 1 Jun 2010 16:08
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Sample couple RLGC parameters

Hi All;
I need samples of RLGC (even not freq. dependent) parameters for
lossy coupled transmission lines.

Any sample of 4 line and more can help.

Do you have idea where I can find some examples?

-- 
Regards;

Ben
______________________________________
ben01010(at)gmail(dot)com

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steve weir | 1 Jun 2010 16:18

Re: Sample couple RLGC parameters

Why not just generate some using some loss assumptions and the 
Telegrapher's Equations?

Steve
Ben wrote:
> Hi All;
> I need samples of RLGC (even not freq. dependent) parameters for
> lossy coupled transmission lines.
>
> Any sample of 4 line and more can help.
>
> Do you have idea where I can find some examples?
>
>
>
>   

--

-- 
Steve Weir
IPBLOX, LLC 
150 N. Center St. #211
Reno, NV  89501 
www.ipblox.com

(775) 299-4236 Business
(866) 675-4630 Toll-free
(707) 780-1951 Fax

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colin_warwick | 1 Jun 2010 16:59
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Gravatar

Free Agilent SI Seminars - München Germany June 21 - Böblingen Germany June 22 - Massy France June 23 - Winnersh UK June 24

Hi,

I'm presenting one of the papers in a series of free Agilent SI seminars in Europe, details below. Hope to see
you there, but if you can't get to one of the live events, an on-demand webcast version is posted here:
http://signal-integrity.tm.agilent.com/wp-content/uploads/2010/06/measure/measure.html 

It includes a refresher on Maxwell's equations and field solvers that I'm hoping will give you an 'A ha!'
moment or two. As always, I welcome your feedback.

Best regards,

-- Colin Warwick
Signal Integrity Design Flow Manager, Agilent EEsof EDA
Blog: http://signal-integrity.tm.agilent.com

 
List of registration pages by country
Long link
http://www.home.agilent.com/agilent/redirector.jspx?action=ref&cname=AGILENT_EVENT&ckey=1842597&cc=US&lc=eng&cmpid=29280
Shortened link
http://bit.ly/cdF5wV 
21 June München Germany
22 June Böblingen Germany
23 June Massy France
24 June Winnersh UK

Agenda (typical: check local listing)

0900-0915  Registration 
0915-0930  Welcome 
(Continue reading)

Albert Ruehli | 1 Jun 2010 17:55
Picon

Re: Sample couple RLGC parameters

Hi Ben
The 11th IEEE Topical Meeting on Electrical Performance of Electronic
Packaging (EPEP)  October 2002 has papers with good data for transmission
lines.  Some of the papers were designed to be used as test examples.

Regards, Albert Ruehli

On Tue, Jun 1, 2010 at 10:18 AM, steve weir <weirsi@...> wrote:

> Why not just generate some using some loss assumptions and the
> Telegrapher's Equations?
>
> Steve
> Ben wrote:
> > Hi All;
> > I need samples of RLGC (even not freq. dependent) parameters for
> > lossy coupled transmission lines.
> >
> > Any sample of 4 line and more can help.
> >
> > Do you have idea where I can find some examples?
> >
> >
> >
> >
>
>
> --
> Steve Weir
> IPBLOX, LLC
(Continue reading)

Augusto Einsfeldt | 1 Jun 2010 18:28
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Favicon

Assembly holes in PCB with GND pad


Hello all,
This maybe an OT but I guess some members here can clarify it easily.
I am used to use mettalized holes in PCBs to connect the GND to the assembly chassis (frame) of the machine and
it seems to work fine. In the other hand I have seen many PCBs for computer mother-boards and even telecom
with a non mettalized hole of, say, 3mm diameter and several through holes inside the pad ring.
Is it just to ease some manufacturing process, a quality improvement design or is it SI related?

Thanks for your time on this matter.

-Augusto

.

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steve weir | 1 Jun 2010 18:45

Re: Assembly holes in PCB with GND pad

The mounting screw can compress with substantial force which can then 
crack the PTH breaking connection on one or more internal layers.  So 
the idea is to make the PTH attachments outside the compressed region 
between the fasteners.

Steve.
Augusto Einsfeldt wrote:
> Hello all,
> This maybe an OT but I guess some members here can clarify it easily.
> I am used to use mettalized holes in PCBs to connect the GND to the assembly chassis (frame) of the machine
and it seems to work fine. In the other hand I have seen many PCBs for computer mother-boards and even
telecom with a non mettalized hole of, say, 3mm diameter and several through holes inside the pad ring.
> Is it just to ease some manufacturing process, a quality improvement design or is it SI related?
>
> Thanks for your time on this matter.
>
> -Augusto
>
> .
>
>
>  
>
> ------------------------------------------------------------------
> To unsubscribe from si-list:
> si-list-request@... with 'unsubscribe' in the Subject field
>
> or to administer your membership from a web page, go to:
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>
(Continue reading)

Augusto Einsfeldt | 1 Jun 2010 18:50
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Favicon

Re: Assembly holes in PCB with GND pad

 the idea is to make the PTH attachments outside the compressed
region 
 between the fasteners.
 Steve.
 Augusto Einsfeldt wrote:
 > Hello all,
 > This maybe an OT but I guess some members here can clarify it
easily.
 > I am used to use mettalized holes in PCBs to connect the GND to
the assembly chassis (frame) of the machine and it seems to work
fine. In the other hand I have seen many PCBs for computer
mother-boards and even telecom with a non mettalized hole of, say,
3mm diameter and several through holes inside the pad ring.
 > Is it just to ease some manufacturing process, a quality
improvement design or is it SI related?
 >
 > Thanks for your time on this matter.
 >
 > -Augusto
 >
 > .
 >
 >
 > 
 >
 > ------------------------------------------------------------------
 > To unsubscribe from si-list:
 > si-list-request@... [1] with 'unsubscribe' in the
Subject field
 >
(Continue reading)

Pavle Milosevic | 1 Jun 2010 20:44
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Favicon

Using impulse response data in ADS

Hello all,
I would like to know what is the preferred method of using the impulse
response data (either produced by ADS ImpulseWriter, or from some other
source) in Agilent ADS transient (Analog/RF Network, not DSP) simulations.

Is there something analogous to the S-parameter box, that can just be
inserted directly, or is there a more convoluted (or should I say convolved)
method? I know a while ago Agilent was mentioning an ImpulseReader component
to be implemented in the future, but it does not seem to be available in
ADS2009 Update1...

Thanks,

Pavle Milosevic
University of Illinois at Urbana-Champaign

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Gmane