Hirshtal Itzhak | 3 May 18:11 2010
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GB-Ethernet parallelism rules

Hello experts,

In the various application notes of various manufacturers detailing
routing guidelines for GB-Etherent pairs that I've seen lately, there is
a reference to these pairs as "analog".

As such, the required gap between them and digital signals is enormous -
300mil!

Such a distance entails less than 1 mV maximum crosstalk (at saturation
length) using a reasonable stack up.

No mention is made in these Ap. Notes for the length of the parallelism,
so it seems this gap is required for any lengths - even very small ones.
This seems to me un-reasonable.

Does somebody know what is the parallel length assumed for this required
gap?

Can I degrade this number if the parallelism length is shorter?

Or is there a reason for keeping this gap for all lengths?

Thanks

Itzhak Hirshtal

 The information contained in this communication is proprietary to Israel Aerospace Industries Ltd.,
ELTA Systems Ltd. 
and/or third parties, may contain classified or privileged information, and is intended only for 
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Ria R | 4 May 03:42 2010
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Reflection Vs Crosstalk Equalization

Gurus,
  Is it true that losses due to reflection are easier to equalize on a channel versus (pattern dependent
losses) due to crosstalk?
 If so why?
Thanks
Ria

      
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Re: Reflection Vs Crosstalk Equalization

Hi Ria,

When one considers crosstalk due to data pattern, there is inherent randomness involved. More work is
involved in figuring out which pattern(s) cause crosstalk over limits, whether those patterns are
infact valid per channel encoding rules etc..  And channel crosstalk could also happen between two
independent ICs..
So it becomes difficult to quantize loss when such patterns/conditions do indeed occur.
Whereas reflection losses on a channel can be established within limits during link training as part of
link negotiation.

So I believe any algorithm to compensate for channel losses would be easier to do than otherwise.

-LN

________________________________

From: si-list-bounce@... on behalf of Ria R
Sent: Mon 5/3/2010 6:42 PM
To: si-list@...
Subject: [SI-LIST] Reflection Vs Crosstalk Equalization

Gurus,
 Is it true that losses due to reflection are easier to equalize on a channel versus (pattern dependent
losses) due to crosstalk?
If so why?
Thanks
Ria

     
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(Continue reading)

qantrix | 4 May 14:08 2010
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CHGND connection in DVI connector

I have question about CHGND connection in DVI connector/cable.
There is two kind of shields - one - is shield for data/clock  pair;
second - whole cable shield.
http://en.wikipedia.org/wiki/Digital_Visual_Interface

We had some EMC consultation - was suggested to connect internal pairs
shield to chgnd.
on pcb make polygone chgnd that cover area up to end of dvi connector.
So diff.pairs will run under slot of gnd.separation.

Question is - how should be connected internal shields in DVI
conenctor - to sgnd or to chgnd?

diff. pairs running on the slot - seems like bad idea?
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steve weir | 4 May 14:20 2010

Re: CHGND connection in DVI connector

Is there a reason you want to isolate signal common from chassis?  
Common practice is to join the two near the chassis boundary.  If you 
attempt to isolate them, you will have lots of capacitive sneak paths.  
If they are joined you will not have a CM discontinuity issue.

Steve.

qantrix wrote:
> I have question about CHGND connection in DVI connector/cable.
> There is two kind of shields - one - is shield for data/clock  pair;
> second - whole cable shield.
> http://en.wikipedia.org/wiki/Digital_Visual_Interface
>
> We had some EMC consultation - was suggested to connect internal pairs
> shield to chgnd.
> on pcb make polygone chgnd that cover area up to end of dvi connector.
> So diff.pairs will run under slot of gnd.separation.
>
> Question is - how should be connected internal shields in DVI
> conenctor - to sgnd or to chgnd?
>
> diff. pairs running on the slot - seems like bad idea?
> ------------------------------------------------------------------
> To unsubscribe from si-list:
> si-list-request@... with 'unsubscribe' in the Subject field
>
> or to administer your membership from a web page, go to:
> http://www.freelists.org/webpage/si-list
>
> For help:
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qantrix | 4 May 15:15 2010
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Re: CHGND connection in DVI connector

Steve,

http://img504.imageshack.us/i/currentdesign.png/
you can find current design. data(diff.pairs) shield connected to sgnd.

suggested design see here
http://img266.imageshack.us/i/suggested.png/

As you can see ch_gnd will cover all area of dvi connector and pins of
data pairs shield connected to ch_gnd.
diff.pairs will pass under separation  between planes.

Idea make it like this seems like bad.

But it's possible to connect pairs shield to ch_gnd without creating
slot under pairs and cable will have only quite ch_gnd shield for each
pair and not dirty sgnd.  Question is - does this shield carrying
return currents ? How it will work from EMC point  ?

2010/5/4 steve weir <weirsi@...>:
> Is there a reason you want to isolate signal common from chassis?  Common
> practice is to join the two near the chassis boundary.  If you attempt to
> isolate them, you will have lots of capacitive sneak paths.  If they are
> joined you will not have a CM discontinuity issue.
>
> Steve.
>
> qantrix wrote:
>>
>> I have question about CHGND connection in DVI connector/cable.
(Continue reading)

steve weir | 4 May 15:34 2010

Re: CHGND connection in DVI connector

I disagree with the recommended design.

I would connect signal and chassis grounds through a peninsula at the 
chassis side of the DVI connector.  Depending on what else is going in 
and out of the box, bonding at other locations would also be 
appropriate.  At a minimum you need to do it at the DVI connector.  The 
basic premise is to reduce antenna efficiency and reduce energy pumped 
into the antenna.  Big loops make for efficient antennas.  Extending the 
chassis ground into the main PCB while still moating from signal ground 
is likely going to create coupling issues that will bite you, never mind 
the SI degradation you will get from crossing the moat.

Much has been written on this area of interest.  Doug Smith has a number 
of short articles and demonstrations showing how various grounding 
schemes work and fail. 

Steve.
qantrix wrote:
> Steve,
>
> http://img504.imageshack.us/i/currentdesign.png/
> you can find current design. data(diff.pairs) shield connected to sgnd.
>
> suggested design see here
> http://img266.imageshack.us/i/suggested.png/
>
> As you can see ch_gnd will cover all area of dvi connector and pins of
> data pairs shield connected to ch_gnd.
> diff.pairs will pass under separation  between planes.
>
(Continue reading)

Lance Wang | 4 May 16:32 2010

IBIS Summit Second Call of Papers - DAC June15th, 2010, Anaheim CA

All:

This is the second announcement for the IBIS Summit Meeting scheduled
along with the Design Automation Conference in Anaheim, California
on June 15, 2010.

Lance Wang
IO Methodology Inc.
www.iometh.com

-----------------------------------------------------------------------
                          IBIS SUMMIT
                        SECOND CALL FOR
                 PARTICIPATION & PRESENTATIONS
-----------------------------------------------------------------------
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

              I B I S   S U M M I T   M E E T I N G

Time/Date:  Tuesday June 15, 2010,  8:00 AM to 5:00 PM

Location:   Anaheim Marriott (Hotel Correction)
            777 Convention Way,
            Anaheim, California 92802
            Tel: 1-714-750-4321

Content:    Presentations and Discussions

Purpose:    Solicit and Exchange IBIS Model Related Information
            and Ideas.
(Continue reading)

qantrix | 4 May 17:01 2010
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Re: CHGND connection in DVI connector

Steve,

you mean direct connection or through caps/resistors?

2010/5/4 steve weir <weirsi@...>:
> Bill I recommend against the the second drawing.  Please see the attached.
>
> Best Regards,
>
>
> Steve.
> wjcsongr@... wrote:
>>
>> The second image shows the DVI signals crossing under the split in the
>> ground planes...why wouldn't I be concerned about that Steve?
>>
>> Regards,
>>
>> Bill
>>
>> William Csongradi
>> Senior Electrical Engineer
>> Rockwell Collins Heads Down Display Center
>> 319-295-7884
>>
>> Mailing Address
>> Rockwell Collins
>> 400 Collins Road NE
>> MS 105-167
>> Cedar Rapids, Iowa 52498-0001
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steve weir | 4 May 17:25 2010

Re: CHGND connection in DVI connector

My pet peeve:  People who repost private correspondence in public.  I 
marked up your drawing with instructions in the private mail.

Steve.
qantrix wrote:
> Steve,
>
> you mean direct connection or through caps/resistors?
>
>
>
> 2010/5/4 steve weir <weirsi@...>:
>   
>> Bill I recommend against the the second drawing.  Please see the attached.
>>
>> Best Regards,
>>
>>
>> Steve.
>> wjcsongr@... wrote:
>>     
>>> The second image shows the DVI signals crossing under the split in the
>>> ground planes...why wouldn't I be concerned about that Steve?
>>>
>>> Regards,
>>>
>>> Bill
>>>
>>> William Csongradi
>>> Senior Electrical Engineer
(Continue reading)


Gmane