headers
Girish Chandra Mohanty | 1 Jul 2007 09:46
Picon

Signal and Power Integrity jobs in Singapore

Gurus:
Sorry it was I who had sent the appended email. By mistake I sent it from
someone else's ID on my computer, because that friend had his emails open on
my computer.

I apologize.

Regards,
Girish C Mohanty

---------- Forwarded message ----------
From: Avtaar Singh <avtaarenator@...>
Date: Jul 1, 2007 3:43 PM
Subject: Fwd: Signal and Power Integrity jobs in Singapore
To: girish.mohanty@...

---------- Forwarded message ----------
From: Avtaar Singh <avtaarenator@...>
Date: Jul 1, 2007 3:36 PM
Subject: Signal and Power Integrity jobs in Singapore
To: si-list@...

Gurus:

Does anyone know of SI / PI openings in Singapore, or people who may be
interested in hiring people with such skillset? Once of my friends has been
laid off, and is actively searching for such a position in Singapore.

Kindly revert so I can forward information to him. Thanks a ton in advance!
(Continue reading)

Permalink | Reply | 0 comments |
headers
Avtaar Singh | 1 Jul 2007 09:36
Picon

Signal and Power Integrity jobs in Singapore

Gurus:
Does anyone know of SI / PI openings in Singapore, or people who may be
interested in hiring people with such skillset? Once of my friends has been
laid off, and is actively searching for such a position in Singapore.

Kindly revert so I can forward information to him. Thanks a ton in advance!

Regards,
Girish C Mohanty

------------------------------------------------------------------
To unsubscribe from si-list:
si-list-request@... with 'unsubscribe' in the Subject field

or to administer your membership from a web page, go to:
http://www.freelists.org/webpage/si-list

For help:
si-list-request@... with 'help' in the Subject field

List technical documents are available at:
                http://www.si-list.net

List archives are viewable at:     
		http://www.freelists.org/archives/si-list
or at our remote archives:
		http://groups.yahoo.com/group/si-list/messages
Old (prior to June 6, 2001) list archives are viewable at:
 		http://www.qsl.net/wb6tpu
(Continue reading)

Permalink | Reply | 0 comments |
headers
jun feng | 2 Jul 2007 10:27
Picon

Re: digital circuits radiated emission as a function of VDD

Hello Andy,
    I do mean the first situation.
    In my measurements, the core circuit size, the input data and the clock
frequency are fixed, the only parameter I play is VDD. If I plot PSD of
power supply current
    in dBuV (X axis is frequency, in log scale), then the relationship is
perfectly linear.  Is that right, reasonable ? are there any theory on this
?

regards,

Junfeng

On 6/29/07, Andrew Ingraham <a.ingraham@...> wrote:
>
> >    Generally speaking , what is the relationship between the digital
> > circuits radiated emission( peak emission or maybe RMS ?)  and the
> supply
> > voltage ? I could not find an exact answer for this. Maybe you guys here
> > can
> > educate me ! Thanks,
>
> This is a pretty open question.  Perhaps you could clarify.
>
> Do you mean, given a fixed circuit, how do radiated emissions vary as we
> vary the supply voltage?  (Generally speaking, higher Vdd means higher
> currents, and tends to cause faster switching times, both of which will
> lead
> to greater emissions.)
>
(Continue reading)

Permalink | Reply | 2 comments |
headers
David Herrmann | 3 Jul 2007 00:25

Signal Integrity Hardware Manager, $100-130K, North Dallas

Signal Integrity Hardware Manager, $100-130K target, North Dallas -
relocation available
Bring your leadership strengths to this global manufacturing firm capturing
market dominance in its telecommunications-related arena.  You will manage a
group of electrical engineers and techs charged with the design and testing
of high-speed communication signal integrity within a research and
development environment.  Use your people skills to foster teamwork, build
synergy and expand knowledge within the organization.  You will manage
assignments, using resources wisely to reach electrical design and testing
goals on time and under budget.  Identify and execute continuous improvement
plans and foster innovative solutions to meet new performance requirements.
Use your financial planning skills to manage expenses for the group.  In
addition to the generous salary, the company offers an attractive array of
benefits.  For immediate consideration, send MS Word resume to
resume@... or contact the recruiter directly via
http://www.alynpatrick.com/contact.html

Requirements:  

******** BSEE required, MSEE preferred

******** 5+ years track record managing EEs and Technicians in a
manufacturing environment

******** Budget management experience

******** Team-building expertise with diverse groups of creative engineers

******** 10+ years experience in DSP,  electronic signal transmission,
signal integrity, electronic interconnects, or closely-related areas
(Continue reading)

Permalink | Reply | 0 comments |
headers
David Herrmann | 3 Jul 2007 00:25

Signal Integrity Hardware Engineer, $90-110K, North Dallas suburbs

Signal Integrity Hardware Engineer, $90-110K, North Dallas suburbs
Move your engineering career into the future while designing high
performance telecommunication outlets, panels and plus for modern LAN
cable systems.  Take charge of validation testing, manufacturing quality
testing and documentation revisions.  Coordinate with manufacturing and
suppliers to improve quality.  Use your analytical skills and knowledge
to evaluate the reliability of materials, properties and processes used
in production of multi-layer circuit boards and mechanical lead frames. 
You will enjoy this collaborative environment where cross-functional
groups communicate and work together to produce the best products.  In
addition to a generous salary, the benefits are excellent!  For
immediate consideration, send MS Word resume to resume@...
or contact the recruiter via www.alynpatrick.com/contact.html

Requirements:  
.       A Masters Degree in Electrical Engineering
.       At least 5 years experience in digital signal processing,
electronic signal transmission, signal integrity, and/or electronic
Interconnects
.       Proficient in use of full wave solvers for electro-magnetic
field simulation
.       Proficient in circuit simulation software for modeling
components 
.       Knowledge of high speed signal transmission testing using
network analyzers
.       A good team player, self reliant, energetic, highly motivated
with excellent analytical and communication skills

To apply, please send resume to david@...
(Continue reading)

Permalink | Reply | 0 comments |
headers
Terry Fox | 3 Jul 2007 00:17

Re: DC-blocking transmission-line

Aubrey, Ron,

I always appreciate learning something through the experience of others 
rather than having to get it the hard way.

I suspect there is a certain amount of conflict in our terminology.

I placed a short explanation about what I was talking about on 
http://www.siemc.com/SI_List.htm

The link has a schematic and two simulation examples.  One example is very 
close trace to trace spacing, the other has very wide trace to trace 
spacing.  In both cases the traces are 20 inches long using a PCI Express 
driver.

The difference between the two is about 10% in eye opening.

I am happy to do more simulations to illustrate your points, I just want a 
common picture from which we can all work.

TFox

  At 12:22 PM 6/28/2007, Aubrey_Sparkman@... wrote:

>I don't believe in public stoning....
>
>What you have said is pretty much true for the special case where the
>two 50 Ohm traces are far enough appart to have negligible coupling.
>Take a look at cases where there is significant coupling.  For instance,
>make a 100 Ohm diff pair from two 60 Ohm traces.  Let me know...
(Continue reading)

Permalink | Reply | 1 comment |
headers
Grasso, Charles | 3 Jul 2007 00:43
Favicon

Re: DC-blocking transmission-line

Terry - A quick check shows that your results were derived using a
microstrip cross section with no mask coating. Is that correct?=20

Best Regards
Charles Grasso
Compliance Engineer
Echostar Communications Corp.
Tel: 303-706-5467
Fax: 303-799-6222
Cell: 303-204-2974
Pager/Short Message: 3032042974@...
Email: charles.grasso@...

-----Original Message-----
From: si-list-bounce@... [mailto:si-list-bounce@...]
On Behalf Of Terry Fox
Sent: Monday, July 02, 2007 4:17 PM
To: si-list@...
Subject: [SI-LIST] Re: DC-blocking transmission-line

Aubrey, Ron,

I always appreciate learning something through the experience of others=20
rather than having to get it the hard way.

I suspect there is a certain amount of conflict in our terminology.

I placed a short explanation about what I was talking about on=20
http://www.siemc.com/SI_List.htm
(Continue reading)

Permalink | Reply | 0 comments |
headers
Curt McNamara | 3 Jul 2007 00:56
Favicon

Re: digital circuits radiated emission as a function of VDD

EMC engineers (who actually live on another list) sometimes use the
following "rules of thumb" for emissions situations:

Broadband noise (i.e. wide spectrum) often comes from common mode
voltages with a (physically) large return path (i.e. undefined or
unintentional). Since the return path is a function of parasitic
elements it is likely not in your model. Given that common mode currents
are small, there has been discussion that logic families with lower
voltage swings would produce less emissions. There are likely papers
about this in past IEEE EMC Society Conference Proceedings.

Narrowband noise (i.e. an emission peak limited in bandwidth) often
comes from current flowing in a loop. An example would be a clock trace,
perhaps poorly terminated. Since load current tends to be small (uA?),
it may not have a strong relation to voltage swing. It is possible a
model based on emissions from loop current would not show increased
emissions from a higher voltage swing, since the change in trace current
is small. It does turn out correctly terminating the clock (which may
mean increasing the current in the trace) tends to decrease emissions.=20

Also please note I am talking about the swing from Voh to Vol (i.e.
signaling levels).

								Curt

Curt McNamara // senior electrical engineer=20
Logic Product Development
411 Washington Ave. N. Suite 400
Minneapolis, MN 55401
T // 612.436.5178
(Continue reading)

Permalink | Reply | 0 comments |
headers
Terry Fox | 3 Jul 2007 01:09

Re: DC-blocking transmission-line

Charles,

The simulation was made with both differential signal traces on the top 
layer of the PCB.

There was 0.5 oz solder mask (Er of 3.3) on top of a
0.5 oz copper trace that was 5 mills wide.
3 mills of dielectric Er 4.3 loss tangent 0.02
1 oz solid plane.

The two pictures showed a trace to trace separation of  1 mills ... ie 1X 
trace to plane distance and 30 mills ... ie 10X trace to plane distance.

In both cases the traces were 5 mills wide and 3 mills above the ground plane.

TFox

  At 03:43 PM 7/2/2007, Grasso, Charles wrote:

>Terry - A quick check shows that your results were derived using a
>microstrip cross section with no mask coating. Is that correct?
>
>Best Regards
>Charles Grasso
>Compliance Engineer
>Echostar Communications Corp.
>Tel: 303-706-5467
>Fax: 303-799-6222
>Cell: 303-204-2974
>Pager/Short Message: 3032042974@...
(Continue reading)

Permalink | Reply | 0 comments |
headers
olaney | 3 Jul 2007 01:18
Picon
Favicon

Re: DC-blocking transmission-line

Um, "mil" as in one thousandth of an inch, has only one L.  The other is
a type of factory. 
Small point but it hurts my eyes...

On Mon, 02 Jul 2007 16:09:25 -0700 Terry Fox <tfox@...> writes:
> Charles,
> 
> The simulation was made with both differential signal traces on the 
> top 
> layer of the PCB.
> 
> There was 0.5 oz solder mask (Er of 3.3) on top of a
> 0.5 oz copper trace that was 5 mills wide.
> 3 mills of dielectric Er 4.3 loss tangent 0.02
> 1 oz solid plane.
> 
> The two pictures showed a trace to trace separation of  1 mills ... 
> ie 1X 
> trace to plane distance and 30 mills ... ie 10X trace to plane 
> distance.
> 
> In both cases the traces were 5 mills wide and 3 mills above the 
> ground plane.
> 
> 
> TFox
> 
>   At 03:43 PM 7/2/2007, Grasso, Charles wrote:
> 
> >Terry - A quick check shows that your results were derived using a
(Continue reading)

Permalink | Reply | 5 comments |

Gmane