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Yu Chen | 3 Aug 2010 04:16
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lithography fin etch to define silicon NW

Dear all,

I am using lithogrphy and etching process to define silicon NW.
the cross section is close to a square (70nm*70nm).
I am wondering whether there is any way to smooth the edge of NW to make the
cross section like a circle or semicicle, which means I want to make a round
instead of a sharp edge at least on the top surface.

any comments are welcome.

sincerely

Yu CHEN
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Jie Zou | 3 Aug 2010 15:56
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Lift-off Oxide on Silicon with PMMA mask?

Hi pals,

anyone have experience with lifting-off Oxide on Silicon with PMMA
mask? PMMA will be ~350nm. It is patterned by e-beam lithography. I
am planned to e-beam evaporate ~100nm oxide on the silicon. Anything I
need to pay attention to? Like the adhesion?

Thanks.

Jie
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Yingnan Wang | 3 Aug 2010 16:02
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Re: lithography fin etch to define silicon NW

Hi Chen,

I think you can round the corners by annealing the silicon NW in hydrogen.

BR,

YN WANG

> Date: Tue, 3 Aug 2010 10:16:20 +0800
> From: cyyfq0808 <at> gmail.com
> To: mems-talk <at> memsnet.org
> Subject: [mems-talk] lithography fin etch to define silicon NW
> 
> Dear all,
> 
> I am using lithogrphy and etching process to define silicon NW.
> the cross section is close to a square (70nm*70nm).
> I am wondering whether there is any way to smooth the edge of NW to make the
> cross section like a circle or semicicle, which means I want to make a round
> instead of a sharp edge at least on the top surface.
> 
> any comments are welcome.
> 
> sincerely
> 
> Yu CHEN
_______________________________________________
Hosted by the MEMS and Nanotechnology Exchange, the country's leading
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DEBASHIS MAJI | 3 Aug 2010 16:12
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High Resolution Printer for Soft Lithography

Dear all,

I shall be highly obliged if anybody can kindly provide me with the details
of a high resolution Laser printer (around say 2400 or 3600 dpi) / or any
such equivalent product for making masks for soft lithography easily and
quickly at a cheaper cost. I have heard that high resolution printers are
sufficient enough for soft lithography applications by printing over
transparency sheets and using them as masks. Kindly provide me with the
details of any such product/ model no.. ( and if any other specification
required ) ... of any company. Thanks in advance for your help.

Debashis Maji
SMST, IIT Kharagpur, India.
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Yingnan Wang | 3 Aug 2010 16:18
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DRIE with AZP4620 as mask


Dear all,

I'm using Oxford Plasma 100 to etch through silicon wafer. The masking material used in DRIE is hard baked AZP4620.

I did checked the PR mask after hard bake with microscope, which shows smooth profile. But when I use it to get
the wafter etched through, the sidewalls show light striation from top to the bottom.

I know over-passivation will lead to striation on the sidewalls, but I'm sure my case is not.
Over-passivation induced striation will not occure from the beginning.

Somebody says that sidewall stiation formation depends on:

1. Masking material

2. Etch chemistry

3. Power regime

I'm not sure what is wrong with my etch.

Can anyone help me out from the bad situation?

Thanks a lot!

BR,

YN WANG
 		 	   		  
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Marcel Spurny | 3 Aug 2010 16:19
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DRIE with SF6 and CHF3

Hello everyone,

is it possible to do deep reactive ion etching in a standart RIE with 
SF6 and CHF3? If so, can anyone give me a hint for the process to use?

Cheers,
Marcel
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D.Grimm | 3 Aug 2010 17:57
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Re: DRIE with SF6 and CHF3

Hi Marcel,

Which substrate you are thinking of? It is no problem to etch Silicon with
both gases. For deep trenches you'll need to optimise the conditions. For
very deep trenches, the Bosch process (specialized RIEs only) might be a
better hint.

Best
Daniel

* Dr. Daniel Grimm
* IFW Dresden
*            - Institute for Integrative Nanosciences -
* E-Mail:  d.grimm <at> ifw-dresden.de
* Phone: +49 351 4659-314
* Mobile: +49 177 4926561

-----Original Message-----
From: mems-talk-bounces+d.grimm=ifw-dresden.de <at> memsnet.org
[mailto:mems-talk-bounces+d.grimm=ifw-dresden.de <at> memsnet.org] On Behalf Of
Marcel Spurny
Sent: Dienstag, 3. August 2010 16:20
To: General MEMS discussion
Subject: [mems-talk] DRIE with SF6 and CHF3

Hello everyone,

is it possible to do deep reactive ion etching in a standart RIE with 
SF6 and CHF3? If so, can anyone give me a hint for the process to use?
(Continue reading)

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Bill Moffat | 3 Aug 2010 18:31

Re: lithography fin etch to define silicon NW

If you are using a normal exposure to define a square the corners get
exposed from both sides and the corners start to disappear.  Controlled
over exposure can create a circle or close to it.  Bill Moffat.   

-----Original Message-----
From: mems-talk-bounces+bmoffat=yieldengineering.com <at> memsnet.org
[mailto:mems-talk-bounces+bmoffat=yieldengineering.com <at> memsnet.org] On
Behalf Of Yingnan Wang
Sent: Tuesday, August 03, 2010 7:03 AM
To: mems-talk <at> memsnet.org
Subject: Re: [mems-talk] lithography fin etch to define silicon NW

Hi Chen,

I think you can round the corners by annealing the silicon NW in
hydrogen.

BR,

YN WANG
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provider of MEMS and Nanotechnology design and fabrication services.
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Marcel Spurny | 3 Aug 2010 20:44
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Re: DRIE with SF6 and CHF3

Hi Daniel,

I am thinking about etching silicon. I know that the Bosch process does 
the trick. But I am limited to a standard (selfmade) RIE and only to 
both gases. I've tried to "pulse" SF6 and CHF3, i.e. say 7s SF6 and then 
2s CHF3 with a silica hardmask. As CHF3 etches the silica very slowly I 
thought that might work but I didn't get significant results. I want to 
etch a couple of hunderts of microns.

Cheers,
Marcel

D.Grimm <at> ifw-dresden.de schrieb:
> Hi Marcel,
>
> Which substrate you are thinking of? It is no problem to etch Silicon with
> both gases. For deep trenches you'll need to optimise the conditions. For
> very deep trenches, the Bosch process (specialized RIEs only) might be a
> better hint.
>
> Best
> Daniel
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mikas remeika | 4 Aug 2010 00:04
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Surface states between GaAs and SiO2

Hello, everyone,

I am working with a device that involves a layer of SiO2 sputtered on
top of epitaxially grown GaAs. It appears that there is a large number
of surface states that form at the interface (GaAs-SiO2) that
effectively screen any electric fields that are applied perpendicular
to the surface.

Could anyone point me to some literature on eliminating these surface
states? Also, is there another insulating NIR-transparent material
that would not form such surface states at the interface with GaAs?

To give a bit mode detail, I'm trying to fabricate a capacitor-like
device where the half the dielectric is SiO2 and half is GaAs. It is
very important for the potential to drop linearly in the device so
that the field inside a material would only depend on the dielectric
constant of the material.  What I am getting right now is that all
field is screened by the interface between SiO2 and GaAs.

thank you,
-mikas
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Gmane