Havard Eidnes | 9 Jul 2009 10:36
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Package binaries for NetBSD/macppc 5.0 / pkgsrc-2009Q2

Hi,

I've uploaded the results of a bulk build of what would become
pkgsrc-2009Q2 done on NetBSD/macppc 5.0 to

   ftp://ftp.NetBSD.org/pub/pkgsrc/packages/NetBSD/powerpc/5.0_2009Q2/

A total of 5.5GB of packages were uploaded for a total of 6298
packages.

This list is however incomplete, because one particular package
managed to install /usr/pkg/include as a file, and nothing
cleaned up after it, so lots of subsequent packages failed to
install, among them the png and jpeg libraries.  I've since fixed
the offending package, and have installed a workaround in the
bulk build script to prevent this particular problem from having
such consequences in the future.

The source tree this was built from was updated Jun 30, 2009, so
it pre-dates the actual branching of 2009Q2 by a few days.  I'll
be continuing to re-build for the 2009Q2 branch for now; the next
round is already 44% done (by number of packages) by now (but is
based on the same update date, but with the fix above in place).

The build was done on a machine running 5.0.  For the packages
which are not architecture-specific (should be the vast
majority), these packages should also be usable on other powerpc
ports.

Regards,
(Continue reading)

Robert Swindells | 18 Jul 2009 19:42
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Re: MPC5200 support


I have put another snapshot of my MPC5200 code onto ftp.netbsd.org.

Path is ftp.netbsd.org:/pub/NetBSD/misc/rjs/efika-20090718.tar.gz

It still doesn't have any Bestcomm support so can't use the built in
ethernet controller but I'm running it multi-user using a rtk(4) PCI
ethernet card.

Robert Swindells

KIYOHARA Takashi | 19 Jul 2009 09:54
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OpenPIC and sandpoint

Hi! all,

I have a question.
The OpenPIC always set OPENPIC_POLARITY_POSITIVE, if the variable irq == 0
in arch/powerpc/pic/pic_openpic.c::opic_establish_irq().

        x = irq;
        x |= OPENPIC_IMASK;
        x |= (irq == 0) ?
            OPENPIC_POLARITY_POSITIVE : OPENPIC_POLARITY_NEGATIVE;
        x |= (type == IST_EDGE) ? OPENPIC_SENSE_EDGE : OPENPIC_SENSE_LEVEL;
        :
        openpic_write(OPENPIC_SRC_VECTOR(irq), x);

However the variable irq is not hw-irq.  This reason is defined in
arch/powerpc/include/openpicreg.h.

  /* interrupt vector/priority reg */
  #ifndef OPENPIC_SRC_VECTOR
  #define OPENPIC_SRC_VECTOR(irq)         (0x10000 + (irq) * 0x20)
  #endif

And sandpoint defines in arch/sandpoint/include/openpicreg.h.

  #define OPENPIC_SRC_VECTOR(irq)         (epicsteer[(irq)])

And in machdep.c.

  unsigned epicsteer[] = {
          0x10200,        /* external irq 0 direct/serial */
(Continue reading)

Frank Wille | 19 Jul 2009 23:20
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Re: MPC5200 support

On Sat, 18 Jul 2009 18:42:50 +0100 (BST)
Robert Swindells <rjs <at> fdy2.demon.co.uk> wrote:

> I have put another snapshot of my MPC5200 code onto ftp.netbsd.org.
> 
> Path is ftp.netbsd.org:/pub/NetBSD/misc/rjs/efika-20090718.tar.gz

I compiled your latest patches and the kernel boots:

Loaded initial symtab at 0x3af750, strtab at 0x3d7ec4, # entries 10262
Copyright (c) 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005,
    2006, 2007, 2008, 2009
    The NetBSD Foundation, Inc.  All rights reserved.
Copyright (c) 1982, 1986, 1989, 1991, 1993
    The Regents of the University of California.  All rights reserved.

NetBSD 5.99.11 (EFIKA) #6: Sun Jul 19 22:41:13 CEST 2009
	frank <at> cygnus.wendik.de:/home/frank/netbsd_test/src/sys/arch/ofppc/compile/obj/EFIKA
Model: EFIKA5K2
total memory = 128 MB
avail memory = 99 MB
bootpath: 
mainbus0 (root)
rtas0 at mainbus0: version 1, entry  <at> pa 0x1cc5000
cpu0 at mainbus0: G2 (Revision 1.4), ID 0 (primary)
cpu0: HID0 0x90c000<DOZE,DPM,ICE,DCE>, powersave: 1
cpu0: L1 I-cache 16 KB 32B/line, D-cache 16 KB 32B/line
ofwpci0 at mainbus0
Found MPC5200 PIC at f0000500
pci_configure_bus() failed
(Continue reading)

Robert Swindells | 20 Jul 2009 00:25
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Re: MPC5200 support


Frank Wille wrote:
>On Sat, 18 Jul 2009 18:42:50 +0100 (BST)
>Robert Swindells <rjs <at> fdy2.demon.co.uk> wrote:

>> I have put another snapshot of my MPC5200 code onto ftp.netbsd.org.
>> 
>> Path is ftp.netbsd.org:/pub/NetBSD/misc/rjs/efika-20090718.tar.gz
>
>I compiled your latest patches and the kernel boots:

[snip]

>When booting with USB keyboard connected, then it is detected by the
>kernel but doesn't work. Do you know why?

My EFIKA config is missing several USB devices, I'm guessing you added
ukbd etc.

I don't have a USB keyboard so haven't tried using this. Maybe some
changes are needed to cninit_kd() in ofw_consinit.c for the Efika
device tree.

>> It still doesn't have any Bestcomm support so can't use the built in
>> ethernet controller but I'm running it multi-user using a rtk(4) PCI
>> ethernet card.

>That's great! I have to look for a network card to try it.

I guess a USB ethernet adaptor would be the other short-term solution,
(Continue reading)

Toru Nishimura | 25 Jul 2009 05:10

Re: OpenPIC and sandpoint

Kiyohara asked about OpenPIC code;

> The OpenPIC always set OPENPIC_POLARITY_POSITIVE, if the variable irq == 0
> in arch/powerpc/pic/pic_openpic.c::opic_establish_irq().
>
>        x = irq;
>        x |= OPENPIC_IMASK;
>        x |= (irq == 0) ?
>            OPENPIC_POLARITY_POSITIVE : OPENPIC_POLARITY_NEGATIVE;
>        x |= (type == IST_EDGE) ? OPENPIC_SENSE_EDGE : OPENPIC_SENSE_LEVEL;
>        :
>        openpic_write(OPENPIC_SRC_VECTOR(irq), x);

It's a historical implication about "OpenPIC standard" and its implementation variations.

(disclaimer; my knowledge is limited around Moto/Freescale MPC interrupt controller
and I have no clue about IBM / Apple implementations)

IRQ0 odd case is derived from the fact the IRQ input line used to be specifically wired
for i8259 ISA style interrupt controller.  Moto's "extened OpenPIC standard" interrupt
controllers allow a mode selection among "i8259 wiring (stands for original OpenPIC
specification)" and "straight wiring" mode.  Documentations, somehow confusingly,
call them "pass through mode" and "mixed mode".  One particular bit in Gobal
Configuration Register, GCR[M] bit, specifies the difference to tell how the target HW
is wired.

Many NAS boxes like Kurobox or others have no PCI+ISA south-bridge inside and is
free from nasty i8259 handling.  GCR[M] bit is programmed 1, "mixed mode," to reflect
this design, and it means positive for IRQ0 makes no sense.

(Continue reading)

KIYOHARA Takashi | 29 Jul 2009 15:32
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evbppc's tests/modules

Hi! all,

As for our evbppc, './build.sh release' has not been made any longer for
a long time.  The cause is tests/modules.

http://releng.netbsd.org/builds/HEAD/200907280000Z/evbppc.build.failed

======  1 missing files in DESTDIR  ========
Files in flist but missing from DESTDIR.
File wasn't installed ?
------------------------------------------
./usr/tests/modules/Atffile
========  end of 1 missing files  ==========

I think that './build.sh release' can do by this fix.

thanks,
--
kiyohara

Index: tests/Makefile
===================================================================
RCS file: /cvsroot/src/tests/Makefile,v
retrieving revision 1.15
diff -u -r1.15 Makefile
--- tests/Makefile	2 May 2009 16:02:18 -0000	1.15
+++ tests/Makefile	22 Jul 2009 07:42:38 -0000
 <at>  <at>  -4,9 +4,7  <at>  <at> 
(Continue reading)


Gmane