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Toru Nishimura | 4 Feb 2010 11:28

NetBSD for LIP6 TSAR?

Manuel Bouyer said;

>> Wow.  What chip is this?
>
> this one:
> https://www-soc.lip6.fr/trac/tsar/
>
> well, this chip doesn't really exist yet, but we a systemC model :)
> We hope to have a working FPGA implementation by the end of the year.

Um, it's very first time NetBSD developer mentions to LIP6 TSAR project, as
long as I know.  I've been wondering whether NetBSD would be ported to
TSAR.  So, the world can expect it will happen in future, right?

BTW, MIPS Technology bought the technical asset of SiCortex and
the company is considering the way how to foster the valuable technology.

Toru Nishimura / ALKYL Technology
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Manuel Bouyer | 4 Feb 2010 19:45

Re: NetBSD for LIP6 TSAR?

On Thu, Feb 04, 2010 at 07:28:47PM +0900, Toru Nishimura wrote:
> Manuel Bouyer said;
> 
> >>Wow.  What chip is this?
> >
> >this one:
> >https://www-soc.lip6.fr/trac/tsar/
> >
> >well, this chip doesn't really exist yet, but we a systemC model :)
> >We hope to have a working FPGA implementation by the end of the year.
> 
> Um, it's very first time NetBSD developer mentions to LIP6 TSAR project, as
> long as I know.  I've been wondering whether NetBSD would be ported to
> TSAR.  So, the world can expect it will happen in future, right?

Yes, in fact I have it booting single user already, using a
CABA/SystemC model. My plan it to have the NetBSD/TSAR port in
the NetBSD CVS some day, but I'm waiting for a debugged and useable
hardware platform first (and also for the mips64 branch to be merged in
HEAD - even though TSAR is 32bits, there is work being done on SMP is valuable
for us :). The simulator runs at about 250Khz on a decent
x86 system, it's too slow to attempt anything other than single-user.
Work is underway to have a much faster simulator, as well as a FPGA
implementation. One of the targets is Altera's DE-2 board which is
not too expensive, so I hope NetBSD/TSAR can find some use outside of
our lab ...

--

-- 
Manuel Bouyer <bouyer <at> antioche.eu.org>
     NetBSD: 26 ans d'experience feront toujours la difference
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Toru Nishimura | 5 Feb 2010 00:13

Re: NetBSD for LIP6 TSAR?

Manuel Bouyer said;

>  ... I'm waiting for a debugged and useable
> hardware platform first (and also for the mips64 branch to be merged in
> HEAD - even though TSAR is 32bits, there is work being done on SMP is valuable
> for us :). 

VIPT cache safe UVM would be equally break though for MIPS processors.

Toru Nishimura / ALKYL Technology
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pinewood | 25 Feb 2010 14:26
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Anyone have interest in NetBSD for loongson

     Now an OpenBSD/loongson[1] port is almost finished,OpenBSD
     currently supports loongson based Gdium notebook,Yeeloong notebook
 and Fuloong 2F mini-PC. 
     Actually,NetBSD supports loongson based computer too,but only Gdium
 notebook is supported(in evbmips/gdium). 
     Is anyone have interest in backporting openbsd/loongson to netbsd?

 
     In china,most of loongson computer users' machine is Yeeloong
 notebook and Fuloong 2F mini-PC (currently about 16 ten thousand in
 primary school for computer education,government's 15 million
 procurement planning has been ratified by state department(china) ).
      About loongson,loongson is a series of processors designed by
 ICT[2],manufactured by ST Microelectronics. Currently exits
 Loongson-2E,Loongson-2F [3]and Loongson-3 A(Quad-Core MIPS64)[4][5][6].
 loongson-3 B(8-core MIPS64) may be taped this year. A feature of
 loongson-3 is
 Hardware support for x86 to MIPS binary translation[7][8].
      China's next supercomputer will be constructed with loongson-3[9].
[1] http://openbsd.org/loongson.html
[2] http://english.ict.cas.cn/
[3]http://www.st.com/stonline/products/families/computer/microprocessors/loongson.htm
[4] http://english.ict.cas.cn/rh/rps/200909/t20090910_36875.html
[5] http://www.hotchips.org/hc20/files/hc20_program.pdf
[6] Micro-architecture of Godson-3 Multi-Core Processor:
    http://www.hotchips.org/archives/hc20/3_Tues/HC20.26.621.pdf
[7] GODSON-3: A SCALABLE MULTICORE RISC PROCESSOR WITH X86
EMULATION:
    http://ams.ict.ac.cn/onchipmem/papers/ICT-Godson-3%20--%20A%20Scalable%20Multicore%20RISC%20Processor%20with%20x86%20Emulation.pdf
[8] Efficient Binary Translation System with Low Hardware Cost
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