Hiroyuki Bessho | 1 Oct 2002 06:52
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atomic.h (Re: A change to <arm/cpu.h>)

Hi,

  I prepared a patch to make atomic_{set,clear}_bit inline at
ftp://iwashi.grotto.jp/pub/netbsd/atomic.patch.

  Does it look ok?

--
bsh.

Thomas Asami | 4 Oct 2002 14:37
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Can the Intrisync's CerfCube(strongarm) running on NetBSD?

Hi,

Does anyone know that the CerfCube can running on NetBSD?

Thanks,
Thomas.

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Chris Gilbert | 7 Oct 2002 01:07
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Re: shared X binaries etc

On Fri, 20 Sep 2002 00:47:37 +0100
"Chris Gilbert" <chris <at> dokein.co.uk> wrote:

> Hi,
> 
> I was wondering about the possibility of switching the shared X binaries
> (the libs and client stuff) over to being XF 4 based.
> 
> cats has moved over to XF4, I'm hoping that shark will be following suit
> soon, either cos I'll add something to fetch from the kernel and cats and
> shark can then share binaries, or someone will just do a hacky cludge and
> change some values for the shark ;)

Actually (as has been pointed out to me) it's not just a matter of plugging in the right bits for shark. I
didn't actually realise (not having, and not really having looked at the shark code) but it's not pci
based, so it really won't just work for shark.  It really needs someone with a shark to take up the gauntlet of
porting from 3.3.6 to 4.x.

However it maybe worth checking if we can build 3.3.6 X server with 4.x libs.

What we really need some kind of generic solution for X (as has been suggested and I think other have in the
past/are working on)

Chris

Chris Gilbert | 9 Oct 2002 10:44
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plan to merge cats and netwinder isa_machdep.c

Hi,

I'm thinking of merging the cats and netwinder isa_machdep.c files into one, and placing it under arm/footbridge/isa/

The reason for this being the simple one of both files are near identical, they hook the isa bus to a different
interrupt being the only biggest difference, The isa interrupt line can be be put into
include/isa_machdep.h for each platform.  And I hate having to maintain 2 copies of the same thing.

The other motive for this is that I've reworked most of the footbridge handling, include the isa side for
cats, and of course it'll break on netwinder without me pulling all the changes in.

Actually I'm puzzled that isa_machdep.c is seperate all the other isa files are shared in footbridge/isa...

Is there any major reason for not doing this?

Chris

Izumi Tsutsui | 9 Oct 2002 18:04
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Re: plan to merge cats and netwinder isa_machdep.c

In article <20021009094454.6a43a427.chris <at> dokein.co.uk>
chris <at> dokein.co.uk wrote:

> I'm thinking of merging the cats and netwinder isa_machdep.c files into one, and placing it under arm/footbridge/isa/

A bit off topic, but does ISA DMA work on these ports?
Last time I tried AHA-1542 and PCnet-ISA on cats,
both of them didn't work at all.

Current _isa_bus_dmamap_load() in footbridge/isa/isadma_machdep.c
returns physical address for ds_addr, but is it really OK for 24bit
ISA bus? And does cats really require bounce-buffer for isadma?

Furthermore, _isa_bus_dmamap_sync() does not handle cache coherency
at all, but it should do like arm/arm32/bus_dma.c.
---
Izumi Tsutsui
tsutsui <at> ceres.dti.ne.jp

Chris Gilbert | 9 Oct 2002 20:21
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Re: plan to merge cats and netwinder isa_machdep.c

Izumi Tsutsui said:
> In article <20021009094454.6a43a427.chris <at> dokein.co.uk>
> chris <at> dokein.co.uk wrote:
>
>> I'm thinking of merging the cats and netwinder isa_machdep.c files
>> into one, and placing it under arm/footbridge/isa/
>
> A bit off topic, but does ISA DMA work on these ports?
> Last time I tried AHA-1542 and PCnet-ISA on cats,
> both of them didn't work at all.

No idea, I've not tried ISA cards in my cats, I plan to at some point
soon, but first I suspect that the mess that is isa with footbridge needs
tidying up.  It doesn't surprise me if they didn't work, currently isa
interrupts happen at IPL_BIO on the footbridge, so if we go to splbio or
higher no isa interrupts will get through, this means that any other
footbridge interrupts can block the isa ones very easily.

What I believe should happen is that the isa bus is mapped in on a higher
IPL (IPL_HIGH possibly, better to map it at the level of the highest thing
it runs at) and that the spl* calls actually also change the isa
interrupts being blocked, and that the isa interrupt dispatch checks the
spl etc.

But I need to run this by people with more knowledge/experience of these
things, am I just mad, and it might just work, or is it just madness 8)

Certainly my new code for footbridge should work well (as I keep the
current ipl level as a number, not a mask, so it's use in isa would work)

(Continue reading)

Richard Earnshaw | 9 Oct 2002 21:12
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Re: plan to merge cats and netwinder isa_machdep.c

> In article <20021009094454.6a43a427.chris <at> dokein.co.uk>
> chris <at> dokein.co.uk wrote:
> 
> > I'm thinking of merging the cats and netwinder isa_machdep.c files into one, and placing it under arm/footbridge/isa/
> 
> A bit off topic, but does ISA DMA work on these ports?
> Last time I tried AHA-1542 and PCnet-ISA on cats,
> both of them didn't work at all.
> 
> Current _isa_bus_dmamap_load() in footbridge/isa/isadma_machdep.c
> returns physical address for ds_addr, but is it really OK for 24bit
> ISA bus? And does cats really require bounce-buffer for isadma?
> 
> Furthermore, _isa_bus_dmamap_sync() does not handle cache coherency
> at all, but it should do like arm/arm32/bus_dma.c.

Hmm, interesting.  Then it's a surprise that I get anything even 
resembling audio out of my soundblaster ISA card at all.  Though this 
would possibly explain some of the break-up.

R.

Izumi Tsutsui | 10 Oct 2002 16:09
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Re: plan to merge cats and netwinder isa_machdep.c

In article <2096.195.153.38.125.1034187701.squirrel <at> paradox.demon.co.uk>
chris <at> dokein.co.uk wrote:

> > A bit off topic, but does ISA DMA work on these ports?
> > Last time I tried AHA-1542 and PCnet-ISA on cats,
> > both of them didn't work at all.
> 
> No idea, I've not tried ISA cards in my cats, I plan to at some point
> soon, but first I suspect that the mess that is isa with footbridge needs
> tidying up.  It doesn't surprise me if they didn't work, currently isa
> interrupts happen at IPL_BIO on the footbridge, so if we go to splbio or
> higher no isa interrupts will get through, this means that any other
> footbridge interrupts can block the isa ones very easily.

Hmm, that's the reason why I got messages "com0: xx silo overflow"
from com and "ne0: warning - receiver ring buffer overrun" from ne2000.
It's great if they are fixed.

> > Current _isa_bus_dmamap_load() in footbridge/isa/isadma_machdep.c
> > returns physical address for ds_addr, but is it really OK for 24bit ISA
> > bus? And does cats really require bounce-buffer for isadma?
> 
> No idea, I believe it'll need the standard pc method of bounce buffers, as
> it's a standard PC ali southbridge.

So maybe the south bridge requires bounce buffer, but I doubt
the physical address of main memory starts from 0x0.
---
Izumi Tsutsui
tsutsui <at> ceres.dti.ne.jp
(Continue reading)

Izumi Tsutsui | 10 Oct 2002 16:19
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Re: plan to merge cats and netwinder isa_machdep.c

In article <200210091912.g99JCS313995 <at> buzzard.buzzard.freeserve.co.uk>
rearnsha <at> buzzard.freeserve.co.uk wrote:

> > Furthermore, _isa_bus_dmamap_sync() does not handle cache coherency
> > at all, but it should do like arm/arm32/bus_dma.c.
> 
> Hmm, interesting.  Then it's a surprise that I get anything even 
> resembling audio out of my soundblaster ISA card at all.  Though this 
> would possibly explain some of the break-up.

In general, data buffers are really large and data cache on SA is
small (16k), so it would not cause problem so often.
Buffers of descripters for bus-master devices are usually
allocated with BUS_DMAMAP_COHERENT, so cache flush is not
required so strictly (on arm, which handles BUS_DMAMAP_COHERENT).

Actually, the only problem that was caused by missing cache-flush in
my experience is fxp(4) driver, which allocates RX descriptors in mbufs.
---
Izumi Tsutsui
tsutsui <at> ceres.dti.ne.jp

Richard Earnshaw | 10 Oct 2002 17:07
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Re: plan to merge cats and netwinder isa_machdep.c

> In article <200210091912.g99JCS313995 <at> buzzard.buzzard.freeserve.co.uk>
> rearnsha <at> buzzard.freeserve.co.uk wrote:
> 
> > > Furthermore, _isa_bus_dmamap_sync() does not handle cache coherency
> > > at all, but it should do like arm/arm32/bus_dma.c.
> > 
> > Hmm, interesting.  Then it's a surprise that I get anything even 
> > resembling audio out of my soundblaster ISA card at all.  Though this 
> > would possibly explain some of the break-up.
> 
> In general, data buffers are really large and data cache on SA is
> small (16k), so it would not cause problem so often.
> Buffers of descripters for bus-master devices are usually
> allocated with BUS_DMAMAP_COHERENT, so cache flush is not
> required so strictly (on arm, which handles BUS_DMAMAP_COHERENT).
> 
> Actually, the only problem that was caused by missing cache-flush in
> my experience is fxp(4) driver, which allocates RX descriptors in mbufs.

True, but the other issue (24-bit address space) would mean that I'd 
expect on average for 7/8ths of the buffers to be outside the addressable 
range (I've got 128 Mb of ram).  Yet the failures, though there are far 
less common than that.

R.


Gmane