1 Jul 2003 13:46
RE: warm boot detection
Doug Fraser <dfraser <at> photuris.com>
2003-07-01 11:46:23 GMT
2003-07-01 11:46:23 GMT
Most of the integrated processors have a number registers that are initialized differently depending on the reset source. On the MPC850, there is a a Reset Status Register in the IMMR that lists the reset cause. It cannot differentiate between hard reset and power. However, the PLPRCR has a number of bits that are initialized by a power on sequence but not by a hard reset. We use one of these (FIOPD) to determine if the reset was the result of a power on event. Doug Fraser > -----Original Message----- > From: Jonathan Larmour [mailto:jifl <at> eCosCentric.com] > Sent: Monday, June 23, 2003 12:05 PM > To: aarichar <at> cisco.com > Cc: Ecos-Discuss > Subject: Re: [ECOS] warm boot detection > > > Aaron Richardson wrote: > > Is there some way that I can detect if the platform has > been cold booted or > > warm booted? It would be nice to avoid initializing > several things based on > > this. The SDRAM scrubbing and any memory testing could be skipped. > > Normally people simply rely on the HAL startup type (ROM/RAM etc.) to(Continue reading)
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