Jun Yuan | 1 Feb 17:53 2013

Re: Patch for Distributed Clock

Hi,

I've been testing Graeme Foot's DC Patch, which had already been added
into the etherlab master source by Florian. My system is Xenomai 2.6.1
+ Linux 2.6.37.6 + Etherlab(2498:9cdd7669dc0b <at> stable1.5).

First of all, a big thanks to Graeme Foot. It is a brilliant idea to
update the master cycle to match the ref slave time, and this works
wonderful! Great job! My servos run very stable now without any sync
problem. Thank you!

The little problem I found in the patch, however, is

timeDiff = ((timeDiff + (scanTimeNS/2)) % scanTimeNS) - (scanTimeNS/2);

This code doesn't work as it should, especially when timeDiff is negative.

And to the question that why "the time difference returned by
ecrt_rtdm_master_sync_slave_clocks_diff() is often one period out",
this was because that the correction made to the slave system_time was
wrong, see my last email 'Calculation of time_diff in
ec_fsm_master_dc_offset()'.

Regards,
Jun

diff -r 9cdd7669dc0b examples/rtai_rtdm_dc/main.c
--- a/examples/rtai_rtdm_dc/main.c    Thu Jan 10 17:36:41 2013 +0100
+++ b/examples/rtai_rtdm_dc/main.c    Fri Feb 01 17:38:29 2013 +0100
 <at>  <at>  -236,8 +236,9  <at>  <at> 
(Continue reading)

Yan Prochazka | 25 Jan 19:17 2013

distributed clock offset ?

Hello Everybody!

we currently use 1.5.0 version of EtherCAT master and Distributed Clock 
enabled slaves. Our application runs in user space and uses ecrt.h. DC 
synchronization seems to work perfectly, SYNC0 on all slaves and our 
application is kept in sync nicely, BUT how could I get, in my 
application, the absolute time offsets between time passed cyclically to 
ecrt_master_application_time() and absolute time of a particular slave 
when SYNC0 pulse is generated ?

basically, there are an event generated on the slave at arbitrary time, 
I can get slave time of that event, but I need *somehow* match that 
slave time with SYNC0 time occurrence and with my application time. 
Therefore I need to know offsets between my application time and SYNC0 
absolute times on the slaves.

Does anybody have any ideas or at least hints where and what to look for ?

Thanks a lot,
Jan Prochazka
BOESEL Diego Fernandes | 25 Jan 09:47 2013
Picon

Problem setting up Etherlab Master with Wago 750-354

Hello,

1 - PROBLEM:
I am trying to set-up a Ethercat fieldbus using Etherlab as master and a Wago 750-354 as a slave. However, all
info I get from the Wago slave is null. I am almost sure there is something wrong here.

Here are some screenshoots:

#sudo /etc/init.d/ethercat start
Starting EtherCAT master 1.5.1  done

#sudo /etc/init.d/ethercat status
Checking for EtherCAT master 1.5.1
Master0  running

#/opt/etherlab/bin/ethercat slave
0  0:0  INIT  E  0x00000000:0x00000000

#/opt/etherlab/bin/ethercat xml
<?xml version="1.0" ?>
<EtherCATInfo>
  <!-- Slave 0 -->
  <Vendor>
    <Id>0</Id>
  </Vendor>
  <Descriptions>
    <Devices>
      <Device>
        <Type ProductCode="#x00000000" RevisionNo="#x00000000"></Type>
      </Device>
(Continue reading)

Thomas Nelson | 24 Jan 04:15 2013

Accessing same PDO for both read and write

All,

My client has a robotics system using Copley Controls Accelnet Plus drives with a digital input-triggered capture capability that we're trying to use for positioning calibration.  This feature requires the ability to map the same slave CoE object for both read to detect the capture event and write to subsequently rearm the trigger.  Mapping this object to both Tx and Rx PDOs appears to work correctly from the PDO mapping info returned from the master.  However, when I attempt to register the corresponding mapped PDO entries in the domain, I get the same domain offset for both PDOs, preventing the application from managing them independently.

The ecrt_slave_config_reg_pdo_entry() function doesn't have an argument to distinguish the direction of the PDO mapping, so is this capability not supported by the master?

We're using the 1.5.0 release.

Thanks,

Tom Nelson
Consulting Engineer
Granite Computer Sciences, LLC







<div>All,<div><br></div>
<div>My client has a robotics system using Copley Controls Accelnet Plus drives with a digital input-triggered capture capability that we're trying to use for positioning calibration. &nbsp;This feature requires the ability to map the same slave CoE object for both read to detect the capture event and write to subsequently rearm the trigger. &nbsp;Mapping this object to both Tx and Rx PDOs appears to work correctly from the PDO mapping info returned from the master. &nbsp;However, when I attempt to register the corresponding mapped PDO entries in the domain, I get the same domain offset for both PDOs, preventing the application from managing them independently.</div>
<div><br></div>
<div>The&nbsp;ecrt_slave_config_reg_pdo_entry() function doesn't have an argument to distinguish the direction of the PDO mapping, so is this capability not supported by the master?</div>
<div><br></div>
<div>We're using the 1.5.0 release.</div>
<div><br></div>
<div>Thanks,</div>
<div>
<br><div>
<span class="Apple-style-span"><span class="Apple-style-span"><div>
<span class="Apple-style-span"><div>
<span class="Apple-style-span"><div><div><span class="Apple-style-span"><div>Tom Nelson</div>
<div>Consulting Engineer</div>
<div>Granite Computer Sciences, LLC</div>
<div><br></div>
<div><span class="Apple-style-span"><br></span></div></span></div></div></span><br class="Apple-interchange-newline">
</div></span><br class="Apple-interchange-newline">
</div></span><br class="Apple-interchange-newline"></span><br class="Apple-interchange-newline">
</div>
<br>
</div>
</div>
Jun Yuan | 23 Jan 17:36 2013

Calculation of time_diff in ec_fsm_master_dc_offset()

Hello Florian,

I think there might be a bug in the calculation of time_diff between the master clock and the slave clock in fsm_master.c. My temporary solution is to comment out the line 'system_time32 += correction;' in the function ec_fsm_master_dc_offset32() and the line 'system_time += correction;' in ec_fsm_master_dc_offset64().

Here is my story. I've been testing the etherlab master on Xenomai. After several times restart of my master process, I occasionally found something interesting: the DC sync between the master and the slave always takes a long time (approx. 5 second) by each start, and it seems by each time the time diff between the master and the slave is always approx. -4000000 ns.
[16165.453658] EtherCAT DEBUG 0-0: DC 32 bit system time offset calculation: system_time=xxxxxxxxxxx (corrected with 4000000), app_time=xxxxxxxxxx, diff=-3954618

And the checking synchrony will be started with a difference around that diff time.
[16165.521874] EtherCAT DEBUG 0-0: Checking for synchrony.
[16165.529891] EtherCAT DEBUG 0-0: Sync after    4 ms:     3941732 ns

This is odd. Since the master has synchronized with the slave just several seconds ago before the restart, their clocks should not have 4 ms difference in such a short time. And it is strange that the value is always around 4000000 ns. So I digged into the master's source code to find out the reason.

I have etherlab master rev 2498:9cdd7669dc0b <at> stable-1.5 on Xenomai 2.6.1, and my rt task is something like the following:

ecrt_master_application_time(master, dummy_time);

while(true) { // run loop
        wait_period();
        ecrt_master_receive(master);
        ecrt_domain_process(domain1);
        ...
        ecrt_domain_queue(domain1);
        sync_distributed_clocks();
        ecrt_master_send(master);
}

In the function sync_distributed_clocks() there are three calls:
    ecrt_master_application_time(master, dc_time_ns);
    ecrt_master_sync_reference_clock(master);
    ecrt_master_sync_slave_clocks(master);

And here are what I've found:

1. I must call ecrt_master_application_time() once somewhere before my run loop, otherwise I'll get error "No app_time received up to now", and ec_fsm_master_state_dc_read_offset will not be executed. The app time given to the ecrt_master_application_time() at this point is not important, it will not be used anywhere. Calling the function ecrt_master_application_time(master, dummy_time) can avoid master->has_app_time = 0 in ec_fsm_master_enter_write_system_times().

2. The first app_time dc_time_ns given to the ecrt_master_application_time() within the sync_distributed_clocks() in my run loop will be used as slave->master->app_time in the function ec_fsm_master_dc_offset.

3. In ec_fsm_master_dc_offset, there is a variable 'correction', which is somehow always equal to my fsm interval(4000000 ns on my master). I believe this correction should be the time interval since the last read. It is calculated using the variable jiffies_since_read.
jiffies_since_read = jiffies - datagram->jiffies_sent;
jiffies is the current time, datagram->jiffies_sent is the time of the last call ecrt_master_send(master).

The system_time from the ref_sync_datagram is the time of my ref slave. The following line calculates the current system_time of the ref slave clock.
system_time += correction;

Then the time_diff is calcuated as following
time_diff = fsm->slave->master->app_time - system_time;

The problem here however is that the fsm->slave->master->app_time is not the current app_time of the master. It is the app time set in ecrt_master_application_time() just before ecrt_master_send(master). So the current app_time of master should also be approximately calculated as
fsm->slave->master->app_time + correction.

So the correct calculation for the current time_diff should be
time_diff = fsm->slave->master->app_time + correction - system_time;

Now the question is, why bother adding the correction(time interval since read) to the system_time, as the app_time was set by the user at about the same time when the system_time was read?

After commenting out the line 'system_time += correction;', I have now very small time diff between the master and the slave after restart, and the ec_fsm_slave_config_state_dc_sync_check goes way faster because the initial difference becomes small.

I hope this mail could also help those having the warning 'Slave did not sync after 5000 ms'.

Regards,
Jun



diff -r 9cdd7669dc0b master/fsm_master.c
--- a/master/fsm_master.c    Thu Jan 10 17:36:41 2013 +0100
+++ b/master/fsm_master.c    Wed Jan 23 17:09:51 2013 +0100
<at> <at> -976,7 +976,7 <at> <at>
 
     // correct read system time by elapsed time since read operation
     correction = jiffies_since_read * 1000 / HZ * 1000000;
-    system_time32 += correction;
+//    system_time32 += correction;
     time_diff = (u32) slave->master->app_time - system_time32;
 
     EC_SLAVE_DBG(slave, 1, "DC 32 bit system time offset calculation:"
<at> <at> -1013,7 +1013,7 <at> <at>
 
     // correct read system time by elapsed time since read operation
     correction = (u64) (jiffies_since_read * 1000 / HZ) * 1000000;
-    system_time += correction;
+//    system_time += correction;
     time_diff = fsm->slave->master->app_time - system_time;
 
     EC_SLAVE_DBG(slave, 1, "DC 64 bit system time offset calculation:"

<div><p>Hello Florian,<br><br>I think there might be a bug in the calculation of time_diff between the master clock and the slave clock in fsm_master.c. My temporary solution is to comment out the line 'system_time32 += correction;' in the function ec_fsm_master_dc_offset32() and the line 'system_time += correction;' in ec_fsm_master_dc_offset64().<br><br>Here is my story. I've been testing the etherlab master on Xenomai. After several times restart of my master process, I occasionally found something interesting: the DC sync between the master and the slave always takes a long time (approx. 5 second) by each start, and it seems by each time the time diff between the master and the slave is always approx. -4000000 ns. <br><a href="tel:%5B16165.453658" value="+16165453658" target="_blank">[16165.453658</a>] EtherCAT DEBUG 0-0: DC 32 bit system time offset calculation: system_time=xxxxxxxxxxx (corrected with 4000000), app_time=xxxxxxxxxx, diff=-3954618<br><br>And the checking synchrony will be started with a difference around that diff time.<br><a href="tel:%5B16165.521874" value="+16165521874" target="_blank">[16165.521874</a>] EtherCAT DEBUG 0-0: Checking for synchrony.<br><a href="tel:%5B16165.529891" value="+16165529891" target="_blank">[16165.529891</a>] EtherCAT DEBUG 0-0: Sync after&nbsp;&nbsp;&nbsp; 4 ms:&nbsp;&nbsp;&nbsp;&nbsp; 3941732 ns<br><br>This is odd. Since the master has synchronized with the slave just several seconds ago before the restart, their clocks should not have 4 ms difference in such a short time. And it is strange that the value is always around 4000000 ns. So I digged into the master's source code to find out the reason.<br><br>I have etherlab master rev 2498:9cdd7669dc0b <at> stable-1.5 on Xenomai 2.6.1, and my rt task is something like the following:<br><br>ecrt_master_application_time(master, dummy_time);<br><br>while(true) { // run loop<br>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; wait_period();<br>

&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; ecrt_master_receive(master);<br>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; ecrt_domain_process(domain1);<br>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; ...<br>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; ecrt_domain_queue(domain1);<br>
&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; sync_distributed_clocks();<br>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; ecrt_master_send(master);<br>}<br><br>In the function sync_distributed_clocks() there are three calls:<br>&nbsp;&nbsp;&nbsp; ecrt_master_application_time(master, dc_time_ns);<br>&nbsp;&nbsp;&nbsp; ecrt_master_sync_reference_clock(master);<br>

&nbsp;&nbsp;&nbsp; ecrt_master_sync_slave_clocks(master);<br><br>And here are what I've found:<br><br>1. I must call ecrt_master_application_time() once somewhere before my run loop, otherwise I'll get error "No app_time received up to now", and ec_fsm_master_state_dc_read_offset will not be executed. The app time given to the ecrt_master_application_time() at this point is not important, it will not be used anywhere. Calling the function ecrt_master_application_time(master, dummy_time) can avoid master-&gt;has_app_time = 0 in ec_fsm_master_enter_write_system_times().<br><br>2. The first app_time dc_time_ns given to the ecrt_master_application_time() within the sync_distributed_clocks() in my run loop will be used as slave-&gt;master-&gt;app_time in the function ec_fsm_master_dc_offset. <br><br>3. In ec_fsm_master_dc_offset, there is a variable 'correction', which is somehow always equal to my fsm interval(4000000 ns on my master). I believe this correction should be the time interval since the last read. It is calculated using the variable jiffies_since_read.<br>jiffies_since_read = jiffies - datagram-&gt;jiffies_sent;<br>jiffies is the current time, datagram-&gt;jiffies_sent is the time of the last call ecrt_master_send(master).<br><br>The system_time from the ref_sync_datagram is the time of my ref slave. The following line calculates the current system_time of the ref slave clock.<br>system_time += correction;<br><br>Then the time_diff is calcuated as following<br>time_diff = fsm-&gt;slave-&gt;master-&gt;app_time - system_time;<br><br>The problem here however is that the fsm-&gt;slave-&gt;master-&gt;app_time is not the current app_time of the master. It is the app time set in ecrt_master_application_time() just before ecrt_master_send(master). So the current app_time of master should also be approximately calculated as<br>

fsm-&gt;slave-&gt;master-&gt;app_time + correction.<br><br>So the correct calculation for the current time_diff should be<br>time_diff = fsm-&gt;slave-&gt;master-&gt;app_time + correction - system_time;<br><br>Now the question is, why bother adding the correction(time interval since read) to the system_time, as the app_time was set by the user at about the same time when the system_time was read?<br><br>After commenting out the line 'system_time += correction;', I have now very small time diff between the master and the slave after restart, and the ec_fsm_slave_config_state_dc_sync_check goes way faster because the initial difference becomes small.<br><br>I hope this mail could also help those having the warning 'Slave did not sync after 5000 ms'.<br><br>Regards,<br>Jun<br><br><br><br>diff -r 9cdd7669dc0b master/fsm_master.c<br>--- a/master/fsm_master.c&nbsp;&nbsp;&nbsp; Thu Jan 10 17:36:41 2013 +0100<br>

+++ b/master/fsm_master.c&nbsp;&nbsp;&nbsp; Wed Jan 23 17:09:51 2013 +0100<br> <at>  <at>  -976,7 +976,7  <at>  <at> <br>&nbsp;<br>&nbsp;&nbsp;&nbsp;&nbsp; // correct read system time by elapsed time since read operation<br>&nbsp;&nbsp;&nbsp;&nbsp; correction = jiffies_since_read * 1000 / HZ * 1000000;<br>

-&nbsp;&nbsp;&nbsp; system_time32 += correction;<br>+//&nbsp;&nbsp;&nbsp; system_time32 += correction;<br>&nbsp;&nbsp;&nbsp;&nbsp; time_diff = (u32) slave-&gt;master-&gt;app_time - system_time32;<br>&nbsp;<br>&nbsp;&nbsp;&nbsp;&nbsp; EC_SLAVE_DBG(slave, 1, "DC 32 bit system time offset calculation:"<br>

 <at>  <at>  -1013,7 +1013,7  <at>  <at> <br>&nbsp;<br>&nbsp;&nbsp;&nbsp;&nbsp; // correct read system time by elapsed time since read operation<br>&nbsp;&nbsp;&nbsp;&nbsp; correction = (u64) (jiffies_since_read * 1000 / HZ) * 1000000;<br>-&nbsp;&nbsp;&nbsp; system_time += correction;<br>+//&nbsp;&nbsp;&nbsp; system_time += correction;<br>

&nbsp;&nbsp;&nbsp;&nbsp; time_diff = fsm-&gt;slave-&gt;master-&gt;app_time - system_time;<br>&nbsp;<br>&nbsp;&nbsp;&nbsp;&nbsp; EC_SLAVE_DBG(slave, 1, "DC 64 bit system time offset calculation:"</p></div>
Ralf Roesch | 22 Jan 16:47 2013

[PATCH] fix for sending data opcode in FoE

Hi,

Occasionally I had the problem getting wrong FoE opcodes on my slave.

The attached patch forces the "reserved byte" to be zero as requested by 
ETG1000.6 when sending the FoE data opcode.
The other opcodes are already correctly written with the U16 macro.

regards
Ralf

diff -r 9cdd7669dc0b master/fsm_foe.c
--- a/master/fsm_foe.c	Thu Jan 10 17:36:41 2013 +0100
+++ b/master/fsm_foe.c	Tue Jan 22 16:30:55 2013 +0100
 <at>  <at>  -257,7 +257,7  <at>  <at> 
         return -1;
     }

-    EC_WRITE_U8 (data, EC_FOE_OPCODE_DATA);    // OpCode = DataBlock req.
+    EC_WRITE_U16 (data, EC_FOE_OPCODE_DATA);    // OpCode = DataBlock req.
     EC_WRITE_U32(data + 2, fsm->tx_packet_no); // PacketNo, Password

     memcpy(data + EC_FOE_HEADER_SIZE,
diff -r 9cdd7669dc0b master/fsm_foe.c
--- a/master/fsm_foe.c	Thu Jan 10 17:36:41 2013 +0100
+++ b/master/fsm_foe.c	Tue Jan 22 16:30:55 2013 +0100
 <at>  <at>  -257,7 +257,7  <at>  <at> 
         return -1;
     }

-    EC_WRITE_U8 (data, EC_FOE_OPCODE_DATA);    // OpCode = DataBlock req.
+    EC_WRITE_U16 (data, EC_FOE_OPCODE_DATA);    // OpCode = DataBlock req.
     EC_WRITE_U32(data + 2, fsm->tx_packet_no); // PacketNo, Password

     memcpy(data + EC_FOE_HEADER_SIZE,
Gavin Lambert | 22 Jan 02:17 2013

Re: Beckhoff Slave Controllers and Device Reset

I would also like to know if there's been any progress on this.  Especially
from the command-line interface or another user-mode program when the master
is in IDLE mode.

> -----Original Message-----
> From: etherlab-users-bounces at etherlab.org [mailto:etherlab-users-
> bounces at etherlab.org] On Behalf Of Kim H. Madsen
> Sent: Thu Jan 27 12:05:42 CET 2011
> To: etherlab-users at etherlab.org
> Subject: [etherlab-users] Beckhoff Slave Controllers and Device Reset
> 
> 
> Any news on this issue?
> 
> Best regards 
> Kim Hedegaard Madsen 
> 
> 
>> -----Original Message-----
>> From: etherlab-users-bounces at etherlab.org [mailto:etherlab-users-
>> bounces at etherlab.org] On Behalf Of Eugene Bordenkircher
>> Sent: 13. oktober 2010 18:00
>> To: etherlab-users at etherlab.org
>> Subject: [etherlab-users] Beckhoff Slave Controllers and Device Reset
>> 
>> We are trying to perform a device reset of a Beckhoff Slave controller.
The
>> reset requires 3 consecutive writes to the appropriate register (0x40 or
0x41).
>> 
>> As far as we can tell, there's no way for the EtherCAT master to send
>> 3 consecutive register write frames.  The master always seems to
interject
>> another frame in between.  Is this a correct observation?
>> If not, is there a way to perform these resets? If it is correct, is
there a way to
>> perform the reset with minor modifications to the master?
>> 
>> Thank you for your help.
>> 
>> Eugene T. Bordenkircher

hamelin.philippe | 21 Jan 21:48 2013
Picon

EL2252: SII eeprom and XML config mismatch

Hi,
 
I'm having troubles using the Beckhoff EL2252 with Etherlab. According to the documentation and the XML file, I should have 5 sync managers:
 
Outputs:
- SM0: DC Sync Activate
- SM1: DC Sync Start
- SM2: Channel 1 & 2 outputs
 
Inputs:
- SM3: SysTime and Feedback
 
However, when connecting the slave to the Etherlab master I get the following config (which is fixed by the device):
 
$ ethercat -p 1 pdo
SM0: PhysAddr 0x0981, DefaultSize    0, ControlRegister 0x00, Enable 12
  TxPDO 0x1602 "DC Sync Activate"
    PDO entry 0x1d09:81,  8 bit, "Activate"
SM1: PhysAddr 0x0990, DefaultSize    0, ControlRegister 0x00, Enable 4
  TxPDO 0x1603 "DC Sync Start"
    PDO entry 0x1d09:90, 64 bit, "StartTime"
SM2: PhysAddr 0x0f00, DefaultSize    0, ControlRegister 0x44, Enable 9
  RxPDO 0x1600 "Channel 1"
    PDO entry 0x7000:01,  1 bit, "Output"
    PDO entry 0x7000:02,  1 bit, "TriState"
  RxPDO 0x1601 "Channel 2"
    PDO entry 0x7010:01,  1 bit, "Output"
    PDO entry 0x7010:02,  1 bit, "TriState"
    PDO entry 0x0000:00,  4 bit, ""
  RxPDO 0x1604 "Reserved"
SM3: PhysAddr 0x0910, DefaultSize    0, ControlRegister 0x00, Enable 4
SM4: PhysAddr 0x1000, DefaultSize    0, ControlRegister 0x00, Enable 4
 
Is doesn't make any sense to me that SM2 is a RxPDO since this is the output state that the master should provides. Moreover, the PDO mapping is fixed by the device so I can't configure my own mapping. I see two possibles problems:
 
a) The SII eeprom isn't correct;
or,
b) I don't understand the meaning of these lines :-)
 
Any ideas?
 
Thank you,
 
------------------------------------
Philippe Hamelin
, ing., M. Ing
Chercheur / Researcher

T: 450-652-8499 x2198
F: 450-652-1316

Expertise robotique et civil
Institut de recherche d'Hydro-Québec (IREQ)
1740, boul. Lionel-Boulet
Varennes (QC) J3X 1S1, Canada

 
<div>
<div><span class="277013620-21012013">Hi,</span></div>
<div>
<span class="277013620-21012013"></span>&nbsp;</div>
<div><span class="277013620-21012013">I'm having troubles 
using the Beckhoff EL2252 with Etherlab. According to the documentation and the 
XML file, I should have&nbsp;5 sync managers:</span></div>
<div>
<span class="277013620-21012013"></span>&nbsp;</div>
<div><span class="277013620-21012013">Outputs: 
</span></div>
<div><span class="277013620-21012013">- SM0: DC Sync 
Activate</span></div>
<div><span class="277013620-21012013">- SM1: DC Sync 
Start</span></div>
<div><span class="277013620-21012013">- SM2: Channel 1 
&amp; 2 outputs</span></div>
<div>
<span class="277013620-21012013"></span>&nbsp;</div>
<div><span class="277013620-21012013">Inputs: 
</span></div>
<div><span class="277013620-21012013">- SM3: SysTime and 
Feedback</span></div>
<div>
<span class="277013620-21012013"></span>&nbsp;</div>
<div><span class="277013620-21012013">However, when 
connecting the slave to the Etherlab master I get the following config (which is 
fixed by the device):</span></div>
<div>
<span class="277013620-21012013"></span>&nbsp;</div>
<div><span class="277013620-21012013">$ ethercat -p 1 
pdo<br>SM0: PhysAddr 0x0981, DefaultSize&nbsp;&nbsp;&nbsp; 0, ControlRegister 
0x00, Enable 12<br>&nbsp; TxPDO 0x1602 "DC Sync Activate"<br>&nbsp;&nbsp;&nbsp; 
PDO entry 0x1d09:81,&nbsp; 8 bit, "Activate"<br>SM1: PhysAddr 0x0990, 
DefaultSize&nbsp;&nbsp;&nbsp; 0, ControlRegister 0x00, Enable 4<br>&nbsp; TxPDO 
0x1603 "DC Sync Start"<br>&nbsp;&nbsp;&nbsp; PDO entry 0x1d09:90, 64 bit, 
"StartTime"<br>SM2: PhysAddr 0x0f00, DefaultSize&nbsp;&nbsp;&nbsp; 0, 
ControlRegister 0x44, Enable 9<br>&nbsp; RxPDO 0x1600 "Channel 
1"<br>&nbsp;&nbsp;&nbsp; PDO entry 0x7000:01,&nbsp; 1 bit, 
"Output"<br>&nbsp;&nbsp;&nbsp; PDO entry 0x7000:02,&nbsp; 1 bit, 
"TriState"<br>&nbsp; RxPDO 0x1601 "Channel 2"<br>&nbsp;&nbsp;&nbsp; PDO entry 
0x7010:01,&nbsp; 1 bit, "Output"<br>&nbsp;&nbsp;&nbsp; PDO entry 
0x7010:02,&nbsp; 1 bit, "TriState"<br>&nbsp;&nbsp;&nbsp; PDO entry 
0x0000:00,&nbsp; 4 bit, ""<br>&nbsp; RxPDO 0x1604 "Reserved"<br>SM3: PhysAddr 
0x0910, DefaultSize&nbsp;&nbsp;&nbsp; 0, ControlRegister 0x00, Enable 4<br>SM4: 
PhysAddr 0x1000, DefaultSize&nbsp;&nbsp;&nbsp; 0, ControlRegister 0x00, Enable 
4</span></div>
<div>
<span class="277013620-21012013"></span>&nbsp;</div>
<div><span class="277013620-21012013">Is doesn't make any 
sense to me that SM2 is a RxPDO since this is the output state that the master 
should provides. Moreover, the PDO mapping is fixed by the device&nbsp;so I 
can't&nbsp;configure my own mapping. I see two possibles 
problems:</span></div>
<div>
<span class="277013620-21012013"></span>&nbsp;</div>
<div><span class="277013620-21012013">a)&nbsp;The SII 
eeprom isn't correct;</span></div>
<div><span class="277013620-21012013">or,</span></div>
<div><span class="277013620-21012013">b)&nbsp;I don't 
understand the meaning of these lines :-)</span></div>
<div>&nbsp;</div>
<div><span class="277013620-21012013">Any 
ideas?</span></div>
<div>
<span class="277013620-21012013"></span>&nbsp;</div>
<div><span class="277013620-21012013">Thank 
you,</span></div>
<div>
<span class="277013620-21012013"></span>&nbsp;</div>
<div align="left">
<span><span><span>------------------------------------</span></span></span><span><br><span>Philippe 
Hamelin</span></span><span><span>, ing., M. Ing</span></span><br><span><span>Chercheur / Researcher</span><br><br><span><span>T</span>: 450-652-8499 x2198</span><br><span><span>F</span>: 450-6<span>52-1316</span></span><br><br><span>Expertise robotique et 
civil<br>Institut de recherche d'Hydro-Qu&eacute;bec (IREQ)<br>1740, boul. 
Lionel-Boulet<br>Varennes (QC) J3X 1S1, Canada</span></span><br>
</div>
<span><span><span></span></span></span>
<div>&nbsp;</div>
</div>
Derrill Vezina | 21 Jan 17:47 2013

Master run mode fails on startup

Hi,

 

My current setup is a Beckhoff EK1100 Bus coupler and a Beckhoff EL3068 8 channel analog input. Using the application interface, I have successfully run my software with the Ethercat Master on Ubuntu 10.04 LTS on 2 other machines (identical hardware and OS / software to the one I am about to refer to). The 3rd box is where I am having issues for some reason.

 

When the master starts, the Ethernet activity lights on the bus coupler are blinking showing activity as well as the interface lights on the coupler. Following the master startup, the application interface initialization succeeds including setting up the domain for the devices, but for some reason when activating the master to start scanning (which does not return any errors), the Ethernet lights immediately go solid showing no activity (run lights remain blinking showing that the scan is not happening like it should). The run light on the coupler also remains blinking…and the EL3068 Lights remain blinking (showing no run mode).

 

Again, this is identical to two other in house Linux boxes that are running the same .iso and startup fine and go right into run mode and output the data correctly.

 

Here is my dmesg output when the master starts up and the application interface loads:

 

[   14.102061] EtherCAT: Master driver 1.5.1 0f7a243b03e4

[   14.102268] EtherCAT: 1 master waiting for devices.

[   14.115613] ec_generic: EtherCAT master generic Ethernet device module 1.5.1 0f7a243b03e4

[   14.115656] ec_generic: Binding socket to interface 3 (eth1).

[   14.128170] EtherCAT 0: Starting EtherCAT-IDLE thread.

[   14.128343] EtherCAT 0: Link state changed to UP.

[   14.133050] EtherCAT 0: 2 slave(s) responding.

[   14.133060] EtherCAT 0: Slave states: INIT.

[   14.133172] EtherCAT 0: Scanning bus.

[   14.591333] EtherCAT 0: Bus scanning completed in 456 ms.

[   14.593127] EtherCAT 0: Slave states: INIT, PREOP.

[   14.605032] EtherCAT 0: Slave states: PREOP.

[   16.130101] EtherCAT: Requesting master 0...

[   16.130110] EtherCAT: Successfully requested master 0.

[   16.130733] EtherCAT 0: Domain0: Logical address 0x00000000, 32 byte, expected working counter 1.

[   16.130742] EtherCAT 0:   Datagram domain0-0: Logical offset 0x00000000, 32 byte, type LRD.

[   16.130776] EtherCAT 0: Master thread exited.

[   16.130786] EtherCAT 0: Starting EtherCAT-OP thread.

[   16.132379] EtherCAT WARNING 0: No app_time received up to now, but master already active.

 

I am not sure if the warning has anything to do with what I am seeing. Has anyone else ever run into this issue? Or maybe could enlighten me with what this warning means? I am using the generic driver on all 3 boxes.

 

Derrill Vezina

Electrical Engineer

Caron Engineering Inc.

dvezina <at> caron-eng.com

Office: (207)646-6071 ext. 360

Direct: (207)641-6839

 

<div><div class="WordSection1">
<p class="MsoNormal">Hi,<p></p></p>
<p class="MsoNormal"><p>&nbsp;</p></p>
<p class="MsoNormal">My current setup is a Beckhoff EK1100 Bus coupler and a Beckhoff EL3068 8 channel analog input. Using the application interface, I have successfully run my software with the Ethercat Master on Ubuntu 10.04 LTS on 2 other machines (identical hardware and OS / software to the one I am about to refer to). The 3rd box is where I am having issues for some reason.<p></p></p>
<p class="MsoNormal"><p>&nbsp;</p></p>
<p class="MsoNormal">When the master starts, the Ethernet activity lights on the bus coupler are blinking showing activity as well as the interface lights on the coupler. Following the master startup, the application interface initialization succeeds including setting up the domain for the devices, but for some reason when activating the master to start scanning (which does not return any errors), the Ethernet lights immediately go solid showing no activity (run lights remain blinking showing that the scan is not happening like it should). The run light on the coupler also remains blinking&hellip;and the EL3068 Lights remain blinking (showing no run mode).<p></p></p>
<p class="MsoNormal"><p>&nbsp;</p></p>
<p class="MsoNormal">Again, this is identical to two other in house Linux boxes that are running the same .iso and startup fine and go right into run mode and output the data correctly.<p></p></p>
<p class="MsoNormal"><p>&nbsp;</p></p>
<p class="MsoNormal">Here is my dmesg output when the master starts up and the application interface loads:<p></p></p>
<p class="MsoNormal"><p>&nbsp;</p></p>
<p class="MsoNormal">[&nbsp;&nbsp; 14.102061] EtherCAT: Master driver 1.5.1 0f7a243b03e4<p></p></p>
<p class="MsoNormal">[&nbsp;&nbsp; 14.102268] EtherCAT: 1 master waiting for devices.<p></p></p>
<p class="MsoNormal">[&nbsp;&nbsp; 14.115613] ec_generic: EtherCAT master generic Ethernet device module 1.5.1 0f7a243b03e4<p></p></p>
<p class="MsoNormal"> [&nbsp;&nbsp; 14.115656] ec_generic: Binding socket to interface 3 (eth1).<p></p></p>
<p class="MsoNormal">[&nbsp;&nbsp; 14.128170] EtherCAT 0: Starting EtherCAT-IDLE thread.<p></p></p>
<p class="MsoNormal">[&nbsp;&nbsp; 14.128343] EtherCAT 0: Link state changed to UP.<p></p></p>
<p class="MsoNormal">[&nbsp;&nbsp; 14.133050] EtherCAT 0: 2 slave(s) responding.<p></p></p>
<p class="MsoNormal">[&nbsp;&nbsp; 14.133060] EtherCAT 0: Slave states: INIT.<p></p></p>
<p class="MsoNormal">[&nbsp;&nbsp; 14.133172] EtherCAT 0: Scanning bus.<p></p></p>
<p class="MsoNormal">[&nbsp;&nbsp; 14.591333] EtherCAT 0: Bus scanning completed in 456 ms.<p></p></p>
<p class="MsoNormal">[&nbsp;&nbsp; 14.593127] EtherCAT 0: Slave states: INIT, PREOP.<p></p></p>
<p class="MsoNormal">[&nbsp;&nbsp; 14.605032] EtherCAT 0: Slave states: PREOP.<p></p></p>
<p class="MsoNormal">[&nbsp;&nbsp; 16.130101] EtherCAT: Requesting master 0...<p></p></p>
<p class="MsoNormal">[&nbsp;&nbsp; 16.130110] EtherCAT: Successfully requested master 0.<p></p></p>
<p class="MsoNormal">[&nbsp;&nbsp; 16.130733] EtherCAT 0: Domain0: Logical address 0x00000000, 32 byte, expected working counter 1.<p></p></p>
<p class="MsoNormal">[&nbsp;&nbsp; 16.130742] EtherCAT 0:&nbsp;&nbsp; Datagram domain0-0: Logical offset 0x00000000, 32 byte, type LRD.<p></p></p>
<p class="MsoNormal">[&nbsp;&nbsp; 16.130776] EtherCAT 0: Master thread exited.<p></p></p>
<p class="MsoNormal">[&nbsp;&nbsp; 16.130786] EtherCAT 0: Starting EtherCAT-OP thread.<p></p></p>
<p class="MsoNormal">[&nbsp;&nbsp; 16.132379] EtherCAT WARNING 0: No app_time received up to now, but master already active. <p></p></p>
<p class="MsoNormal"><p>&nbsp;</p></p>
<p class="MsoNormal">I am not sure if the warning has anything to do with what I am seeing. Has anyone else ever run into this issue? Or maybe could enlighten me with what this warning means? I am using the generic driver on all 3 boxes.<p></p></p>
<p class="MsoNormal"><p>&nbsp;</p></p>
<p class="MsoNormal">Derrill Vezina<p></p></p>
<p class="MsoNormal">Electrical Engineer<p></p></p>
<p class="MsoNormal">Caron Engineering Inc.<p></p></p>
<p class="MsoNormal"><a href="mailto:dvezina@..."><span>dvezina <at> caron-eng.com</span></a><p></p></p>
<p class="MsoNormal">Office: (207)646-6071 ext. 360<p></p></p>
<p class="MsoNormal">Direct: (207)641-6839<p></p></p>
<p class="MsoNormal"><p>&nbsp;</p></p>
</div></div>
Ralf Roesch | 21 Jan 16:52 2013

Corrupt mailbox response in FoE

Hi,

the current stable-1.5 branch does not work for me, when using FoE commands.
I checked the FoE datagram flow with Wireshark and detected no errors.
So I looked at the source and found a fix for my problem.
Attached you will find a patch for further discussion.

Please note: all fsm->slave by slave replacements hove nothing to do 
with the problem. (This is only code beautifying)

The important fixes are the datagram by fsm->datagram replacements found 
in ec_slave_mbox_fetch() functions.

BTW what are the differences between the datagram and fsm->datagram handles?

Best regards
Ralf

diff -r 9cdd7669dc0b master/fsm_foe.c
--- a/master/fsm_foe.c	Thu Jan 10 17:36:41 2013 +0100
+++ b/master/fsm_foe.c	Mon Jan 21 15:54:35 2013 +0100
 <at>  <at>  -418,7 +418,7  <at>  <at> 
         return;
     }

-    data = ec_slave_mbox_fetch(fsm->slave, datagram, &mbox_prot, &rec_size);
+    data = ec_slave_mbox_fetch(fsm->slave, fsm->datagram, &mbox_prot, &rec_size);
     if (IS_ERR(data)) {
         ec_foe_set_tx_error(fsm, FOE_PROT_ERROR);
         return;
 <at>  <at>  -498,7 +498,7  <at>  <at> 

     fsm->jiffies_start = fsm->datagram->jiffies_sent;

-    ec_slave_mbox_prepare_check(fsm->slave, datagram); // can not fail.
+    ec_slave_mbox_prepare_check(slave, datagram); // can not fail.

     fsm->retries = EC_FSM_RETRIES;
     fsm->state = ec_fsm_foe_state_ack_check;
 <at>  <at>  -536,7 +536,7  <at>  <at> 
         return;
     }

-    ec_slave_mbox_prepare_check(fsm->slave, datagram);
+    ec_slave_mbox_prepare_check(slave, datagram);
     fsm->jiffies_start = jiffies;
     fsm->retries = EC_FSM_RETRIES;
     fsm->state = ec_fsm_foe_state_ack_check;
 <at>  <at>  -632,7 +632,7  <at>  <at> 

     fsm->jiffies_start = fsm->datagram->jiffies_sent;

-    ec_slave_mbox_prepare_check(fsm->slave, datagram); // can not fail.
+    ec_slave_mbox_prepare_check(slave, datagram); // can not fail.

     fsm->retries = EC_FSM_RETRIES;
     fsm->state = ec_fsm_foe_state_data_check;
 <at>  <at>  -755,7 +755,7  <at>  <at> 
         return;
     }

-    data = ec_slave_mbox_fetch(slave, datagram, &mbox_prot, &rec_size);
+    data = ec_slave_mbox_fetch(slave, fsm->datagram, &mbox_prot, &rec_size);
     if (IS_ERR(data)) {
         ec_foe_set_rx_error(fsm, FOE_MBOX_FETCH_ERROR);
         return;
 <at>  <at>  -815,7 +815,7  <at>  <at> 

     fsm->rx_last_packet =
         (rec_size + EC_MBOX_HEADER_SIZE + EC_FOE_HEADER_SIZE
-         != fsm->slave->configured_rx_mailbox_size);
+         != slave->configured_rx_mailbox_size);

     if (fsm->rx_last_packet ||
             (slave->configured_rx_mailbox_size - EC_MBOX_HEADER_SIZE
 <at>  <at>  -879,7 +879,7  <at>  <at> 

     fsm->jiffies_start = fsm->datagram->jiffies_sent;

-    ec_slave_mbox_prepare_check(fsm->slave, datagram); // can not fail.
+    ec_slave_mbox_prepare_check(slave, datagram); // can not fail.

     if (fsm->rx_last_packet) {
         fsm->rx_expected_packet_no = 0;
diff -r 9cdd7669dc0b master/fsm_foe.c
--- a/master/fsm_foe.c	Thu Jan 10 17:36:41 2013 +0100
+++ b/master/fsm_foe.c	Mon Jan 21 15:54:35 2013 +0100
 <at>  <at>  -418,7 +418,7  <at>  <at> 
         return;
     }

-    data = ec_slave_mbox_fetch(fsm->slave, datagram, &mbox_prot, &rec_size);
+    data = ec_slave_mbox_fetch(fsm->slave, fsm->datagram, &mbox_prot, &rec_size);
     if (IS_ERR(data)) {
         ec_foe_set_tx_error(fsm, FOE_PROT_ERROR);
         return;
 <at>  <at>  -498,7 +498,7  <at>  <at> 

     fsm->jiffies_start = fsm->datagram->jiffies_sent;

-    ec_slave_mbox_prepare_check(fsm->slave, datagram); // can not fail.
+    ec_slave_mbox_prepare_check(slave, datagram); // can not fail.

     fsm->retries = EC_FSM_RETRIES;
     fsm->state = ec_fsm_foe_state_ack_check;
 <at>  <at>  -536,7 +536,7  <at>  <at> 
         return;
     }

-    ec_slave_mbox_prepare_check(fsm->slave, datagram);
+    ec_slave_mbox_prepare_check(slave, datagram);
     fsm->jiffies_start = jiffies;
     fsm->retries = EC_FSM_RETRIES;
     fsm->state = ec_fsm_foe_state_ack_check;
 <at>  <at>  -632,7 +632,7  <at>  <at> 

     fsm->jiffies_start = fsm->datagram->jiffies_sent;

-    ec_slave_mbox_prepare_check(fsm->slave, datagram); // can not fail.
+    ec_slave_mbox_prepare_check(slave, datagram); // can not fail.

     fsm->retries = EC_FSM_RETRIES;
     fsm->state = ec_fsm_foe_state_data_check;
 <at>  <at>  -755,7 +755,7  <at>  <at> 
         return;
     }

-    data = ec_slave_mbox_fetch(slave, datagram, &mbox_prot, &rec_size);
+    data = ec_slave_mbox_fetch(slave, fsm->datagram, &mbox_prot, &rec_size);
     if (IS_ERR(data)) {
         ec_foe_set_rx_error(fsm, FOE_MBOX_FETCH_ERROR);
         return;
 <at>  <at>  -815,7 +815,7  <at>  <at> 

     fsm->rx_last_packet =
         (rec_size + EC_MBOX_HEADER_SIZE + EC_FOE_HEADER_SIZE
-         != fsm->slave->configured_rx_mailbox_size);
+         != slave->configured_rx_mailbox_size);

     if (fsm->rx_last_packet ||
             (slave->configured_rx_mailbox_size - EC_MBOX_HEADER_SIZE
 <at>  <at>  -879,7 +879,7  <at>  <at> 

     fsm->jiffies_start = fsm->datagram->jiffies_sent;

-    ec_slave_mbox_prepare_check(fsm->slave, datagram); // can not fail.
+    ec_slave_mbox_prepare_check(slave, datagram); // can not fail.

     if (fsm->rx_last_packet) {
         fsm->rx_expected_packet_no = 0;
vilian_ch | 17 Jan 12:22 2013

回复:etherlab-users Digest, Vol 68, Issue 7

 Hello,Raz
I have also used your vitrual slaves in kernel space.
In one pc, I just start the etherlab master(sudo /etc/init.d/ethercat start),
then in another pc,I insmod ecslave.ko with rxmac=XX:XX:XX:XX:XX:XX(in this pc, i did not start ethercat master)
I want to get some of the slave's infomation, so I just set command: ethercat sl in first pc, but I got nothing.
I also compile code in virtual_slave and start it in first pc.but got nothing.
I using ethercat master command to test ethercat frames, and found all frames are lost and the master can not get
responsed frames.
Can you give me some suggestions?
Thank you in advance!
vilian_ch
 

----- 原始邮件 -----
发件人:etherlab-users-request <at> etherlab.org
收件人:etherlab-users <at> etherlab.org
主题:etherlab-users Digest, Vol 68, Issue 7
日期:2013年01月17日 19点00分

<div>
<div>&nbsp;Hello,Raz</div>
<div>I have also used your vitrual slaves in kernel space.</div>
<div>In one pc, I just start the etherlab master(sudo /etc/init.d/ethercat start),</div>
<div>then in another pc,I insmod ecslave.ko with rxmac=XX:XX:XX:XX:XX:XX(in this pc, i did not start ethercat master)</div>
<div>I want to get some of the slave's infomation, so I just set command: ethercat sl in first pc, but I got nothing.</div>
<div>I also compile code in virtual_slave and start it in first pc.but got nothing.</div>
<div>I using ethercat master command to test ethercat frames, and found all frames are lost and the master can not get</div>
<div>responsed frames.</div>
<div>Can you give me some suggestions?</div>
<div>Thank you in advance!</div>
<div>vilian_ch</div>
<div>&nbsp;</div>
<br><div>
<div>----- &#21407;&#22987;&#37038;&#20214; -----<br>&#21457;&#20214;&#20154;&#65306;etherlab-users-request <at> etherlab.org<br>&#25910;&#20214;&#20154;&#65306;etherlab-users <at> etherlab.org<br>&#20027;&#39064;&#65306;etherlab-users Digest, Vol 68, Issue 7<br>&#26085;&#26399;&#65306;2013&#24180;01&#26376;17&#26085; 19&#28857;00&#20998;<br>
</div>
<br>
</div>
</div>

Gmane