18 Jun 2013 19:27
master: Fix instruction encoding for XMM shifts with immediate count
Paul Khuong <pkhuong <at> users.sourceforge.net>
2013-06-18 17:27:20 GMT
2013-06-18 17:27:20 GMT
The branch "master" has been updated in SBCL:
via 491b5526abbcb1cfac2274aa5c6dce33ee3ed7e4 (commit)
from d5c8232ed5dc81aea41d3b9e865189660bf45614 (commit)
- Log -----------------------------------------------------------------
commit 491b5526abbcb1cfac2274aa5c6dce33ee3ed7e4
Author: Paul Khuong <pvk <at> pvk.ca>
Date: Tue Jun 18 13:23:42 2013 -0400
Fix instruction encoding for XMM shifts with immediate count
x86 keeps getting more and more devious: the source/dest operand
is in the r/m field for these instructions, so REX.B must be set,
rather than REX.R, to access > xmm7. Intel's new documentation
seems clearer about these issues, at least.
---
src/compiler/x86-64/insts.lisp | 4 +++-
1 files changed, 3 insertions(+), 1 deletions(-)
diff --git a/src/compiler/x86-64/insts.lisp b/src/compiler/x86-64/insts.lisp
index 35f1c6e..7488457 100644
--- a/src/compiler/x86-64/insts.lisp
+++ b/src/compiler/x86-64/insts.lisp
<at> <at> -2983,7 +2983,9 <at> <at>
(aver (<= 0 /i 7))
(when prefix
(emit-byte segment prefix))
- (maybe-emit-rex-prefix segment operand-size dst/src nil nil)
+ ;; dst/src is encoded in the r/m field, not r; REX.B must be
+ ;; set to use extended XMM registers
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