Linux/SuperH kernel development ()

Guennadi Liakhovetski | 9 Feb 23:17

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[PATCH 1/2] usb: renesas_usbhs: (cosmetic) simplify list operations

Signed-off-by: Guennadi Liakhovetski <g.liakhovetski <at> gmx.de>
---
 drivers/usb/renesas_usbhs/fifo.c |    5 ++---
 1 files changed, 2 insertions(+), 3 deletions(-)

diff --git a/drivers/usb/renesas_usbhs/fifo.c b/drivers/usb/renesas_usbhs/fifo.c
index 72339bd..5d543e3 100644
--- a/drivers/usb/renesas_usbhs/fifo.c
+++ b/drivers/usb/renesas_usbhs/fifo.c
@@ -75,8 +75,7 @@ void usbhs_pkt_push(struct usbhs_pipe *pipe, struct usbhs_pkt *pkt,
 		pipe->handler = &usbhsf_null_handler;
 	}

-	list_del_init(&pkt->node);
-	list_add_tail(&pkt->node, &pipe->list);
+	list_move_tail(&pkt->node, &pipe->list);

 	/*
 	 * each pkt must hold own handler.
@@ -106,7 +105,7 @@ static struct usbhs_pkt *__usbhsf_pkt_get(struct usbhs_pipe *pipe)
 	if (list_empty(&pipe->list))
 		return NULL;

-	return list_entry(pipe->list.next, struct usbhs_pkt, node);
+	return list_first_entry(&pipe->list, struct usbhs_pkt, node);
 }

 struct usbhs_pkt *usbhs_pkt_pop(struct usbhs_pipe *pipe, struct usbhs_pkt *pkt)
--

-- 
1.7.2.5

(Continue reading)

Bastian Hecht | 8 Feb 13:16

[PATCH 1/7] mtd: sh_flctl: Update FLCMNCR register bit field

Updates the FLCMNCR bit field to match the newest hardware generation.
Some defines are added to select an appropriate clocking scheme.

Signed-off-by: Bastian Hecht <hechtb <at> gmail.com>
---
 include/linux/mtd/sh_flctl.h |   24 ++++++++++++++++++++++++
 1 files changed, 24 insertions(+), 0 deletions(-)

diff --git a/include/linux/mtd/sh_flctl.h b/include/linux/mtd/sh_flctl.h
index 9cf4c4c..ecbf3e6 100644
--- a/include/linux/mtd/sh_flctl.h
+++ b/include/linux/mtd/sh_flctl.h
@@ -67,6 +67,30 @@
 #define	CE0_ENABLE	(0x1 << 3)	/* Chip Enable 0 */
 #define	TYPESEL_SET	(0x1 << 0)

+/*
+ * Clock settings using the PULSEx registers from FLCMNCR
+ *
+ * Some hardware uses registers called PULSEx instead of FCKSEL_E and QTSEL_E
+ * to control the clock divider used between the High-Speed Peripheral Clock
+ * and the FLCTL internal clock. If so, use CLK_8_BIT_xxx for connecting 8 bit
+ * and CLK_16_BIT_xxx for connecting 16 bit bus bandwith NAND chips. For the 16
+ * bit version the divider is seperate for the pulse width of high and low
+ * signals.
+ */
+#define PULSE3	(0x1 << 27)
+#define PULSE2	(0x1 << 17)
+#define PULSE1	(0x1 << 15)
+#define PULSE0	(0x1 << 9)

(Continue reading)

Shimoda, Yoshihiro | 8 Feb 05:04

[PATCH] sh: add parameter for RSPI in clock-sh7757

Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh <at> renesas.com>
---
 arch/sh/kernel/cpu/sh4a/clock-sh7757.c |    4 +++-
 1 files changed, 3 insertions(+), 1 deletions(-)

diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7757.c b/arch/sh/kernel/cpu/sh4a/clock-sh7757.c
index 0fbff14..0bd21c8 100644
--- a/arch/sh/kernel/cpu/sh4a/clock-sh7757.c
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7757.c
@@ -79,7 +79,7 @@ struct clk div4_clks[DIV4_NR] = {
 #define MSTPCR1		0xffc80034
 #define MSTPCR2		0xffc10028

-enum { MSTP004, MSTP000, MSTP114, MSTP113, MSTP112,
+enum { MSTP004, MSTP000, MSTP127, MSTP114, MSTP113, MSTP112,
        MSTP111, MSTP110, MSTP103, MSTP102, MSTP220,
        MSTP_NR };

@@ -89,6 +89,7 @@ static struct clk mstp_clks[MSTP_NR] = {
 	[MSTP000] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 0, 0),

 	/* MSTPCR1 */
+	[MSTP127] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR1, 27, 0),
 	[MSTP114] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR1, 14, 0),
 	[MSTP113] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR1, 13, 0),
 	[MSTP112] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR1, 12, 0),
@@ -131,6 +132,7 @@ static struct clk_lookup lookups[] = {
 	CLKDEV_CON_ID("usb_fck", &mstp_clks[MSTP103]),
 	CLKDEV_DEV_ID("renesas_usbhs.0", &mstp_clks[MSTP102]),
 	CLKDEV_CON_ID("mmc0", &mstp_clks[MSTP220]),

(Continue reading)

Shimoda, Yoshihiro | 8 Feb 05:05

[PATCH] sh: add platform_device for RSPI in setup-sh7757

Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh <at> renesas.com>
---
 arch/sh/kernel/cpu/sh4a/setup-sh7757.c |   20 ++++++++++++++++++++
 1 files changed, 20 insertions(+), 0 deletions(-)

diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7757.c b/arch/sh/kernel/cpu/sh4a/setup-sh7757.c
index 2875e8b..c8836cf 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7757.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7757.c
@@ -680,6 +680,25 @@ static struct platform_device spi1_device = {
 	.resource	= spi1_resources,
 };

+static struct resource rspi_resources[] = {
+	{
+		.start	= 0xfe480000,
+		.end	= 0xfe4800ff,
+		.flags	= IORESOURCE_MEM,
+	},
+	{
+		.start	= 220,
+		.flags	= IORESOURCE_IRQ,
+	},
+};
+
+static struct platform_device rspi_device = {
+	.name	= "rspi",
+	.id	= 2,
+	.num_resources	= ARRAY_SIZE(rspi_resources),
+	.resource	= rspi_resources,

(Continue reading)

Guennadi Liakhovetski | 2 Feb 23:12

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[PATCH] PM: provide a dummy dev_gpd_data() when generic domains are not used

dev_gpd_data() is a generic macro, also useful for drivers. Hence it should
be available also when CONFIG_PM_GENERIC_DOMAINS is not selected. OTOH,
to_gpd_data() is so far unused outside of the generic PM domain code and
does not seem to be very useful without CONFIG_PM_GENERIC_DOMAINS.

Signed-off-by: Guennadi Liakhovetski <g.liakhovetski <at> gmx.de>
---
 include/linux/pm_domain.h |    6 +++++-
 1 files changed, 5 insertions(+), 1 deletions(-)

diff --git a/include/linux/pm_domain.h b/include/linux/pm_domain.h
index a03a0ad..f1a5f8b 100644
--- a/include/linux/pm_domain.h
+++ b/include/linux/pm_domain.h
@@ -99,12 +99,12 @@ struct generic_pm_domain_data {
 	bool need_restore;
 };

+#ifdef CONFIG_PM_GENERIC_DOMAINS
 static inline struct generic_pm_domain_data *to_gpd_data(struct pm_domain_data *pdd)
 {
 	return container_of(pdd, struct generic_pm_domain_data, base);
 }

-#ifdef CONFIG_PM_GENERIC_DOMAINS
 static inline struct generic_pm_domain_data *dev_gpd_data(struct device *dev)
 {
 	return to_gpd_data(dev->power.subsys_data->domain_data);
@@ -195,6 +195,10 @@ static inline bool default_stop_ok(struct device *dev)
 	return false;

(Continue reading)

Guennadi Liakhovetski | 1 Feb 13:48

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Re: [REGRESSION] current Linus tree doesn't suspend on sh7372 (mackerel)

Hi Rafael

On Wed, 1 Feb 2012, Rafael J. Wysocki wrote:

> Hi,
> 
> On Tuesday, January 31, 2012, Guennadi Liakhovetski wrote:
> > Hi
> > 
> > Current Linus' tree doesn't suspend on mackerel for me (will send .config 
> > and the command line off-list).
> 
> You seem to have MTD enabled in your .config and there's a known suspend
> regression in MTD.  Can you please check if the attached patch helps?

Yes, it does, thanks! Or it does at least partially - if MERAM is enabled 
the fb content is destroyed after resume, which is a separate problem, 
apparently.

Thanks
Guennadi
---
Guennadi Liakhovetski, Ph.D.
Freelance Open-Source Software Developer
http://www.open-technology.de/
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(Continue reading)

Mr. David M Lee | 1 Feb 12:51

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Hello This is Mr. David M Lee from Bank of America I have by information you that we receiver an ATM card on your name so you have to get back to this office as soon as you receiver this mail today so that we will let you know what to do next okay?

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Rob Herring | 31 Jan 20:46

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[PULL] ARM mach/irqs.h cleanup for 3.4

Russell,

Can you please pull mach/irqs.h clean-up for 3.4. I've gotten little to
no response from the affected platform maintainers. It's primarily
superh and shmobile that have any significant changes though.

Rob

The following changes since commit dcd6c92267155e70a94b3927bce681ce74b80d1f:

  Linux 3.3-rc1 (2012-01-19 15:04:48 -0800)

are available in the git repository at:
  git://sources.calxeda.com/kernel/linux.git sparse_irq

Jamie Iles (1):
      ARM: picoxcell: remove mach/irqs.h

Rob Herring (13):
      irq: make SPARSE_IRQ an optionally hidden option
      sound: pxa2xx-ac97: include mach/irqs.h directly
      gpio: pxa: explicitly include mach/irqs.h
      ARM: remove mc146818rtc.h from time.c
      ARM: mc146818rtc: remove unnecessary include of mach/irqs.h
      ARM: it8152: explicitly include mach/irqs.h
      sh: intc: unify evt2irq/irq2evt macros for sh and arm
      sh: intc: remove dependency on NR_IRQS
      ARM: mmp: remove NR_IRQS
      ARM: pxa: remove NR_IRQS
      ARM: shmobile: remove NR_IRQS

(Continue reading)

Michael S. Tsirkin | 30 Jan 13:18

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[PATCH 0/3] arch: fix ioport mapping on mips,sh

Kevin Cernekee reported that recent cleanup
that replaced pci_iomap with a generic function
failed to take into account the differences
in io port handling on mips and sh architectures.

Rather than revert the changes reintroducing the
code duplication, this patchset fixes this
by adding ability for architectures to override
ioport mapping for pci devices.

I put this in my tree that feeds into linux-next
and intend to ask Linus to pull this fix if this
doesn't cause any issues and there are no objections.

The patches were tested on x86 and compiled on mips and sh.
Would appreciate reviews/acks/testing reports.

Michael S. Tsirkin (3):
  lib: add NO_GENERIC_PCI_IOPORT_MAP
  mips: use the the PCI controller's io_map_base
  sh: use the the PCI channels's io_map_base

 arch/mips/Kconfig               |    1 +
 arch/mips/lib/iomap-pci.c       |    4 ++--
 arch/sh/Kconfig                 |    1 +
 arch/sh/drivers/pci/pci.c       |    4 ++--
 include/asm-generic/pci_iomap.h |    5 +++++
 lib/Kconfig                     |    3 +++
 lib/pci_iomap.c                 |   12 +++++++++++-
 7 files changed, 25 insertions(+), 5 deletions(-)

(Continue reading)

Magnus Damm | 30 Jan 03:25

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[PATCH] ARM: mach-shmobile: r8a7779 PFC IPSR4 fix

From: Magnus Damm <damm <at> opensource.se>

Fix the bit field width information for the IPSR4 register
in the r8a7779 pin function controller (PFC).

Without this fix the Marzen board fails to receive data
over the serial console due to misconfigured pin function
for the RX pin.

Signed-off-by: Magnus Damm <damm <at> opensource.se>
---

 arch/arm/mach-shmobile/pfc-r8a7779.c |    2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

--- 0001/arch/arm/mach-shmobile/pfc-r8a7779.c
+++ work/arch/arm/mach-shmobile/pfc-r8a7779.c	2012-01-27 16:04:07.000000000 +0900
@@ -2120,7 +2120,7 @@ static struct pinmux_cfg_reg pinmux_conf
 	    FN_AUDATA3, 0, 0, 0 }
 	},
 	{ PINMUX_CFG_REG_VAR("IPSR4", 0xfffc0030, 32,
-			     3, 1, 1, 1, 1, 1, 1, 3, 3, 1,
+			     3, 1, 1, 1, 1, 1, 1, 3, 3,
 			     1, 1, 1, 1, 1, 1, 3, 3, 3, 2) {
 	    /* IP4_31_29 [3] */
 	    FN_DU1_DB0, FN_VI2_DATA4_VI2_B4, FN_SCL2_B, FN_SD3_DAT0,
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(Continue reading)

Magnus Damm | 30 Jan 03:03

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[PATCH] ARM: mach-shmobile: sh73a0 PSTR 32-bit access fix

From: Magnus Damm <damm <at> opensource.se>

Convert the sh73a0 SMP code to use 32-bit PSTR access.

This fixes wakeup from deep sleep for sh73a0 secondary CPUs.

Signed-off-by: Magnus Damm <damm <at> opensource.se>
---

 arch/arm/mach-shmobile/smp-sh73a0.c |    2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

--- 0009/arch/arm/mach-shmobile/smp-sh73a0.c
+++ work/arch/arm/mach-shmobile/smp-sh73a0.c	2012-01-26 14:37:04.000000000 +0900
@@ -84,7 +84,7 @@ int __cpuinit sh73a0_boot_secondary(unsi
 	/* enable cache coherency */
 	modify_scu_cpu_psr(cpu, 0);

-	if (((__raw_readw(__io(PSTR)) >> (4 * cpu)) & 3) == 3)
+	if (((__raw_readl(__io(PSTR)) >> (4 * cpu)) & 3) == 3)
 		__raw_writel(1 << cpu, __io(WUPCR));	/* wake up */
 	else
 		__raw_writel(1 << cpu, __io(SRESCR));	/* reset */
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Recent entries

[PATCH 1/2] usb: renesas_usbhs: (cosmetic) simplify list operations (9 Feb 23:17)
[PATCH 1/7] mtd: sh_flctl: Update FLCMNCR register bit field (8 Feb 13:16)
[PATCH] sh: add parameter for RSPI in clock-sh7757 (8 Feb 05:04)
[PATCH] sh: add platform_device for RSPI in setup-sh7757 (8 Feb 05:05)
[PATCH] PM: provide a dummy dev_gpd_data() when generic domains are no (2 Feb 23:12)
[REGRESSION] current Linus tree doesn't suspend on sh7372 (mackerel) (1 Feb 13:48)
Hello This is Mr. David M Lee from Bank of America I have by informat (1 Feb 12:51)
[PULL] ARM mach/irqs.h cleanup for 3.4 (31 Jan 20:46)
[PATCH 0/3] arch: fix ioport mapping on mips,sh (30 Jan 13:18)
[PATCH] ARM: mach-shmobile: r8a7779 PFC IPSR4 fix (30 Jan 03:25)
[PATCH] ARM: mach-shmobile: sh73a0 PSTR 32-bit access fix (30 Jan 03:03)
[PATCH] sh: ecovec: switch SDHI controllers to card polling (28 Jan 19:36)
[PATCH 2/2] sh: add platform_device for SPI1 in setup-sh7757 (26 Jan 09:44)
[PATCH 1/2] sh: modify resource for SPI0 in setup-sh7757 (26 Jan 09:44)
[PATCH] spi: spi-sh: add IORESOURCE_MEM_TYPE_MASK decoding for access (26 Jan 09:43)
[PATCH] irq: make SPARSE_IRQ an optionally hidden option (26 Jan 03:58)
[PATCH v2] sh: se7724: fix compile breakage (25 Jan 22:07)
[PATCH] sh: se7724: fix compile breakage (25 Jan 09:10)
[PATCH 00/11 v2] mmc: tmio/sdhi: hotplug & PM (24 Jan 13:01)
[PATCH] ARM: mach-shmobile: add GPIO-to-IRQ translation to sh7372 (23 Jan 15:52)
[PATCH] ARM: mach-shmobile: clock-sh73a0: add DSIxPHY clock support (23 Jan 06:10)

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