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Benjamin Herrenschmidt | 1 Sep 2008 02:27

Re: [PATCH] powerpc: Avoid integer overflow in page_is_ram()

On Fri, 2008-08-29 at 20:39 -0700, Roland Dreier wrote:
> Commit 8b150478 ("ppc: make phys_mem_access_prot() work with pfns
> instead of addresses") fixed page_is_ram() in arch/ppc to avoid overflow
> for addresses above 4G on 32-bit kernels.  However arch/powerpc's
> page_is_ram() is missing the same fix -- it computes a physical address
> by doing pfn << PAGE_SHIFT, which overflows if pfn corresponds to a page
> above 4G.
> 
> In particular this causes pages above 4G to be mapped with the wrong
> caching attribute; for example many ppc440-based SoCs have PCI space
> above 4G, and mmap()ing MMIO space may end up with a mapping that has
> caching enabled.
> 
> Fix this by working with the pfn and avoiding the conversion to
> physical address that causes the overflow.  This patch compares the
> pfn to max_pfn, which is a semantic change from the old code -- that
> code compared the physical address to high_memory, which corresponds
> to max_low_pfn.  However, I think that was is another bug, since
> highmem pages are still RAM.
> 
> Reported-by: vb <vb <at> vsbe.com>
> Signed-off-by: Roland Dreier <rolandd <at> cisco.com>

Acked-by: Benjamin Herrenschmidt <benh <at> kernel.crashing.org>

> ---
> This is a fix but the bug is pretty long-standing -- I think this is
> 2.6.28 material.
> 
>  arch/powerpc/mm/mem.c |    5 ++---
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SETTE AGOSTINO - technolabs | 1 Sep 2008 11:02
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RE: MPC8568MDS RAMDISK Problem

Hi Anatolij,

First of all thanks for your help. I modified the mpc8568mds_defconfig

>> cat kernel/linux/arch/powerpc/configs/mpc8568mds_defconfig
#
# Automatically generated make config: don't edit
# Linux kernel version: 2.6.25.5
# Mon Sep  1 10:01:48 2008
#
# CONFIG_PPC64 is not set

#
# Processor support
#
# CONFIG_6xx is not set
CONFIG_PPC_85xx=y
# CONFIG_PPC_8xx is not set
# CONFIG_40x is not set
# CONFIG_44x is not set
# CONFIG_E200 is not set
CONFIG_E500=y
CONFIG_BOOKE=y
CONFIG_FSL_BOOKE=y
CONFIG_FSL_EMB_PERFMON=y
# CONFIG_PHYS_64BIT is not set
CONFIG_SPE=y
# CONFIG_PPC_MM_SLICES is not set
CONFIG_PPC32=y
CONFIG_WORD_SIZE=32
(Continue reading)

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yanlong wang | 1 Sep 2008 11:18
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MPC8568MDS RAMDISK Problem

 Hi:
     ram0: rw=0, want=1345772050, limit=1000000, this error cause by
Device Drivers->block device-> ramdisk size
     make ramdisk size bigger~~~~
regards:)
yanlong
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Detlev Zundel | 1 Sep 2008 16:42
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Re: Compile new kernel for 5200B w/ ELDK

Hi Albrecht,

> please excuse a probably really dumb question about compiling a new  
> kernel for a Freescale 5200B using the ELDK 4.2...
>
> I am playing with a Lite5200B eval board.  The software coming from  
> Freescale, including an older kernel (2.6.16.11-rt18), works fine.
>
> I installed ELDK 4.2 on a FC box, and first compiled u-boot 1.3.4.   
> Wrote it to flash, and it works nicely afaict.
>
> Then I compiled the 2.6.24.2 kernel coming with the ELDK, using the  
> commands "make ARCH=powerpc CROSS_COMPILE=ppc_6xx- lite5200_defconfig ;  
> make ARCH=powerpc CROSS_COMPILE=ppc_6xx- uImage".  The kernel loads,  
> decompresses, but then there is no output any more after "Uncompressing  
> Kernel Image ... OK".  The u-boot environment contains (quoted from  
> printenv) "bootargs=console=ttyPSC0,115200 root=/dev/mtdblock0 rw  
> rootfstype=jffs2 verbose" (and, again, the Freescale kernel is not  
> silent).
>
> I found a message which stated that I should include
>
> <snip>
>          chosen {
>                  linux,stdout-path = "/soc5200 <at> f0000000/serial <at> 2000";
> 	};
> </snip>
>
> in the file arch/powerpc/boot/dts/lite5200.dts.  Recompiled, but  
> without success.  I believe it's a minor tweak I need to add, but I
(Continue reading)

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Rajasekaran Kaliyaperumal, Chennai | 1 Sep 2008 17:40
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RE: Compile new kernel for 5200B w/ ELDK


Dear Detlev...
     Am working with PowerPc 8315rdb...and ma using recend version of
the kernel 2.6.26..but I found one problem with RTC m41t11..while trying
to read or set RTC which is already opened while booting itself,,,its
return the error message as resourse busy  with error no 29.. can u help
me to solve this issue,,,
 With Regards
 Rajasekaran..
 HCLT.India.

-----Original Message-----
From: linuxppc-embedded-bounces+rajasekaran.k=hcl.in <at> ozlabs.org
[mailto:linuxppc-embedded-bounces+rajasekaran.k=hcl.in <at> ozlabs.org] On
Behalf Of Detlev Zundel
Sent: Monday, September 01, 2008 8:12 PM
To: linuxppc-embedded <at> ozlabs.org
Subject: Re: Compile new kernel for 5200B w/ ELDK

Hi Albrecht,

> please excuse a probably really dumb question about compiling a new  
> kernel for a Freescale 5200B using the ELDK 4.2...
>
> I am playing with a Lite5200B eval board.  The software coming from  
> Freescale, including an older kernel (2.6.16.11-rt18), works fine.
>
> I installed ELDK 4.2 on a FC box, and first compiled u-boot 1.3.4.   
> Wrote it to flash, and it works nicely afaict.
>
(Continue reading)

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Laxmikant Rashinkar | 2 Sep 2008 03:21
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need help with GPIO

Hi,

I have a MPC8347 based embedded PC running Linux 2.6.27.
I am trying to access a NAND device connected to the LBC and UPM.
The Ready/Busy* pin of the NAND device is connected to the built in GPIO-1 on pin 4 (input).

When I try to access the NAND device, the function of_get_gpio() from drivers/of/gpio.c gets called, and
it reports that my GPIO is not registered. Here are the actual debug messages:

LK_DEBUG: gpio.c : of_get_gpio : name=upm type=<NULL> index=0
LK_DEBUG: gpio.c : of_get_gpio : got property
LK_DEBUG: gpio.c : of_get_gpio : nr_cell=3
LK_DEBUG: gpio.c : of_get_gpio : gc.name=gpio-controller gc.type=<NULL> gc->Data=0x0
LK_DEBUG: gpio.c : of_get_gpio : /localbus/upm <at> 1,0: gpio controller /soc8349 <at> e0000000/gpio-controller <at> e0000c00: is not registered

When I check in /proc/device-tree/soc8349 <at> e0000000/, I find that entries are present for both GPIOs are present.

Here are debug registration messages, indicating that gpio registered successfully:

##### LK_DEBUG: of_plat_dev_create : NAME=soc8349
##### LK_DEBUG: of_plat_dev_create : NAME=wdt
##### LK_DEBUG: of_plat_dev_create : NAME=i2c
##### LK_DEBUG: of_plat_dev_create : NAME=i2c
##### LK_DEBUG: of_plat_dev_create : NAME=spi
##### LK_DEBUG: of_plat_dev_create : NAME=dma
##### LK_DEBUG: of_plat_dev_create : NAME=usb
##### LK_DEBUG: of_plat_dev_create : NAME=usb
##### LK_DEBUG: of_plat_dev_create : NAME=mdio
##### LK_DEBUG: of_plat_dev_create : NAME=ethernet
##### LK_DEBUG: of_ plat_dev_create : NAME=ethernet
##### LK_DEBUG: of_plat_dev_create : NAME=serial
##### LK_DEBUG: of_plat_dev_create : NAME=serial
##### LK_DEBUG: of_plat_dev_create : NAME=crypto
##### LK_DEBUG: of_plat_dev_create : NAME=pic
##### LK_DEBUG: of_plat_dev_create : NAME=gpio-controller
##### LK_DEBUG: of_plat_dev_create : NAME=gpio-controller
##### LK_DEBUG: of_plat_dev_create : NAME=localbus
##### LK_DEBUG: of_plat_dev_create : NAME=upm

Most probably something is wrong in my device tree (listed below). Can someone please point me in the right direction?

thanks a lot for your help.
LK

-------------------------------------------------------------

/*
 * MPC8349E MDS Device Tree Source
 *
 * Copyright 2005, 2006 Freescale Semiconductor Inc.
 *
 * This program is free software; you can redistribute  it and/or modify it
 * under  the term s of  the GNU General  Public License as published by the
 * Free Software Foundation;  either version 2 of the  License, or (at your
 * option) any later version.
 */

/dts-v1/;

/ {
        model = "MPC8349EMDS";
        compatible = "MPC8349EMDS", "MPC834xMDS", "MPC83xxMDS";
        #address-cells = <1>;
        #size-cells = <1>;

        aliases {
                ethernet0 = &enet0;
                ethernet1 = &enet1;
                serial0 = &serial0;
                serial1 = &serial1;
                pci0 = &pci0;
                pci1 = &pci1;
        };

        cpus {
                #address-cells = <1>;
                #size-cells = <0>;

                PowerPC,8349 <at> 0 {
                         device_type = "cpu";
                        reg = <0x0>;
                        d-cache-line-size = <32>;
                        i-cache-line-size = <32>;
                        d-cache-size = <32768>;
                         i-cache-size = <32768>;
                        timebase-frequency = <0>;       // from bootloader
                        bus-frequency = <0>;            // from bootloader
                        clock-frequency = <0>;          // from bootloader
                 };
        };

        memory {
                device_type = "memory";
                reg = <0x00000000 0x10000000>;  // 256MB at 0
        };

        bcsr <at> e2400000 {
                device_type = "board-control";
                reg = <0xe2400000 0x8000>;
        };

        soc8349 <at> e0000000 {
      &nbs p;         #address-cells = <1>;
                #size-cells = <1>;
                device_type = "soc";
                compatible = "simple-bus";
                ranges = <0x0 0xe0000000 0x00100000>;
                reg = <0xe0000000 0x00000200>;
                bus-frequency = <0>;

                 wdt <at> 200 {
                        device_type = "watchdog";
                        compatible = "mpc83xx_wdt";
                        reg = <0x200 0x100>;
                };

                i2c <at> 3000 {
             &nb sp;          #address-cells = <1>;
                        #size-cells = <0>;
                        cell-index = <0>;
                        compatible = "fsl-i2c";
                        reg = <0x3000 0x100>;
                   &n bsp;    interrupts = <14 0x8>;
                        interrupt-parent = <&ipic>;
                        dfsrr;

                        rtc <at> 68 {
                                compatible = "dallas,ds1374";
             &nbsp ;                  reg = <0x68>;
                        };
                };

                i2c <at> 3100 {
                        #address-cells = <1>;
                        #size-cells = <0>;
               &nbs p;        cell-index = <1>;
                        compatible = "fsl-i2c";
                        reg = <0x3100 0x100>;
                        interrupts = <15 0x8>;
                        interrupt-parent = <&ipic>;
                &n bsp;       dfsrr;
                };

                spi <at> 7000 {
                        cell-index = <0>;
                        compatible = "fsl,spi";
                        reg = <0x7000 0x1000>;
                        interrupts = <16 0x8>;
 &nbs p;                      interrupt-parent = <&ipic>;
                        mode = "cpu";
                };

                dma <at> 82a8 {
                        #address-cells = <1>;
                        #size-cells = <1>;
                         compatible = "fsl,mpc8349-dma", "fsl,elo-dma";
                        reg = <0x82a8 4>;
                        ranges = <0 0x8100 0x1a8>;
                        interrupt-parent = <&ipic>;
                        interrupts = <71 8>;
               & nbsp;        cell-index = <0>;
                        dma-channel <at> 0 {
                                compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
                                reg = <0 0x80>;
                                 interrupt-parent = <&ipic>;
                                interrupts = <71 8>;
                        };
                        dma-channel <at> 80 {
                                compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
                                reg = <0x80 0x80>;
                                interrupt-parent = <&ipic>;
                                interrupts = <71 8>;
                  &nbsp ;     };
                        dma-channel <at> 100 {
                                compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
                                reg = <0x100 0x80>;
                           &n bsp;    interrupt-parent = <&ipic>;
                                interrupts = <71 8>;
                        };
                        dma-channel <at> 180 {
                                compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
                                reg = <0x180 0x28>;
                                interrupt-parent = <&ipic>;
                                interrupts = <71 8>;
                  &nbs p;     };
                };

                /* phy type (ULPI or SERIAL) are only types supported for MPH */
                /* port = 0 or 1 */
                usb <at> 22000 {
                        compatible = "fsl-usb2-mph";
                        reg = <0x22000 0x1000>;
           & nbsp;            #address-cells = <1>;
                        #size-cells = <0>;
                        interrupt-parent = <&ipic>;
                        interrupts = <39 0x8>;
                        phy_type = "ulpi";
                 &nbs p;      port1;
                };
                /* phy type (ULPI, UTMI, UTMI_WIDE, SERIAL) */
                usb <at> 23000 {
                        compatible = "fsl-usb2-dr";
                        reg = <0x23000 0x1000>;
                        #address-cells = <1>;
     &nbs p;                  #size-cells = <0>;
                        interrupt-parent = <&ipic>;
                        interrupts = <38 0x8>;
                        dr_mode = "otg";
                        phy_type = "ulpi";
                };

  & nbsp;             mdio <at> 24520 {
                        #address-cells = <1>;
                        #size-cells = <0>;
                        compatible = "fsl,gianfar-mdio";
                        reg = <0x24520 0x20>;

                         phy0: ethernet-phy <at> 0 {
                                interrupt-parent = <&ipic>;
                                interrupts = <17 0x8>;
                                reg = <0x1>;
                                 device_type = "ethernet-phy";
                        };
                        phy1: ethernet-phy <at> 1 {
                                interrupt-parent = <&ipic>;
                                interrupts = <18 0x8>;
   &nbsp ;                            reg = <0x2>;
                                device_type = "ethernet-phy";
                        };
                };

                enet0: ethernet <at> 24000 {
                        cell-index = <0>;
     & nbsp;                  device_type = "network";
                        model = "TSEC";
                        compatible = "gianfar";
                        reg = <0x24000 0x1000>;
                        local-mac-address = [ 00 00 00 00 00 00 ];
                 &n bsp;      interrupts = <32 0x8 33 0x8 34 0x8>;
                        interrupt-parent = <&ipic>;
                        phy-handle = <&phy0>;
                        linux,network-index = <0>;
                };

                enet1: ethernet <at> 25000 {
      &nb sp;                 cell-index = <1>;
                        device_type = "network";
                        model = "TSEC";
                        compatible = "gianfar";
                        reg = <0x25000 0x1000>;
                    &n bsp;   local-mac-address = [ 00 00 00 00 00 00 ];
                        interrupts = <35 0x8 36 0x8 37 0x8>;
                        interrupt-parent = <&ipic>;
                        phy-handle = <&phy1>;
                        linux,network-index = <1>;
             & nbsp;  };

                serial0: serial <at> 4500 {
                        cell-index = <0>;
                        device_type = "serial";
                        compatible = "ns16550";
                        reg = <0x4500 0x100>;
                         clock-frequency = <0>;
                        interrupts = <9 0x8>;
                        interrupt-parent = <&ipic>;
                };

                serial1: serial <at> 4600 {
                        cell-index = <1>;
        &nb sp;               device_type = "serial";
                        compatible = "ns16550";
                        reg = <0x4600 0x100>;
                        clock-frequency = <0>;
                        interrupts = <10 0x8>;
                         interrupt-parent = <&ipic>;
                };

                crypto <at> 30000 {
                        compatible = "fsl,sec2.0";
                        reg = <0x30000 0x10000>;
                        interrupts = <11 0x8>;
                        interrupt-parent = <& ipic>;
                        fsl,num-channels = <4>;
                        fsl,channel-fifo-len = <24>;
                        fsl,exec-units-mask = <0x7e>;
                        fsl,descriptor-types-mask = <0x01010ebf>;
                };

                /* IPIC
     &nbsp ;           * interrupts cell = <intr #, sense>
                 * sense values match linux IORESOURCE_IRQ_* defines:
                 * sense == 8: Level, low assertion
                 * sense == 2: Edge, high-to-low change
                 */
                ipic: pic <at> 700 {
                        interru pt-controller;
                        #address-cells = <0>;
                        #interrupt-cells = <2>;
                        reg = <0x700 0x100>;
                        device_type = "ipic";
                };

                gpio1: gpio-controller <at> e0000c00 {
     &nbs p;                  #gpio-cells = <2>;
                        compatible = "fsl,mpc8349-gpio-bank";
                        reg = <0xe0000c00 0x100>;
                        gpio-controller;
                };

                gpio2: gpio-controller <at> e0000d00 {
       & nbsp;                #gpio-cells = <2>;
                        compatible = "fsl,mpc8349-gpio-bank";
                        reg = <0xe0000d00 0x100>;
                        gpio-controller;
                };
        };

        localbus {
          &nbsp ;     compatible = "fsl,pq3-localbus", "simple-bus";
                #address-cells = <2>;
                #size-cells = <1>;
                reg = <0xe0005000 0x100000>;       // BRx, ORx, etc.

                upm <at> 1,0 {
                        #address-cells = <1>;
                        #size-cells = <1>;
   &nb sp;                    compatible = "fsl,upm-nand";
                        reg = <3 0xa0000000 0x800>;
                        fsl,upm-addr-offset = <0x10>;
                        fsl,upm-cmd-offset = <0x08>;
                        gpios = <&gpio1 4 0>;

           &nbsp ;            nand <at> 0 {
                                #address-cells = <1>;
                                #size-cells = <1>;
                                compatible = "fsl,lbc-nand";

                                 partition <at> 0 {
                                        label = "EVERYTHING";
                                        reg = <0x00000000 0x01000000>;
                                };
                         };
                };
        };

        pci0: pci <at> e0008500 {
                cell-index = <1>;
                interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
                interrupt-map = <

                                /* IDSEL 0x11 */
                                 0x8800 0x0 0x0 0x1 &ipic 20 0x8
                                 0x8800 0x0 0x0 0x2 &ipic 21 0x8
                                 0x8800 0x0 0x0 0x3 &ipic 22 0x8
                & nbsp;                0x8800 0x0 0x0 0x4 &ipic 23 0x8

                                /* IDSEL 0x12 */
                                 0x9000 0x0 0x0 0x1 &ipic 22 0x8
                                 0x9000 0x0 0x0 0x2 &ipic 23 0x8
                   &nb sp;             0x9000 0x0 0x0 0x3 &ipic 20 0x8
                                 0x9000 0x0 0x0 0x4 &ipic 21 0x8

                                /* IDSEL 0x13 */
                                 0x9800 0x0 0x0 0x1 &ipic 23 0x8
                   &nb sp;             0x9800 0x0 0x0 0x2 &ipic 20 0x8
                                 0x9800 0x0 0x0 0x3 &ipic 21 0x8
                                 0x9800 0x0 0x0 0x4 &ipic 22 0x8

                                /* IDSEL 0x15 */
                   &nb sp;             0xa800 0x0 0x0 0x1 &ipic 20 0x8
                                 0xa800 0x0 0x0 0x2 &ipic 21 0x8
                                 0xa800 0x0 0x0 0x3 &ipic 22 0x8
                                 0xa800 0x0 0x0 0x4 &ipic 23 0x8

               &n bsp;                /* IDSEL 0x16 */
                                 0xb000 0x0 0x0 0x1 &ipic 23 0x8
                                 0xb000 0x0 0x0 0x2 &ipic 20 0x8
                                 0xb000 0x0 0x0 0x3 &ipic 21 0x8
                & nbsp;                0xb000 0x0 0x0 0x4 &ipic 22 0x8

                                /* IDSEL 0x17 */
                                 0xb800 0x0 0x0 0x1 &ipic 22 0x8
                                 0xb800 0x0 0x0 0x2 &ipic 23 0x8
                   &nb sp;             0xb800 0x0 0x0 0x3 &ipic 20 0x8
                                 0xb800 0x0 0x0 0x4 &ipic 21 0x8

                                /* IDSEL 0x18 */
                                 0xc000 0x0 0x0 0x1 &ipic 21 0x8
                   &nb sp;             0xc000 0x0 0x0 0x2 &ipic 22 0x8
                                 0xc000 0x0 0x0 0x3 &ipic 23 0x8
                                 0xc000 0x0 0x0 0x4 &ipic 20 0x8>;
                interrupt-parent = <&ipic>;
                interrupts = <66 0x8>;
           &n bsp;    bus-range = <0 0>;
                ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000
                          0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
                          0x01000000 0x0 0x00000000 0xe2000000 0x0 0x00100000>;
                clock-frequency = <66666666>;
                #interrupt-cells = <1>;
                 #size-cells = <2>;
                #address-cells = <3>;
                reg = <0xe0008500 0x100>;
                compatible = "fsl,mpc8349-pci";
                device_type = "pci";
        };

        pci1: pci <at> e0008600 {
                cell-index = <2>;
                interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
      & nbsp;         interrupt-map = <

                                /* IDSEL 0x11 */
                                 0x8800 0x0 0x0 0x1 &ipic 20 0x8
                                 0x8800 0x0 0x0 0x2 &ipic 21 0x8
                   &n bsp;             0x8800 0x0 0x0 0x3 &ipic 22 0x8
                                 0x8800 0x0 0x0 0x4 &ipic 23 0x8

                                /* IDSEL 0x12 */
                                 0x9000 0x0 0x0 0x1 &ipic 22 0x8
                   &nb sp;             0x9000 0x0 0x0 0x2 &ipic 23 0x8
                                 0x9000 0x0 0x0 0x3 &ipic 20 0x8
                                 0x9000 0x0 0x0 0x4 &ipic 21 0x8

                                /* IDSEL 0x13 */
                   &nb sp;             0x9800 0x0 0x0 0x1 &ipic 23 0x8
                                 0x9800 0x0 0x0 0x2 &ipic 20 0x8
                                 0x9800 0x0 0x0 0x3 &ipic 21 0x8
                                 0x9800 0x0 0x0 0x4 &ipic 22 0x8

               &n bsp;                /* IDSEL 0x15 */
                                 0xa800 0x0 0x0 0x1 &ipic 20 0x8
                                 0xa800 0x0 0x0 0x2 &ipic 21 0x8
                                 0xa800 0x0 0x0 0x3 &ipic 22 0x8
                & nbsp;                0xa800 0x0 0x0 0x4 &ipic 23 0x8

                                /* IDSEL 0x16 */
                                 0xb000 0x0 0x0 0x1 &ipic 23 0x8
                                 0xb000 0x0 0x0 0x2 &ipic 20 0x8
                   &nb sp;             0xb000 0x0 0x0 0x3 &ipic 21 0x8
                                 0xb000 0x0 0x0 0x4 &ipic 22 0x8

                                /* IDSEL 0x17 */
                                 0xb800 0x0 0x0 0x1 &ipic 22 0x8
                   &nb sp;             0xb800 0x0 0x0 0x2 &ipic 23 0x8
                                 0xb800 0x0 0x0 0x3 &ipic 20 0x8
                                 0xb800 0x0 0x0 0x4 &ipic 21 0x8

                                /* IDSEL 0x18 */
                   &nb sp;             0xc000 0x0 0x0 0x1 &ipic 21 0x8
                                 0xc000 0x0 0x0 0x2 &ipic 22 0x8
                                 0xc000 0x0 0x0 0x3 &ipic 23 0x8
                                 0xc000 0x0 0x0 0x4 &ipic 20 0x8>;
                interrupt-parent = <&ipic>;
                interrupts = <67 0x8>;
                bus-range = <0 0>;
                ranges = <0x02000000 0x0 0xb0000000 0xb0000000 0x0 0x10000000
                          0x42000000 0x0 0xa0000000 0xa0000000 0x0 0x10000000
                          0x01000000 0x0 0x00000000 0xe2100000 0x0 0x00100000>;
                c lock-frequency = <66666666>;
                #interrupt-cells = <1>;
                #size-cells = <2>;
                #address-cells = <3>;
                reg = <0xe0008600 0x100>;
                compatible = "fsl,mpc8349-pci";
                device_type = "pci";
        };

        chosen {
           &nb sp;    linux,stdout-path = &serial0;
        };
};





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VenkataKrishna | 2 Sep 2008 07:26

How work ELDK4.0 in linux

 

I installed ELDK 4.0 in linux host system. Now I want to develop linux BSP for my target Board (MPC8260) free scale. Any one suggest me How to works and sequence of compiling linux BSP.

 

Thanks and Regard’s

Venkatakrishna. 

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Marco Stornelli | 2 Sep 2008 08:39
Picon

Re: need help with GPIO

Laxmikant Rashinkar ha scritto:
> Hi,
> 
> I have a MPC8347 based embedded PC running Linux 2.6.27.
> I am trying to access a NAND device connected to the LBC and UPM.
> The Ready/Busy* pin of the NAND device is connected to the built in GPIO-1 on pin 4 (input).
> 
> When I try to access the NAND device, the function of_get_gpio() from drivers/of/gpio.c gets called, and
> it reports that my GPIO is not registered. Here are the actual debug messages:
> 
> LK_DEBUG: gpio.c : of_get_gpio : name=upm type=<NULL> index=0
> LK_DEBUG: gpio.c : of_get_gpio : got property
> LK_DEBUG: gpio.c : of_get_gpio : nr_cell=3
> LK_DEBUG: gpio.c : of_get_gpio : gc.name=gpio-controller gc.type=<NULL> gc->Data=0x0
> LK_DEBUG: gpio.c : of_get_gpio : /localbus/upm <at> 1,0: gpio controller
/soc8349 <at> e0000000/gpio-controller <at> e0000c00: is not registered
> 
> When I check in /proc/device-tree/soc8349 <at> e0000000/, I find that entries are present for both GPIOs are present.
> 
> Here are debug registration messages, indicating that gpio registered successfully:
> 
> ##### LK_DEBUG: of_plat_dev_create : NAME=soc8349
> ##### LK_DEBUG: of_plat_dev_create : NAME=wdt
> ##### LK_DEBUG: of_plat_dev_create : NAME=i2c
> ##### LK_DEBUG: of_plat_dev_create : NAME=i2c
> ##### LK_DEBUG: of_plat_dev_create : NAME=spi
> ##### LK_DEBUG: of_plat_dev_create : NAME=dma
> ##### LK_DEBUG: of_plat_dev_create : NAME=usb
> ##### LK_DEBUG: of_plat_dev_create : NAME=usb
> ##### LK_DEBUG: of_plat_dev_create : NAME=mdio
> ##### LK_DEBUG: of_plat_dev_create : NAME=ethernet
> ##### LK_DEBUG: of_plat_dev_create : NAME=ethernet
> ##### LK_DEBUG: of_plat_dev_create : NAME=serial
> ##### LK_DEBUG: of_plat_dev_create : NAME=serial
> ##### LK_DEBUG: of_plat_dev_create : NAME=crypto
> ##### LK_DEBUG: of_plat_dev_create : NAME=pic
> ##### LK_DEBUG: of_plat_dev_create : NAME=gpio-controller
> ##### LK_DEBUG: of_plat_dev_create : NAME=gpio-controller
> ##### LK_DEBUG: of_plat_dev_create : NAME=localbus
> ##### LK_DEBUG: of_plat_dev_create : NAME=upm
> 
> Most probably something is wrong in my device tree (listed below). Can someone please point me in the right direction?
> 
> thanks a lot for your help.
> LK
> 
> -------------------------------------------------------------
> 
> /*
>  * MPC8349E MDS Device Tree Source
>  *
>  * Copyright 2005, 2006 Freescale Semiconductor Inc.
>  *
>  * This program is free software; you can redistribute  it and/or modify it
>  * under  the terms of  the GNU General  Public License as published by the
>  * Free Software Foundation;  either version 2 of the  License, or (at your
>  * option) any later version.
>  */
> 
> /dts-v1/;
> 
> / {
>         model = "MPC8349EMDS";
>         compatible = "MPC8349EMDS", "MPC834xMDS", "MPC83xxMDS";
>         #address-cells = <1>;
>         #size-cells = <1>;
> 
>         aliases {
>                 ethernet0 = &enet0;
>                 ethernet1 = &enet1;
>                 serial0 = &serial0;
>                 serial1 = &serial1;
>                 pci0 = &pci0;
>                 pci1 = &pci1;
>         };
> 
>         cpus {
>                 #address-cells = <1>;
>                 #size-cells = <0>;
> 
>                 PowerPC,8349 <at> 0 {
>                         device_type = "cpu";
>                         reg = <0x0>;
>                         d-cache-line-size = <32>;
>                         i-cache-line-size = <32>;
>                         d-cache-size = <32768>;
>                         i-cache-size = <32768>;
>                         timebase-frequency = <0>;       // from bootloader
>                         bus-frequency = <0>;            // from bootloader
>                         clock-frequency = <0>;          // from bootloader
>                 };
>         };
> 
>         memory {
>                 device_type = "memory";
>                 reg = <0x00000000 0x10000000>;  // 256MB at 0
>         };
> 
>         bcsr <at> e2400000 {
>                 device_type = "board-control";
>                 reg = <0xe2400000 0x8000>;
>         };
> 
>         soc8349 <at> e0000000 {
>                 #address-cells = <1>;
>                 #size-cells = <1>;
>                 device_type = "soc";
>                 compatible = "simple-bus";
>                 ranges = <0x0 0xe0000000 0x00100000>;
>                 reg = <0xe0000000 0x00000200>;
>                 bus-frequency = <0>;
> 
>                 wdt <at> 200 {
>                         device_type = "watchdog";
>                         compatible = "mpc83xx_wdt";
>                         reg = <0x200 0x100>;
>                 };
> 
>                 i2c <at> 3000 {
>                         #address-cells = <1>;
>                         #size-cells = <0>;
>                         cell-index = <0>;
>                         compatible = "fsl-i2c";
>                         reg = <0x3000 0x100>;
>                         interrupts = <14 0x8>;
>                         interrupt-parent = <&ipic>;
>                         dfsrr;
> 
>                         rtc <at> 68 {
>                                 compatible = "dallas,ds1374";
>                                 reg = <0x68>;
>                         };
>                 };
> 
>                 i2c <at> 3100 {
>                         #address-cells = <1>;
>                         #size-cells = <0>;
>                         cell-index = <1>;
>                         compatible = "fsl-i2c";
>                         reg = <0x3100 0x100>;
>                         interrupts = <15 0x8>;
>                         interrupt-parent = <&ipic>;
>                         dfsrr;
>                 };
> 
>                 spi <at> 7000 {
>                         cell-index = <0>;
>                         compatible = "fsl,spi";
>                         reg = <0x7000 0x1000>;
>                         interrupts = <16 0x8>;
>                         interrupt-parent = <&ipic>;
>                         mode = "cpu";
>                 };
> 
>                 dma <at> 82a8 {
>                         #address-cells = <1>;
>                         #size-cells = <1>;
>                         compatible = "fsl,mpc8349-dma", "fsl,elo-dma";
>                         reg = <0x82a8 4>;
>                         ranges = <0 0x8100 0x1a8>;
>                         interrupt-parent = <&ipic>;
>                         interrupts = <71 8>;
>                         cell-index = <0>;
>                         dma-channel <at> 0 {
>                                 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
>                                 reg = <0 0x80>;
>                                 interrupt-parent = <&ipic>;
>                                 interrupts = <71 8>;
>                         };
>                         dma-channel <at> 80 {
>                                 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
>                                 reg = <0x80 0x80>;
>                                 interrupt-parent = <&ipic>;
>                                 interrupts = <71 8>;
>                         };
>                         dma-channel <at> 100 {
>                                 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
>                                 reg = <0x100 0x80>;
>                                 interrupt-parent = <&ipic>;
>                                 interrupts = <71 8>;
>                         };
>                         dma-channel <at> 180 {
>                                 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
>                                 reg = <0x180 0x28>;
>                                 interrupt-parent = <&ipic>;
>                                 interrupts = <71 8>;
>                         };
>                 };
> 
>                 /* phy type (ULPI or SERIAL) are only types supported for MPH */
>                 /* port = 0 or 1 */
>                 usb <at> 22000 {
>                         compatible = "fsl-usb2-mph";
>                         reg = <0x22000 0x1000>;
>                         #address-cells = <1>;
>                         #size-cells = <0>;
>                         interrupt-parent = <&ipic>;
>                         interrupts = <39 0x8>;
>                         phy_type = "ulpi";
>                         port1;
>                 };
>                 /* phy type (ULPI, UTMI, UTMI_WIDE, SERIAL) */
>                 usb <at> 23000 {
>                         compatible = "fsl-usb2-dr";
>                         reg = <0x23000 0x1000>;
>                         #address-cells = <1>;
>                         #size-cells = <0>;
>                         interrupt-parent = <&ipic>;
>                         interrupts = <38 0x8>;
>                         dr_mode = "otg";
>                         phy_type = "ulpi";
>                 };
> 
>                 mdio <at> 24520 {
>                         #address-cells = <1>;
>                         #size-cells = <0>;
>                         compatible = "fsl,gianfar-mdio";
>                         reg = <0x24520 0x20>;
> 
>                         phy0: ethernet-phy <at> 0 {
>                                 interrupt-parent = <&ipic>;
>                                 interrupts = <17 0x8>;
>                                 reg = <0x1>;
>                                 device_type = "ethernet-phy";
>                         };
>                         phy1: ethernet-phy <at> 1 {
>                                 interrupt-parent = <&ipic>;
>                                 interrupts = <18 0x8>;
>                                 reg = <0x2>;
>                                 device_type = "ethernet-phy";
>                         };
>                 };
> 
>                 enet0: ethernet <at> 24000 {
>                         cell-index = <0>;
>                         device_type = "network";
>                         model = "TSEC";
>                         compatible = "gianfar";
>                         reg = <0x24000 0x1000>;
>                         local-mac-address = [ 00 00 00 00 00 00 ];
>                         interrupts = <32 0x8 33 0x8 34 0x8>;
>                         interrupt-parent = <&ipic>;
>                         phy-handle = <&phy0>;
>                         linux,network-index = <0>;
>                 };
> 
>                 enet1: ethernet <at> 25000 {
>                         cell-index = <1>;
>                         device_type = "network";
>                         model = "TSEC";
>                         compatible = "gianfar";
>                         reg = <0x25000 0x1000>;
>                         local-mac-address = [ 00 00 00 00 00 00 ];
>                         interrupts = <35 0x8 36 0x8 37 0x8>;
>                         interrupt-parent = <&ipic>;
>                         phy-handle = <&phy1>;
>                         linux,network-index = <1>;
>                 };
> 
>                 serial0: serial <at> 4500 {
>                         cell-index = <0>;
>                         device_type = "serial";
>                         compatible = "ns16550";
>                         reg = <0x4500 0x100>;
>                         clock-frequency = <0>;
>                         interrupts = <9 0x8>;
>                         interrupt-parent = <&ipic>;
>                 };
> 
>                 serial1: serial <at> 4600 {
>                         cell-index = <1>;
>                         device_type = "serial";
>                         compatible = "ns16550";
>                         reg = <0x4600 0x100>;
>                         clock-frequency = <0>;
>                         interrupts = <10 0x8>;
>                         interrupt-parent = <&ipic>;
>                 };
> 
>                 crypto <at> 30000 {
>                         compatible = "fsl,sec2.0";
>                         reg = <0x30000 0x10000>;
>                         interrupts = <11 0x8>;
>                         interrupt-parent = <&ipic>;
>                         fsl,num-channels = <4>;
>                         fsl,channel-fifo-len = <24>;
>                         fsl,exec-units-mask = <0x7e>;
>                         fsl,descriptor-types-mask = <0x01010ebf>;
>                 };
> 
>                 /* IPIC
>                  * interrupts cell = <intr #, sense>
>                  * sense values match linux IORESOURCE_IRQ_* defines:
>                  * sense == 8: Level, low assertion
>                  * sense == 2: Edge, high-to-low change
>                  */
>                 ipic: pic <at> 700 {
>                         interrupt-controller;
>                         #address-cells = <0>;
>                         #interrupt-cells = <2>;
>                         reg = <0x700 0x100>;
>                         device_type = "ipic";
>                 };
> 

Here you are using absolute addresses but you should use an offset from 
a base reg address, in your case e0000000.

>                 gpio1: gpio-controller <at> e0000c00 {
                   gpio1: gpio-controller <at> c00 {
>                         #gpio-cells = <2>;
>                         compatible = "fsl,mpc8349-gpio-bank";
                           reg = <0xc00 0x100>;
>                         reg = <0xe0000c00 0x100>;
>                         gpio-controller;
>                 };
> 
                   gpio2: gpio-controller <at> d00 {
>                 gpio2: gpio-controller <at> e0000d00 {
>                         #gpio-cells = <2>;
>                         compatible = "fsl,mpc8349-gpio-bank";
                           reg = <0xd00 0x100>;
>                         reg = <0xe0000d00 0x100>;
>                         gpio-controller;
>                 };
>         };
> 
>         localbus {
>                 compatible = "fsl,pq3-localbus", "simple-bus";
>                 #address-cells = <2>;
>                 #size-cells = <1>;
>                 reg = <0xe0005000 0x100000>;       // BRx, ORx, etc.
> 
>                 upm <at> 1,0 {
>                         #address-cells = <1>;
>                         #size-cells = <1>;
>                         compatible = "fsl,upm-nand";
>                         reg = <3 0xa0000000 0x800>;
>                         fsl,upm-addr-offset = <0x10>;
>                         fsl,upm-cmd-offset = <0x08>;
>                         gpios = <&gpio1 4 0>;
> 
>                         nand <at> 0 {
>                                 #address-cells = <1>;
>                                 #size-cells = <1>;
>                                 compatible = "fsl,lbc-nand";
> 
>                                 partition <at> 0 {
>                                         label = "EVERYTHING";
>                                         reg = <0x00000000 0x01000000>;
>                                 };
>                         };
>                 };
>         };
> 
>         pci0: pci <at> e0008500 {
>                 cell-index = <1>;
>                 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
>                 interrupt-map = <
> 
>                                 /* IDSEL 0x11 */
>                                  0x8800 0x0 0x0 0x1 &ipic 20 0x8
>                                  0x8800 0x0 0x0 0x2 &ipic 21 0x8
>                                  0x8800 0x0 0x0 0x3 &ipic 22 0x8
>                                  0x8800 0x0 0x0 0x4 &ipic 23 0x8
> 
>                                 /* IDSEL 0x12 */
>                                  0x9000 0x0 0x0 0x1 &ipic 22 0x8
>                                  0x9000 0x0 0x0 0x2 &ipic 23 0x8
>                                  0x9000 0x0 0x0 0x3 &ipic 20 0x8
>                                  0x9000 0x0 0x0 0x4 &ipic 21 0x8
> 
>                                 /* IDSEL 0x13 */
>                                  0x9800 0x0 0x0 0x1 &ipic 23 0x8
>                                  0x9800 0x0 0x0 0x2 &ipic 20 0x8
>                                  0x9800 0x0 0x0 0x3 &ipic 21 0x8
>                                  0x9800 0x0 0x0 0x4 &ipic 22 0x8
> 
>                                 /* IDSEL 0x15 */
>                                  0xa800 0x0 0x0 0x1 &ipic 20 0x8
>                                  0xa800 0x0 0x0 0x2 &ipic 21 0x8
>                                  0xa800 0x0 0x0 0x3 &ipic 22 0x8
>                                  0xa800 0x0 0x0 0x4 &ipic 23 0x8
> 
>                                 /* IDSEL 0x16 */
>                                  0xb000 0x0 0x0 0x1 &ipic 23 0x8
>                                  0xb000 0x0 0x0 0x2 &ipic 20 0x8
>                                  0xb000 0x0 0x0 0x3 &ipic 21 0x8
>                                  0xb000 0x0 0x0 0x4 &ipic 22 0x8
> 
>                                 /* IDSEL 0x17 */
>                                  0xb800 0x0 0x0 0x1 &ipic 22 0x8
>                                  0xb800 0x0 0x0 0x2 &ipic 23 0x8
>                                  0xb800 0x0 0x0 0x3 &ipic 20 0x8
>                                  0xb800 0x0 0x0 0x4 &ipic 21 0x8
> 
>                                 /* IDSEL 0x18 */
>                                  0xc000 0x0 0x0 0x1 &ipic 21 0x8
>                                  0xc000 0x0 0x0 0x2 &ipic 22 0x8
>                                  0xc000 0x0 0x0 0x3 &ipic 23 0x8
>                                  0xc000 0x0 0x0 0x4 &ipic 20 0x8>;
>                 interrupt-parent = <&ipic>;
>                 interrupts = <66 0x8>;
>                 bus-range = <0 0>;
>                 ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000
>                           0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
>                           0x01000000 0x0 0x00000000 0xe2000000 0x0 0x00100000>;
>                 clock-frequency = <66666666>;
>                 #interrupt-cells = <1>;
>                 #size-cells = <2>;
>                 #address-cells = <3>;
>                 reg = <0xe0008500 0x100>;
>                 compatible = "fsl,mpc8349-pci";
>                 device_type = "pci";
>         };
> 
>         pci1: pci <at> e0008600 {
>                 cell-index = <2>;
>                 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
>                 interrupt-map = <
> 
>                                 /* IDSEL 0x11 */
>                                  0x8800 0x0 0x0 0x1 &ipic 20 0x8
>                                  0x8800 0x0 0x0 0x2 &ipic 21 0x8
>                                  0x8800 0x0 0x0 0x3 &ipic 22 0x8
>                                  0x8800 0x0 0x0 0x4 &ipic 23 0x8
> 
>                                 /* IDSEL 0x12 */
>                                  0x9000 0x0 0x0 0x1 &ipic 22 0x8
>                                  0x9000 0x0 0x0 0x2 &ipic 23 0x8
>                                  0x9000 0x0 0x0 0x3 &ipic 20 0x8
>                                  0x9000 0x0 0x0 0x4 &ipic 21 0x8
> 
>                                 /* IDSEL 0x13 */
>                                  0x9800 0x0 0x0 0x1 &ipic 23 0x8
>                                  0x9800 0x0 0x0 0x2 &ipic 20 0x8
>                                  0x9800 0x0 0x0 0x3 &ipic 21 0x8
>                                  0x9800 0x0 0x0 0x4 &ipic 22 0x8
> 
>                                 /* IDSEL 0x15 */
>                                  0xa800 0x0 0x0 0x1 &ipic 20 0x8
>                                  0xa800 0x0 0x0 0x2 &ipic 21 0x8
>                                  0xa800 0x0 0x0 0x3 &ipic 22 0x8
>                                  0xa800 0x0 0x0 0x4 &ipic 23 0x8
> 
>                                 /* IDSEL 0x16 */
>                                  0xb000 0x0 0x0 0x1 &ipic 23 0x8
>                                  0xb000 0x0 0x0 0x2 &ipic 20 0x8
>                                  0xb000 0x0 0x0 0x3 &ipic 21 0x8
>                                  0xb000 0x0 0x0 0x4 &ipic 22 0x8
> 
>                                 /* IDSEL 0x17 */
>                                  0xb800 0x0 0x0 0x1 &ipic 22 0x8
>                                  0xb800 0x0 0x0 0x2 &ipic 23 0x8
>                                  0xb800 0x0 0x0 0x3 &ipic 20 0x8
>                                  0xb800 0x0 0x0 0x4 &ipic 21 0x8
> 
>                                 /* IDSEL 0x18 */
>                                  0xc000 0x0 0x0 0x1 &ipic 21 0x8
>                                  0xc000 0x0 0x0 0x2 &ipic 22 0x8
>                                  0xc000 0x0 0x0 0x3 &ipic 23 0x8
>                                  0xc000 0x0 0x0 0x4 &ipic 20 0x8>;
>                 interrupt-parent = <&ipic>;
>                 interrupts = <67 0x8>;
>                 bus-range = <0 0>;
>                 ranges = <0x02000000 0x0 0xb0000000 0xb0000000 0x0 0x10000000
>                           0x42000000 0x0 0xa0000000 0xa0000000 0x0 0x10000000
>                           0x01000000 0x0 0x00000000 0xe2100000 0x0 0x00100000>;
>                 clock-frequency = <66666666>;
>                 #interrupt-cells = <1>;
>                 #size-cells = <2>;
>                 #address-cells = <3>;
>                 reg = <0xe0008600 0x100>;
>                 compatible = "fsl,mpc8349-pci";
>                 device_type = "pci";
>         };
> 
>         chosen {
>                 linux,stdout-path = &serial0;
>         };
> };
> 
> 
>       
> 
> 
> ------------------------------------------------------------------------
> 
> _______________________________________________
> Linuxppc-embedded mailing list
> Linuxppc-embedded <at> ozlabs.org
> https://ozlabs.org/mailman/listinfo/linuxppc-embedded

--

-- 
Marco Stornelli
Embedded Software Engineer
CoRiTeL - Consorzio di Ricerca sulle Telecomunicazioni
http://www.coritel.it

marco.stornelli <at> coritel.it
+39 06 72582838
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Marco Stornelli | 2 Sep 2008 08:40
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Re: How work ELDK4.0 in linux

VenkataKrishna ha scritto:
>  
> 
> I installed ELDK 4.0 in linux host system. Now I want to develop linux BSP
> for my target Board (MPC8260) free scale. Any one suggest me How to works
> and sequence of compiling linux BSP.
> 
>  
> 
> Thanks and Regard's
> 
> Venkatakrishna. 
> 
> 
> 
> 
> ------------------------------------------------------------------------
> 
> _______________________________________________
> Linuxppc-embedded mailing list
> Linuxppc-embedded <at> ozlabs.org
> https://ozlabs.org/mailman/listinfo/linuxppc-embedded

You can have a detailed description here http://www.denx.de/wiki/DULG/ELDK.

Regards,

--

-- 
Marco Stornelli
Embedded Software Engineer
CoRiTeL - Consorzio di Ricerca sulle Telecomunicazioni
http://www.coritel.it

marco.stornelli <at> coritel.it
+39 06 72582838
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Detlev Zundel | 2 Sep 2008 12:01
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Picon
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Favicon

Re: MPC8568MDS RAMDISK Problem

Hi,

>  Hi:
>      ram0: rw=0, want=1345772050, limit=1000000, this error cause by
> Device Drivers->block device-> ramdisk size
>      make ramdisk size bigger~~~~
> regards:)
> yanlong

One can also use the "ramdisk_size" command line parameter
(cf. Documentation/kernel-parameters.txt).  It is not neccessary to
recompile the kernel for that.

Cheers
  Detlev

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Gmane