Jiri Kosina | 8 Feb 15:32
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[PATCH] [IA64] disable interrupts when exiting from ia64_mca_cmc_int_handler()

SAL specification mandates that ia64_mca_log_sal_error_record() gets 
called with interrupts enabled, and that's why ia64_mca_cmc_int_handler() 
is enabling them. It however forgets to re-disable them when exiting, 
which triggers WARN_ON() in generic IRQ handler.

Disable the interrupts again before exiting. This is analogous to 
a3967685745 ("[IA64] disable interrupts at end of 
ia64_mca_cpe_int_handler()").

Signed-off-by: Jiri Kosina <jkosina <at> suse.cz>
---
 arch/ia64/kernel/mca.c |    2 ++
 1 files changed, 2 insertions(+), 0 deletions(-)

diff --git a/arch/ia64/kernel/mca.c b/arch/ia64/kernel/mca.c
index 84fb405..8192009 100644
--- a/arch/ia64/kernel/mca.c
+++ b/arch/ia64/kernel/mca.c
@@ -1447,6 +1447,8 @@ out:
 	/* Get the CMC error record and log it */
 	ia64_mca_log_sal_error_record(SAL_INFO_TYPE_CMC);

+	local_irq_disable();
+
 	return IRQ_HANDLED;
 }

--

-- 
Jiri Kosina
SUSE Labs
(Continue reading)

Mr.Patrick Otah | 8 Feb 08:28
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Jan Kara | 1 Feb 16:19
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Memory corruption due to word sharing

  Hello,

  we've spotted the following mismatch between what kernel folks expect
from a compiler and what GCC really does, resulting in memory corruption on
some architectures. Consider the following structure:
struct x {
    long a;
    unsigned int b1;
    unsigned int b2:1;
};

We have two processes P1 and P2 where P1 updates field b1 and P2 updates
bitfield b2. The code GCC generates for b2 = 1 e.g. on ia64 is:
   0:   09 00 21 40 00 21       [MMI]       adds r32=8,r32
   6:   00 00 00 02 00 e0                   nop.m 0x0
   c:   11 00 00 90                         mov r15=1;;
  10:   0b 70 00 40 18 10       [MMI]       ld8 r14=[r32];;
  16:   00 00 00 02 00 c0                   nop.m 0x0
  1c:   f1 70 c0 47                         dep r14=r15,r14,32,1;;
  20:   11 00 38 40 98 11       [MIB]       st8 [r32]=r14
  26:   00 00 00 02 00 80                   nop.i 0x0
  2c:   08 00 84 00                         br.ret.sptk.many b0;;

Note that gcc used 64-bit read-modify-write cycle to update b2. Thus if P1
races with P2, update of b1 can get lost. BTW: I've just checked on x86_64
and there GCC uses 8-bit bitop to modify the bitfield.

We actually spotted this race in practice in btrfs on structure
fs/btrfs/ctree.h:struct btrfs_block_rsv where spinlock content got
corrupted due to update of following bitfield and there seem to be other
(Continue reading)

Thomas Renninger | 23 Jan 16:51
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Re: [PATCH 2/3] ACPI, APEI: Add RAM mapping support to ACPI

Hi,

Please ignore my previous mail, my mailer wrongly formatted
it with html tags and it got filtered out from the lists.

Firstly: This has to get in quickly if it shouldn't miss
3.3 (again). Tiny adjustings (I don't see any, beside the
issue Bjorn brought up) can still be done later, but I
guess this rather big one gets rejected by Linus after
the merge window closed.

Here again:

On Saturday, January 21, 2012 09:38:27 PM Bjorn Helgaas wrote:
> +cc Tony, linux-ia64
> 
...
> >>  {
> >> @@ -353,7 +385,7 @@ acpi_os_map_memory(acpi_physical_address phys, acpi_size size)
> >>
> >>        pg_off = round_down(phys, PAGE_SIZE);
> >>        pg_sz = round_up(phys + size, PAGE_SIZE) - pg_off;
> >> -       virt = acpi_os_ioremap(pg_off, pg_sz);
> >> +       virt = acpi_map(pg_off, pg_sz);
Ok, that worked before, also on IA64.
That means that typically/normally/always io mem is tried to be mapped.

It's due to the new APEI infrastructure/features that ram could
get mapped via acpi_os_map_memory.

(Continue reading)

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Gilad Ben-Yossef | 8 Jan 14:32
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[RFC PATCH v2 0/9] Remove useless on_each_cpu return value

on_each_cpu() returns as its own return value the return value of
smp_call_function(). smp_call_function() in turn returns a hard
coded value of zero.

Some callers to on_each_cpu() waste cycles and bloat code space
by checking the return value to on_each_cpu(), probably for
historical reasons.

This patch set refactors callers to not test on_each_cpu()
(fixed) return value and then refactors on_each_cpu to
return void to avoid confusing future users.

In other words, this patch aims to delete 18 source code lines
while not changing any functionality :-)

I tested as best as I could the x86 changes and compiled some
of the others, but I don't have access to all the needed hardware
for testing. Reviewers and testers welcome!

The only change from the first version is the addition of a 
proper Signed-off-by line.

This patch set is also available on branch on_each_cpu_ret_v2
at git://github.com/gby/linux.git

Signed-off-by: Gilad Ben-Yossef <gilad <at> benyossef.com>
Acked-by: Peter Zijlstra <a.p.zijlstra <at> chello.nl>
Reviewed-by: Michal Nazarewicz <mina86 <at> mina86.com>
CC: Michal Nazarewicz <mina86 <at> mina86.com>
CC: David Airlie <airlied <at> linux.ie>
(Continue reading)

Luck, Tony | 5 Jan 18:42
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[git pull] ia64 changes

Hi Linus,

please pull from:

	git://git.kernel.org/pub/scm/linux/kernel/git/aegl/linux.git misc-3.3
	HEAD=a4b1d1b3619ee2fac40cdf5ca86a4758e45b9358

This will update the files shown below.

Thanks!

-Tony

[Confession time: These commits haven't been exposed to linux-next, because I
 failed to merge the misc-3.3 branch into my "next" branch for Stephen to pick up :-(
 But it isn't like there's a huge population of ia64 testers checking every
 linux-next release. Petr's fix has seen some testing in the SLES11-SP2-RC series
 the other three are just semantic sugar]

 arch/ia64/kernel/setup.c                |   19 +++++++++++++++++++
 arch/ia64/sn/kernel/irq.c               |    5 ++---
 arch/ia64/sn/pci/pcibr/pcibr_provider.c |    3 +--
 arch/ia64/sn/pci/tioca_provider.c       |    4 ++--
 4 files changed, 24 insertions(+), 7 deletions(-)

Petr Tesarik (1):
      [IA64] Merge overlapping reserved regions at boot

Thomas Meyer (3):
      ia64: tioca: Use kmemdup rather than duplicating its implementation
(Continue reading)

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