Stephen Boyd | 7 Jul 03:09 2015

[PATCH] pinctrl: qcom: Hook pm_power_down for shutdown support

Assign pm_power_off() if we have the PS_HOLD functionality so
that we can properly shutdown the SoC. Otherwise, shutdown won't
do anything besides put the CPU into a tight loop. Unfortunately,
we have to use a singleton here because pm_power_off() doesn't
take any arguments. Fortunately there's only one instance of the
pinctrl device on a running system so this isn't a problem.

Cc: Bjorn Andersson <bjorn.andersson <at>>
Cc: Pramod Gurav <pramod.gurav <at>>
Signed-off-by: Stephen Boyd <sboyd <at>>
 drivers/pinctrl/qcom/pinctrl-msm.c | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/drivers/pinctrl/qcom/pinctrl-msm.c b/drivers/pinctrl/qcom/pinctrl-msm.c
index e457d52302a2..6242af8a42d5 100644
--- a/drivers/pinctrl/qcom/pinctrl-msm.c
+++ b/drivers/pinctrl/qcom/pinctrl-msm.c
 <at>  <at>  -28,6 +28,7  <at>  <at> 
 #include <linux/interrupt.h>
 #include <linux/spinlock.h>
 #include <linux/reboot.h>
+#include <linux/pm.h>

 #include "../core.h"
 #include "../pinconf.h"
 <at>  <at>  -855,6 +856,13  <at>  <at>  static int msm_ps_hold_restart(struct notifier_block *nb, unsigned long action,
 	return NOTIFY_DONE;

(Continue reading)

Stephen Boyd | 7 Jul 03:08 2015

[PATCH] Input: pmic8xxx-pwrkey - Support shutdown

On pm8xxx PMICs, shutdown and restart are signaled to the PMIC
via a pin called PS_HOLD. When this pin goes low, the PMIC
performs a configurable power sequence. Add a .shutdown hook so
that we can properly configure this power sequence for shutdown
or restart depending on the system state.

Signed-off-by: Stephen Boyd <sboyd <at>>
 drivers/input/misc/pmic8xxx-pwrkey.c | 287 ++++++++++++++++++++++++++++++++++-
 1 file changed, 280 insertions(+), 7 deletions(-)

diff --git a/drivers/input/misc/pmic8xxx-pwrkey.c b/drivers/input/misc/pmic8xxx-pwrkey.c
index c4ca20e63221..ce0492031bc3 100644
--- a/drivers/input/misc/pmic8xxx-pwrkey.c
+++ b/drivers/input/misc/pmic8xxx-pwrkey.c
 <at>  <at>  -20,17 +20,75  <at>  <at> 
 #include <linux/regmap.h>
 #include <linux/log2.h>
 #include <linux/of.h>
+#include <linux/of_device.h>

 #define PON_CNTL_1 0x1C
 #define PON_CNTL_PULL_UP BIT(7)
+#define PON_CNTL_1_PULL_UP_EN			0xe0
+#define PON_CNTL_1_USB_PWR_EN			0x10
+#define PON_CNTL_1_WD_EN_RESET			0x08
+#define PM8058_SLEEP_CTRL			0x02b
+#define PM8921_SLEEP_CTRL			0x10a
(Continue reading)

Georgi Djakov | 6 Jul 15:51 2015

[PATCH] clk: qcom: Constify the parent names arrays

Make const both the array and the strings, so they can be
moved to .rodata section.

Signed-off-by: Georgi Djakov <georgi.djakov <at>>
Patch based on v4.2-rc1

 drivers/clk/qcom/gcc-apq8084.c  |   12 ++++++------
 drivers/clk/qcom/gcc-ipq806x.c  |   10 +++++-----
 drivers/clk/qcom/gcc-msm8660.c  |    8 ++++----
 drivers/clk/qcom/gcc-msm8916.c  |   24 ++++++++++++------------
 drivers/clk/qcom/gcc-msm8960.c  |   12 ++++++------
 drivers/clk/qcom/gcc-msm8974.c  |    4 ++--
 drivers/clk/qcom/lcc-ipq806x.c  |    6 +++---
 drivers/clk/qcom/lcc-msm8960.c  |    8 ++++----
 drivers/clk/qcom/mmcc-apq8084.c |   20 ++++++++++----------
 drivers/clk/qcom/mmcc-msm8960.c |   14 +++++++-------
 drivers/clk/qcom/mmcc-msm8974.c |   16 ++++++++--------
 11 files changed, 67 insertions(+), 67 deletions(-)

diff --git a/drivers/clk/qcom/gcc-apq8084.c b/drivers/clk/qcom/gcc-apq8084.c
index 54a756b90a37..05b7a25b80e8 100644
--- a/drivers/clk/qcom/gcc-apq8084.c
+++ b/drivers/clk/qcom/gcc-apq8084.c
 <at>  <at>  -48,7 +48,7  <at>  <at>  static const struct parent_map gcc_xo_gpll0_map[] = {
 	{ P_GPLL0, 1 }

-static const char *gcc_xo_gpll0[] = {
+static const char * const gcc_xo_gpll0[] = {
(Continue reading)

Ivan T. Ivanov | 6 Jul 14:16 2015

[PATCH v2 0/3] mmc: sdhci: Card detection fixes

Following changes aimed to fix some aspects of card detection, when

Changes since first version [1]:

* Patch 1/3 is a modified to first check for MMC_CAP_NONREMOVABLE
  and then check for a valid value in "gpio_cd"


Ivan T. Ivanov (3):
  mmc: sdhci: let GPIO based card detection have higher precedence
  mmc: sdhci: don't use card state polling when CD GPIO is defined
  mmc: sdhci: properly check card present state when quirk
    NO_CARD_NO_RESET is set

 drivers/mmc/host/sdhci.c | 20 +++++++++++++-------
 1 file changed, 13 insertions(+), 7 deletions(-)


Ivan T. Ivanov | 6 Jul 13:53 2015

[PATCH v2] mmc: sdhci-msm: Boost controller core clock

Ensure SDCC is working with maximum clock otherwise card
detection could be extremely slow, up to 7 seconds.

Signed-off-by: Ivan T. Ivanov <ivan.ivanov <at>>
Reviewed-by: Georgi Djakov <georgi.djakov <at>>
Acked-by: Stephen Boyd <sboyd <at>>

Changes since v0:
- s/falied/failed in warning message.

 drivers/mmc/host/sdhci-msm.c | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/drivers/mmc/host/sdhci-msm.c b/drivers/mmc/host/sdhci-msm.c
index 4a09f76..4bcee03 100644
--- a/drivers/mmc/host/sdhci-msm.c
+++ b/drivers/mmc/host/sdhci-msm.c
 <at>  <at>  -489,6 +489,11  <at>  <at>  static int sdhci_msm_probe(struct platform_device *pdev)
 		goto pclk_disable;

+	/* Vote for maximum clock rate for maximum performance */
+	ret = clk_set_rate(msm_host->clk, INT_MAX);
+	if (ret)
+		dev_warn(&pdev->dev, "core clock boost failed\n");
 	ret = clk_prepare_enable(msm_host->clk);
 	if (ret)
 		goto pclk_disable;
(Continue reading)

Bjorn Andersson | 1 Jul 06:38 2015

[PATCH] mmc: core: Set load on vmmc and vqmmc

Signed-off-by: Bjorn Andersson <bjorn.andersson <at>>

This is needed to get our regulators into hpm, to give enough power to our
sdhci cards to run at higher clockrates - e.g. hs200.

 Documentation/devicetree/bindings/mmc/mmc.txt | 2 ++
 drivers/mmc/core/core.c                       | 6 ++++++
 drivers/mmc/core/host.c                       | 4 ++++
 include/linux/mmc/host.h                      | 2 ++
 4 files changed, 14 insertions(+)

diff --git a/Documentation/devicetree/bindings/mmc/mmc.txt b/Documentation/devicetree/bindings/mmc/mmc.txt
index 0384fc3f64e8..05c8b4f59187 100644
--- a/Documentation/devicetree/bindings/mmc/mmc.txt
+++ b/Documentation/devicetree/bindings/mmc/mmc.txt
 <at>  <at>  -47,6 +47,8  <at>  <at>  Optional properties:
 - mmc-hs400-1_2v: eMMC HS400 mode(1.2V I/O) is supported
 - dsr: Value the card's (optional) Driver Stage Register (DSR) should be
   programmed with. Valid range: [0 .. 0xffff].
+- vmmc-load: requested load for the vmmc regulator, in mA
+- vqmmc-load: requested load for the vqmmc regulator, in mA

 *NOTE* on CD and WP polarity. To use common for all SD/MMC host controllers line
 polarity properties, we have to fix the meaning of the "normal" and "inverted"
diff --git a/drivers/mmc/core/core.c b/drivers/mmc/core/core.c
index 9ad73f30f744..0a8f828af59f 100644
--- a/drivers/mmc/core/core.c
+++ b/drivers/mmc/core/core.c
 <at>  <at>  -1455,12 +1455,18  <at>  <at>  int mmc_regulator_get_supply(struct mmc_host *mmc)
(Continue reading)

Bjorn Andersson | 30 Jun 21:46 2015

[PATCH] firmware: qcom: scm: Peripheral Authentication Service

This adds the Peripheral Authentication Service (PAS) interface to the
Qualcomm SCM interface. The API is used to authenticate and boot a range
of external processors in various Qualcomm platforms.

Signed-off-by: Bjorn Andersson <bjorn.andersson <at>>

While adding the 64 bit interface it might be of interest to extract the dma
allocation in __qcom_scm_pas_init_image() into the common code and pass the
physical pointer to instead, but I haven't looked at the differences to the 64
bit interface.

 drivers/firmware/qcom_scm-32.c | 93 ++++++++++++++++++++++++++++++++++++++++++
 drivers/firmware/qcom_scm.c    | 78 +++++++++++++++++++++++++++++++++++
 drivers/firmware/qcom_scm.h    | 12 ++++++
 include/linux/qcom_scm.h       |  6 +++
 4 files changed, 189 insertions(+)

diff --git a/drivers/firmware/qcom_scm-32.c b/drivers/firmware/qcom_scm-32.c
index 1bd6f9c34331..5674d36a9df9 100644
--- a/drivers/firmware/qcom_scm-32.c
+++ b/drivers/firmware/qcom_scm-32.c
 <at>  <at>  -23,6 +23,7  <at>  <at> 
 #include <linux/errno.h>
 #include <linux/err.h>
 #include <linux/qcom_scm.h>
+#include <linux/dma-mapping.h>

 #include <asm/outercache.h>
 #include <asm/cacheflush.h>
(Continue reading)

Archit Taneja | 30 Jun 07:24 2015

[RFC 0/2] drm/dsi: DSI for devices with different control bus

We are currently restricted when it comes to supporting DSI on devices
that have a non-DSI control bus. For example, DSI encoder chips are
available in the market that are configured via i2c. Configuring their
registers via DSI bus is either optional or not available at all.

These devices still need to pass DSI parameters (data lanes, mode flags
etc) to the DSI host they are connected to. We don't have a way to do
that at the moment.

The method presented in these patches is to provide an API to create a
'dummy' mipi_dsi_device. This device is populated with the desired DSI
params, which are passed on to the host via mipi_dsi_attach().

This method will require the device driver to get a phandle to the DSI
host since there is no parent-child relation between the two.

Is there a better way to do this? Please let me know!

Archit Taneja (2):
  drm/dsi: Create dummy DSI devices
  drm/dsi: Get DSI host by DT device node

 drivers/gpu/drm/drm_mipi_dsi.c | 108 ++++++++++++++++++++++++++++++++++++++++-
 include/drm/drm_mipi_dsi.h     |   4 ++
 2 files changed, 110 insertions(+), 2 deletions(-)


The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
hosted by The Linux Foundation

(Continue reading)

bjorn | 26 Jun 23:50 2015

[PATCH v2 00/11] Qualcomm Shared Memory & RPM drivers

From: Bjorn Andersson <bjorn.andersson <at>>

This second incarnation of the SMEM, SMD, RPM and pm8x41 regulator series fixes
the review comments received on v1 and adds the dts patches at the end.

Bjorn Andersson (11):
  soc: qcom: Add device tree binding for SMEM
  soc: qcom: Add Shared Memory Manager driver
  soc: qcom: Add device tree binding for Shared Memory Device
  soc: qcom: Add Shared Memory Driver
  mfd: devicetree: bindings: Add Qualcomm SMD based RPM DT binding
  mfd: qcom-smd-rpm: Driver for the Qualcomm RPM over SMD
  regulator: qcom: smd: Regulator driver for the Qualcomm RPM
  ARM: dts: msm8974: Add tcsr mutex node
  ARM: dts: msm8974: Add smem reservation and node
  ARM: dts: msm8974: Add smd, rpm and regulator nodes
  ARM: dts: xperia-honami: Add regulator nodes for Honami

 .../devicetree/bindings/mfd/qcom-rpm-smd.txt       |  117 ++
 .../devicetree/bindings/soc/qcom/qcom,smd.txt      |   79 ++
 .../devicetree/bindings/soc/qcom/qcom,smem.txt     |   51 +
 .../boot/dts/qcom-msm8974-sony-xperia-honami.dts   |  199 +++
 arch/arm/boot/dts/qcom-msm8974.dtsi                |  106 ++
 drivers/mfd/Kconfig                                |   14 +
 drivers/mfd/Makefile                               |    1 +
 drivers/mfd/qcom-smd-rpm.c                         |  236 ++++
 drivers/regulator/Kconfig                          |   12 +
 drivers/regulator/Makefile                         |    1 +
 drivers/regulator/qcom_smd-regulator.c             |  350 ++++++
 drivers/soc/qcom/Kconfig                           |   16 +
(Continue reading)

Hai Li | 26 Jun 22:03 2015

[PATCH 0/2] drm/msm/mdp5: Refactor CTL code

Instead of allocating CTL for each CRTC, we start to associate CTL
to each display interface, which reflects real HW requirement.
It also helps in making use of HW single FLUSH feature to sync
between dual DSI pipes.

Hai Li (2):
  drm/msm/mdp5: Allocate CTL for each display interface
  drm/msm/mdp5: Allocate CTL0/1 for dual DSI single FLUSH

 drivers/gpu/drm/msm/mdp/mdp5/mdp5_cmd_encoder.c |  12 +-
 drivers/gpu/drm/msm/mdp/mdp5/mdp5_crtc.c        |  26 +---
 drivers/gpu/drm/msm/mdp/mdp5/mdp5_ctl.c         | 179 ++++++++++++++++++------
 drivers/gpu/drm/msm/mdp/mdp5/mdp5_ctl.h         |  13 +-
 drivers/gpu/drm/msm/mdp/mdp5/mdp5_encoder.c     |  18 ++-
 drivers/gpu/drm/msm/mdp/mdp5/mdp5_kms.c         |  38 +++--
 drivers/gpu/drm/msm/mdp/mdp5/mdp5_kms.h         |   8 +-
 7 files changed, 200 insertions(+), 94 deletions(-)


The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
hosted by The Linux Foundation

Archit Taneja | 26 Jun 09:45 2015

[PATCH 0/5] drm/msm/dsi: Add support for external bridge chips

The dsi driver only connects to drm_panel devices right now. drm_bridge
based devices can be used to implement external encoder chips (like DSI to
HDMI, DSI to LVDS) etc.

Make changes such that the dsi driver works with drm_bridge devices. This
enables the driver to connect with the encoder chips mentioned above.

Archit Taneja (5):
  drm/msm/dsi: Make TE gpio optional
  drm/msm/dsi: Refer to connected device as 'device' instead of 'panel'
  drm/msm/dsi: Create a helper to check if there is a connected device
  drm/msm/dsi: Allow dsi to connect to an external bridge
  drm/msm/dsi: Modify dsi manager bridge ops to work with external

 drivers/gpu/drm/msm/dsi/dsi.c         | 66 ++++++++++++++++++++++++++++++-----
 drivers/gpu/drm/msm/dsi/dsi.h         | 17 ++++++++-
 drivers/gpu/drm/msm/dsi/dsi_host.c    | 49 +++++++++++++++++---------
 drivers/gpu/drm/msm/dsi/dsi_manager.c | 55 ++++++++++++++++++-----------
 4 files changed, 141 insertions(+), 46 deletions(-)


The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
hosted by The Linux Foundation