Kaushal Kumar | 25 Jul 13:56 2014

[PATCH] sched: Remove synchronize rcu/sched calls from _cpu_down

synchronize_rcu calls fail hot-unplug latency tests since
wait_rcu_gp can have very high latency, at times up to few
hundred of millisecs.

These calls were earlier removed for the same reason by the
commit 9ee349ad6d326df3633d43f54202427295999c47, but got added
back as part of commit c4575f83b9fe87bb57b737bc8a667f746a20320a.

Moreover there should be no need for sync_sched() in _cpu_down
as stop_machine() provides that barrier implicitly.

Signed-off-by: Kaushal Kumar <kaushalk <at> codeaurora.org>
---
 kernel/cpu.c | 20 --------------------
 1 file changed, 20 deletions(-)

diff --git a/kernel/cpu.c b/kernel/cpu.c
index 887eb32..93e526c 100644
--- a/kernel/cpu.c
+++ b/kernel/cpu.c
 <at>  <at>  -311,28 +311,8  <at>  <at>  static int __ref _cpu_down(unsigned int cpu, int tasks_frozen)
 				__func__, cpu);
 		goto out_release;
 	}
-
-	/*
-	 * By now we've cleared cpu_active_mask, wait for all preempt-disabled
-	 * and RCU users of this state to go away such that all new such users
-	 * will observe it.
-	 *
(Continue reading)

Stanimir Varbanov | 24 Jul 14:45 2014

[PATCH v3 0/4] Support for Qualcomm QPNP PMIC's

Hello all,

Changes since v2:
 - 1/4 - added new line, signed-off-by / acked-by and module_authors.
 - 3/4 - the subject has been changed.

The previous v2 can be found at [1].

I'm still waiting Acks for:
 - 4/4 from Qualcomm folks.
 - 2/4 and 3/4 from DT folks.

The patchset is ready to merge version and also it can be treated as an
intermediate step until we find a solution for non-translatable peripheral
addresses.

regards,
Stan

[1] https://lkml.org/lkml/2014/7/17/877

--------------------------------------------------------------------------------

Hello everyone,

Here is the continuation of patch sets sent recently about Qualcomm
QPNP SPMI PMICs.

The previous version of the patch set can be found at [1].

(Continue reading)

Siteshwar | 23 Jul 22:28 2014
Picon

Not able to set RTC with qpnp-rtc driver

Hello,

I am trying to set RTC on Nexus 5 (which uses qpnp-rtc driver).and
getting a permission error while setting it.

I am making following call from my application with valid arguments :

ioctl(rtc_fd, RTC_SET_TIME, tod)

when I make this call I see below messages in dmesg logs :

[   26.945670] spmi_pmic_arb fc4cf000.qcom,spmi:
pmic_arb_wait_for_done: transaction denied (0x5)
[   26.945743] qcom,qpnp-rtc qpnp-rtc-f85bbe00: SPMI write failed
[   26.945856] qcom,qpnp-rtc qpnp-rtc-f85bbe00: Write to RTC reg failed 1

The transaction denied message is coming from
https://github.com/CyanogenMod/android_kernel_lge_hammerhead/blob/85564c374b6b082fc447f6dae53a630c04b4ef1c/drivers/spmi/spmi-pmic-arb.c#L158

It's fairly low level stuff and I am not sure why should it give a
permission error. The only config option I can find from documentation
is qpnp-rtc-write
(https://github.com/CyanogenMod/android_kernel_lge_hammerhead/blob/cm-11.0/Documentation/devicetree/bindings/rtc/qpnp-rtc.txt)
and it is set in my configurations. In what cases I will get this
error while setting RTC ? Could this be a bug in the driver ?

--

-- 
Regards,
Siteshwar
(Continue reading)

Kiran Padwal | 23 Jul 12:26 2014
Picon

[PATCH] tty: serial: msm: Make of_device_id array const

Make of_device_id array const, because all OF functions handle it as const.

Signed-off-by: Kiran Padwal <kiran.padwal <at> smartplayin.com>
---
 drivers/tty/serial/msm_serial.c |    2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/tty/serial/msm_serial.c b/drivers/tty/serial/msm_serial.c
index 6baf2ad..f4a85b8 100644
--- a/drivers/tty/serial/msm_serial.c
+++ b/drivers/tty/serial/msm_serial.c
 <at>  <at>  -1073,7 +1073,7  <at>  <at>  static int msm_serial_remove(struct platform_device *pdev)
 	return 0;
 }

-static struct of_device_id msm_match_table[] = {
+static const struct of_device_id msm_match_table[] = {
 	{ .compatible = "qcom,msm-uart" },
 	{ .compatible = "qcom,msm-uartdm" },
 	{}
--

-- 
1.7.9.5

Kiran Padwal | 23 Jul 09:38 2014
Picon

[PATCH] usb: phy: msm: Make of_device_id array const

Make of_device_id array const, because all OF functions handle it as const.

Signed-off-by: Kiran Padwal <kiran.padwal <at> smartplayin.com>
---
 drivers/usb/phy/phy-msm-usb.c |    2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/usb/phy/phy-msm-usb.c b/drivers/usb/phy/phy-msm-usb.c
index 78cc870..e4108ee 100644
--- a/drivers/usb/phy/phy-msm-usb.c
+++ b/drivers/usb/phy/phy-msm-usb.c
 <at>  <at>  -1429,7 +1429,7  <at>  <at>  static void msm_otg_debugfs_cleanup(void)
 	debugfs_remove(msm_otg_dbg_root);
 }

-static struct of_device_id msm_otg_dt_match[] = {
+static const struct of_device_id msm_otg_dt_match[] = {
 	{
 		.compatible = "qcom,usb-otg-ci",
 		.data = (void *) CI_45NM_INTEGRATED_PHY
--

-- 
1.7.9.5

Dolev Raviv | 23 Jul 08:31 2014

[PATCH 0/2] scsi: ufs: fix sparse tool warning in ufs driver

Few fixes noted by the sparse tool:
- make undeclared functions static
- fix endianness sparse warnings

Sujit Reddy Thumma (2):
  scsi: ufs: make undeclared functions static
  scsi: ufs: fix endianness sparse warnings

 drivers/scsi/ufs/ufshcd.c | 12 +++++++-----
 1 file changed, 7 insertions(+), 5 deletions(-)

--

-- 
1.8.5.2

--
QUALCOMM ISRAEL, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by
The Linux Foundation

Dolev Raviv | 22 Jul 16:23 2014

[PATCH V2 0/5] scsi: ufs: LU queue depth management

New version to fix multiple 'sparse' warnings.
Add a driver wide fix to the endian 'sparse' warnings.
Some UFS devices don't support a LUN queue depth same as the device queue
depth. This requires reading the unit descriptor for extracting the LU's
queue depth.

Changes from V1:
 - Add static modifier to ufshcd_query_descriptor function due to 'sparse'
   warrning in [PATCH V1 1/4]
 - Add new patch [PATCH V2 2/5] to deal with 'sparse' endian warnings
 - Fix buf_len endian on [PATCH V1 2/4]

Dolev Raviv (1):
  scsi: ufs: device query status and size check
  scsi: ufs: query descriptor API
  scsi: ufs: Logical Unit (LU) command queue depth

Sujit Reddy Thumma (2):
  scsi: ufs: fix endianness sparse warnings
  scsi: ufs: Fix queue depth handling for best effort cases

 drivers/scsi/ufs/ufs.h    |  38 +++++-
 drivers/scsi/ufs/ufshcd.c | 319 ++++++++++++++++++++++++++++++++--------------
 2 files changed, 262 insertions(+), 95 deletions(-)

--

-- 
1.8.5.2

Stephen Boyd | 21 Jul 23:26 2014

[GIT PULL] qcom clock changes for 3.17

Hi Mike,

The following changes since commit a497c3ba1d97fc69c1e78e7b96435ba8c2cb42ee:

  Linux 3.16-rc2 (2014-06-21 19:02:54 -1000)

are available in the git repository at:

  git://git.kernel.org/pub/scm/linux/kernel/git/galak/linux-qcom.git tags/qcom-clocks-for-3.17

for you to fetch changes up to e216ce60a9e05ab399d098f05cd86fd95c9da8d5:

  clk: qcom: Add support for APQ8064 multimedia clocks (2014-07-15 16:39:03 -0700)

----------------------------------------------------------------
qcom clock changes for 3.17

These patches add support for a handful of Qualcomm's SoC clock
controllers: APQ8084 gcc and mmcc, IPQ8064 gcc, and APQ8064.
There's also a small collection of bug fixes that aren't critical
-rc worthy regressions because the consumer drivers aren't present
or using the buggy clocks and one optimization for HDMI.

----------------------------------------------------------------
Georgi Djakov (4):
      clk: qcom: Add APQ8084 Global Clock Controller documentation
      clk: qcom: Add APQ8084 Global Clock Controller support
      clk: qcom: Add APQ8084 clocks for SATA, PCIe and UFS
      clk: qcom: Add APQ8084 Multimedia Clock Controller (MMCC) support

(Continue reading)

pramod gurav | 17 Jul 14:54 2014
Picon

Re: [RFC PATCH 2/3 ] usb: phy: msm: Make phy_reset clk and reset line optional.

Hi Srini,

On Thu, Jul 17, 2014 at 6:19 PM,  <pramod.gurav.etc <at> gmail.com> wrote:
> From: Srinivas Kandagatla <srinivas.kandagatla <at> linaro.org>
>
> This patch makes the phy reset clk and reset line optional as this clk
> is not available on boards like IFC6410 with APQ8064.
>
.
[snip]
.
>
>         pdata->mode = of_usb_get_dr_mode(node);
>         if (pdata->mode == USB_DR_MODE_UNKNOWN)
>  <at>  <at>  -1556,7 +1556,7  <at>  <at>  static int msm_otg_probe(struct platform_device *pdev)
>                                            np ? "phy" : "usb_phy_clk");
>         if (IS_ERR(motg->phy_reset_clk)) {
>                 dev_err(&pdev->dev, "failed to get usb_phy_clk\n");

I keep getting this error on IFC6410. Cant we suppress it?

> -               return PTR_ERR(motg->phy_reset_clk);
> +               motg->phy_reset_clk = NULL;

for non-ifc boards(having this clk), if they have this clock should
not code return on failure to get the usb_phy_clk?

>         }
>
>         motg->clk = devm_clk_get(&pdev->dev, np ? "core" : "usb_hs_clk");
(Continue reading)

prakash.burla | 17 Jul 12:26 2014

RE: Fwd: [PATCH v6 04/12] mmc: mmci: Add Qcom datactrl register variant

tested-by: Prakash Burla <prakash.burla <at> smartplayin.com>
This driver tested on AP806X with mmc Driver.

----------------------------------------------------------------------------------
From:  <srinivas.kandagatla <at> linaro.org>
Date: Mon, Jun 2, 2014 at 2:39 PM
Subject: [PATCH v6 04/12] mmc: mmci: Add Qcom datactrl register variant
To: Russell King <linux <at> arm.linux.org.uk>, Ulf Hansson
<ulf.hansson <at> linaro.org>, linux-mmc <at> vger.kernel.org
Cc: Chris Ball <chris <at> printf.net>, linux-kernel <at> vger.kernel.org,
linux-arm-msm <at> vger.kernel.org, linus.walleij <at> linaro.org, Srinivas

From: Srinivas Kandagatla <srinivas.kandagatla <at> linaro.org>

Instance of this IP on Qualcomm's SOCs has bit different layout for datactrl
register. Bit position datactrl[16:4] hold the true block size instead of power
of 2.

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla <at> linaro.org>
Reviewed-by: Linus Walleij <linus.walleij <at> linaro.org>
---
 drivers/mmc/host/mmci.c | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/drivers/mmc/host/mmci.c b/drivers/mmc/host/mmci.c
index ed20bf5..72981f6 100644
--- a/drivers/mmc/host/mmci.c
+++ b/drivers/mmc/host/mmci.c
 <at>  <at>  -60,6 +60,8  <at>  <at>  static unsigned int fmax = 515633;
  *  <at> sdio: variant supports SDIO
(Continue reading)

prakash.burla | 17 Jul 10:31 2014

RE: Fwd: [PATCH v6 12/12] mmc: mmci: Add Qualcomm Id to amba id table

tested-by: Prakash Burla <prakash.burla <at> smartplayin.com>
This driver tested on AP806X with mmc Driver.
--------------------------------------------------------------------
From:  <srinivas.kandagatla <at> linaro.org>
Date: Mon, Jun 2, 2014 at 2:40 PM
Subject: [PATCH v6 12/12] mmc: mmci: Add Qualcomm Id to amba id table
To: Russell King <linux <at> arm.linux.org.uk>, Ulf Hansson
<ulf.hansson <at> linaro.org>, linux-mmc <at> vger.kernel.org
Cc: Chris Ball <chris <at> printf.net>, linux-kernel <at> vger.kernel.org,
linux-arm-msm <at> vger.kernel.org, linus.walleij <at> linaro.org, Srinivas
Kandagatla <srinivas.kandagatla <at> linaro.org>

From: Srinivas Kandagatla <srinivas.kandagatla <at> linaro.org>

This patch adds a fake Qualcomm ID 0x00051180 to the amba_ids, as Qualcomm
SDCC controller is pl180, but amba id registers read 0x0's.
The plan is to remove SDCC driver totally and use mmci as the main SD
controller driver for Qualcomm SOCs.

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla <at> linaro.org>
---
 drivers/mmc/host/mmci.c | 23 +++++++++++++++++++++++
 1 file changed, 23 insertions(+)

diff --git a/drivers/mmc/host/mmci.c b/drivers/mmc/host/mmci.c
index 08ff8d2..fa851d5 100644
--- a/drivers/mmc/host/mmci.c
+++ b/drivers/mmc/host/mmci.c
 <at>  <at>  -190,6 +190,23  <at>  <at>  static struct variant_data variant_ux500v2 = {
        .pwrreg_nopower         = true,
(Continue reading)


Gmane