1 Dec 2008 01:08
Re: atmel_spi and dataflash problems on at91rm9200
Ulf Samuelsson <ulf.samuelsson <at> atmel.com>
2008-12-01 00:08:12 GMT
2008-12-01 00:08:12 GMT
> Hi, > O.K it does not appear to be a NAND device as such, and your good to > either 33 or 66MHZ depending on the read mode, > so obviously the device has got to be able to work way above the > 5mhz your using now. > You better check the errata #13 of the AT91RM9200 before running SPI above 5 Mbps. You will need to have a fix in H/W if you want to run faster. Best Regards Ulf Samuelsson > Also you need a logic analyser or storage scope, it will allow you to > see the command sequence in & out of the chip. > > > Yes the device is driven by the #cs, which WILL terminate the read > (6.1 in data sheet), have a look to see what is driving the #cs > transition > > Also if we look at (1,6) of the data sheet is says the device can be > configured one of 2 ways, > 1. (power of 2 binary page size), I don't know if your reading 1024 or > 1056 bytes and assuming something is missing, because of the device > setting. > >(Continue reading)
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