opreport error

I'm working on porting oprofile to the Freescale e500 processor.  I  
downloaded oprofile-0.8.1, and added the event list for ppc/e500.  I  
added support in arch/ppc/oprofile, and built and installed oprofile on  
my system.  I have two problems:

When my system boots, I start oprofile, thusly:

opcontrol --init
opcontrol --vmlinux=/root/afleming/vmlinux-oprofile  
--event=CPU_CLK:100000:0:1:1
opcontrol --start

This frequently does not actually invoke start in my code.  Is there  
something I am missing?

Anyway, if I invoke
opcontrol --start

again, my debug output indicates that the counters are properly  
started, and I invoke
opcontrol --shutdown

I can confirm that /var/lib/oprofile/samples has a large number of  
entries, but I am unfamiliar with what is normal.  opreport exits  
thusly:
opreport error:  
/var/lib/oprofile/samples/current/{root}/bin/bash/{dep}/{root}/bin/ 
bash/CPU_CLK.100000.0.all.all.all: Invalid argument

It's quite possible that I'm doing something wrong, but I haven't been  

Re: New and improved patch for Power4 and Power5

Maynard P. Johnson wrote:
> John Levon wrote:
> 
>> On Tue, Sep 14, 2004 at 12:22:30PM -0500, Maynard P. Johnson wrote:
>>
>>
>>> Here's that patch with the change in opcontrol to use a for-loop.
>>>
>>
>>
>> BTW, changelogs inline in the email from now on please. I took pity the
>> first time :)
> 
> John,
> OK, will do.  As you guessed, I'm a newbie at this.  Thanks for the help.
> 
> As I mentioned, I will write up some documentation on the new function 
> to be added to sections of the oprofile user manual.  One of the pieces 
> of information to be documented is the specific kernel version that is 
> required.  My colleague, Carl Love, has been working that end of things, 
> but as of today, not all changes have gotten into the mainline kernel 
> yet.  Once we have that info, I'll send you the documentation updates. 
> Do you want the doc updates in the form of a patch?  The oprofile 
> website states "You will need to have an XSL stylesheets installation 
> (and xsltproc etc.) installed to change the documentation."  Can anyone 
> point me to any place where I can find out more about how to do this?
> 
> Thanks.
> Regards,

Re: New and improved patch for Power4 and Power5

Re: New and improved patch for Power4 and Power5

Carl Love wrote:
> Will:
> 
> Unlike Intel where there is a separate register to program the event for 
> each performance counter, the Power 4 and Power 5 have two registers 
> that hold the events for all counters. These registers are called mmcr0 
> and mmcr1. Additionally, there are bits in these registers that 
> configure the Muxes that control the routing of the event bits to the 
> performance counters. Due to routing conflicts, you can not arbitrarily 
> route any performance event to any register. Hence, you end up selecting 
> a set of events you want to program. There is a program that is used to 
> try and figure out the mux settings and mapping of the events to the 
> counters. A program is used because the mapping is complex. If it is 
> possible to do the map/route the signals for the selected events, you 
> get back the mmcr register values other wise it fails. The group of 
> events are then referred to as a group and are defined by the mmcr 
> register values. Hence you cannot select events from different groups 
> because the register settings are different for each group and there is 
> one set of registers to hold the events. Furthermore, the groups that 
> were used are the set of groups that the hardware team has put together 
> and verified a working. I chose not to include the program that would 
> try to create the mmcr register settings from an arbitrary set of events 
> because I can't guarantee that the mapping will succeed.
> 
> I am looking for some publicly available Power 5 architecture links that 
> I can send you. I have some on Power 4 that I will send to you.
> 
> Carl Love

Okay so this is something like the Pentium II where there is a single 
register holding the event information. However, there are restrictions 
on events muxs selection. The manual I am looking at (archpub3.pdf) 
doesn't go into much detail. It says "see Book IV" and I haven't found a 
copy of book IV on the web. It shows 4 bits for each of the eight counters.

-Will

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Re: New and improved patch for Power4 and Power5

Re: New and improved patch for Power4 and Power5

Maynard P. Johnson wrote:
> John Levon wrote:
> 
>> On Tue, Sep 14, 2004 at 12:22:30PM -0500, Maynard P. Johnson wrote:
>>
>>
>>> Here's that patch with the change in opcontrol to use a for-loop.
>>>
>>
>>
>> BTW, changelogs inline in the email from now on please. I took pity the
>> first time :)
> 
> John,
> OK, will do.  As you guessed, I'm a newbie at this.  Thanks for the help.
> 
> As I mentioned, I will write up some documentation on the new function 
> to be added to sections of the oprofile user manual.  One of the pieces 
> of information to be documented is the specific kernel version that is 
> required.  My colleague, Carl Love, has been working that end of things, 
> but as of today, not all changes have gotten into the mainline kernel 
> yet.  Once we have that info, I'll send you the documentation updates. 
> Do you want the doc updates in the form of a patch?  The oprofile 
> website states "You will need to have an XSL stylesheets installation 
> (and xsltproc etc.) installed to change the documentation."  Can anyone 
> point me to any place where I can find out more about how to do this?
> 
> Thanks.
> Regards,
> Maynard
> 

Looking through the oprofile code for the kernel for the ppc64
oprofile support oprof_ppc64_ops.cpu_type can be set to the following
in arch/ppc64/oprofile/common.c:

"ppc64/power3";
"ppc64/rs64";
"ppc64/power4";
"ppc64/970";
"ppc64/power5";

The patch only handles "ppc64/power4" and "ppc64/power5".  On one 
machine got:

# more /dev/oprofile/cpu_type
ppc64/970

As a result got non-helpful answer (should print out the reported cpu_type):

# op_help
cpu_type '(null)' is not valid

Are there similar patches for the power3, rs64, and 970? Is the 970 the 
same as power4? Why the distinction between power4 and 970 in the 
kernel's oprofile driver?

-Will

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Re: New and improved patch for Power4 and Power5

Carl Love wrote:
> Will:
> 
> Here is a link to the various architecture books. Last night I verified 
> that the link is accessible from outside IBM. Sorry it took so long to 
> send the link. I really wanted to make sure that the web page was 
> visible from outside IBM.
> 
> http://www-106.ibm.com/developerworks/eserver/articles/archguide.html
> 
> Carl Love
> 

I have these and looked through them. Book III seemed like the best bet, 
but it refers to a Book IV which wasn't available on the web page. Book 
III describes the registers in appendix E, but doesn't give any detail 
about the events or the constraints on the combinations of events. Page 
97 of Book III says:

The bit definitions of MMCR1 are as follows. MMCR1
bits that are not implemented are treated as
reserved.
Bit(s)  Description
0:4     PMC3 Selector (PMC3SEL)
5:9     PMC4 Selector (PMC4SEL)
10:14   PMC5 Selector (PMC5SEL)
15:19   PMC6 Selector (PMC6SEL)
20:24   PMC7 Selector (PMC7SEL)

Each of these fields contains a code (one of at
most 32 values) that identifies the event to be
counted in PMCs 3 through 7 respectively; see
Book IV.

For power4+ on page 105 pretty much the same thing:

32:36   PMC3 Selector (PMC3SEL)
37:41   PMC4 Selector (PMC4SEL)
42:46   PMC5 Selector (PMC5SEL)
47:51   PMC6 Selector (PMC6SEL)
52:56   PMC7 Selector (PMC7SEL)
57:61   PMC8 Selector (PMC8SEL)
         Each of these fields contains a code (one of at
         most 32 values) that identifies the event to be
         counted in PMCs 3 through 8 respectively; see
         Book IV.

-Will

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Re: New and improved patch for Power4 and Power5

power5 performance event groups

I was trying some tests we have at Red Hat to verify that the power5 
oprofile support is working. Since the power5 expects things to be in 
the same monitoring group I tried the following experiment:

[root <at> localhost oprofile]# /usr/bin/opcontrol --setup --no-vmlinux 
--event=PM_INST_FROM_L3_G52:500000:0 
--event=PM_INST_FROM_L1_G52:500000:0 --event=PM_INST_CMPL_G52:500000:0 
--event=PM_RUN_CYC_G52:500000:0
[root <at> localhost oprofile]# /usr/bin/opcontrol --start
ERROR: The specified events are not from the same group.
         Use 'opcontrol --list-events' to see event groupings.

According to the pcc64/power5/events all these events should be in the 
same group. A similar grouping worked fine.

[root <at> localhost oprofile]# /usr/bin/opcontrol --setup --no-vmlinux 
--event=PM_MRK_LSU_FLUSH_ULD_G126:500000:0 
--event=PM_INST_CMPL_G126:500000:0 --event=PM_RUN_CYC_G126:500000:0
[root <at> localhost oprofile]# /usr/bin/opcontrol --start Using 2.6+ 
OProfile kernel interface. Using log file /var/lib/oprofile/oprofiled.log
Daemon started.
Profiler running.

-Will

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Re: New and improved patch for Power4 and Power5

William Cohen wrote:
> 
> 
> Carl Love wrote:
> 
>> Will:
>>
>> Here is a link to the various architecture books. Last night I 
>> verified that the link is accessible from outside IBM. Sorry it took 
>> so long to send the link. I really wanted to make sure that the web 
>> page was visible from outside IBM.
>>
>> http://www-106.ibm.com/developerworks/eserver/articles/archguide.html
>>
>> Carl Love
>>
> 
> I have these and looked through them. Book III seemed like the best bet, 
> but it refers to a Book IV which wasn't available on the web page. ...
 >
 > -Will
 >

Unfortunately, Book IV is still classified as "IBM Confidential".  I've 
been working with several people within IBM in an effort to identify the 
performance monitoring information that should be extracted from this 
and other confidential documents.  So there is movement in the right 
direction on this, but I don't have a date by which that documentation 
will be made public.  When we added the Power4/5 support to OProfile, we 
included event groups which our own internal performance benchmark 
people found useful.  Other users will, I'm sure, find need to monitor 
other events.  The good news here is that with a little help from Carl 
or me (or another IBMer with access to the currently confidential 
information), additional events and their corresponding MMCR values can 
be easily added.

--

-- 
Maynard Johnson

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