Gavin Shan | 10 Feb 07:02 2016
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[PATCH v14 0/9] EEH Support for SRIOV VFs

This applies to linux-powerpc-next and additional unmerged patches:

[v2,1/4] powerpc/eeh: Fix stale cached primary bus
powerpc/eeh: fix incorrect function name in comment
[V2] powerpc/powernv: Remove support for p5ioc2
[V7,1/6] powerpc/powernv: don't enable SRIOV when VF BAR has non 64bit-prefetchable BAR
92e963f Linux 4.5-rc1 - Linux powerpc next branch

This patchset enables EEH on SRIOV VFs. The general idea is to create proper
VF edev and VF PE and handle them properly.

Different from the Bus PE, VF PE just contain one VF. This introduces the
difference of EEH error handling on a VF PE. Generally, it has several
differences.

First, the VF's removal and re-enumerate rely on its PF. VF has a tight
relationship between its PF. This is not proper to enumerate a VF by usual
scan procedure. That's why virtfn_add/virtfn_remove are exported in this patch
set.

Second, the reset/restore of a VF is done in kernel space. FW is not aware of
the VF, this means the usual reset function done in FW will not work. One of
the patch will imitate the reset/restore function in kernel space.

Third, the VF may be removed during the PF's error_detected function. In this
case, the original error_detected->slot_reset->resume sequence is not proper
to those removed VFs, since they are re-created by PF in a fresh state. A flag
in eeh_dev is introduce to mark the eeh_dev is in error state. By doing so, we
track whether this device needs to be reset or not.

(Continue reading)

Duc Dang | 10 Feb 02:49 2016

[PATCH] pci: xgene: Add ECAM fixups

X-Gene PCIe controller does not fully support ECAM.
This patch adds required ECAM fixup to allow X-Gene
PCIe controller to be functional in ACPI boot mode.

This patch is based on the original work of
Mark Salter <msalter <at> redhat.com> and depends on
Tomasz's PCIe ACPI series:
https://lkml.org/lkml/2016/2/4/646

Signed-off-by: Duc Dang <dhdang <at> apm.com>
---
 drivers/pci/host/pci-xgene.c | 130 ++++++++++++++++++++++++++++++++++++++++++-
 1 file changed, 127 insertions(+), 3 deletions(-)

diff --git a/drivers/pci/host/pci-xgene.c b/drivers/pci/host/pci-xgene.c
index ae00ce2..5d3f74e 100644
--- a/drivers/pci/host/pci-xgene.c
+++ b/drivers/pci/host/pci-xgene.c
 <at>  <at>  -29,6 +29,11  <at>  <at> 
 #include <linux/pci.h>
 #include <linux/platform_device.h>
 #include <linux/slab.h>
+#ifdef CONFIG_ACPI
+#include <linux/acpi.h>
+#include <linux/ecam.h>
+#include <linux/pci-acpi.h>
+#endif

 #define PCIECORE_CTLANDSTATUS		0x50
 #define PIM1_1L				0x80
(Continue reading)

Bhaskar Jupudi | 9 Feb 23:10 2016

[PATCH] drivers/pci:Broken link fixed

From: cmps107-njupudi <njupudi <at> ucsc.edu>

Dell developed a way to consistently name devices, 
and their last proposal was accepted under the name biosdevname.

Signed-off-by: Naga Venkata Sai Indubhaskar Jupudi <njupudi <at> ucsc.edu>
---
Proposal 1 provides a character device interface to ethernet devices.

Proposal 2 is implemented in the same way as proposal 1 except that
device nodes are created without any changes in the kernel.

Proposal 3 is an installer based proposal where it provides the user 
with options to rename network interfaces.

Proposal 4 exports system firmware provided SMBIOS strings on
onboard devices to sysfs.

Proposal 5 uses the firmware provided index to derive ethN names

Proposal 6 is named as biosdevname and renames network interfaces 
to a different names space and accepted upstream.

 drivers/pci/pci-label.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/pci/pci-label.c b/drivers/pci/pci-label.c
index 024b5c1..27143a0 100644
--- a/drivers/pci/pci-label.c
+++ b/drivers/pci/pci-label.c
(Continue reading)

jakeo | 9 Feb 20:24 2016
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[PATCH RESEND v2 0/3] PCI: hv: New paravirtual PCI front-end driver

From: Jake Oshins <jakeo <at> microsoft.com>

This version incorporates feedback from Bjorn Helgaas and fixes a build
break reported by the kbuild test robot.

This is a resend of patches that enable PCI pass-through within Hyper-V
VMs.  This patch series only includes those which were deemed appropriate
for being incorportated via the PCI tree.  All other patches in previous
patch series have gone through other trees and are now in mainline.

The first two patches modify PCI so that new root PCI buses can be marked with
an associated fwnode_handle, and so that root PCI buses can look up their
associated IRQ domain by that handle.

The last patch, introduces a new driver, hv_pcifront, which exposes root PCI
buses in a Hyper-V VM.  These root PCI buses expose real PCIe devices, or PCI
Virtual Functions.

Jake Oshins (3):
  PCI: Add fwnode_handle to pci_sysdata
  PCI: irqdomain: Look up IRQ domain by fwnode_handle
  PCI: hv: New paravirtual PCI front-end for Hyper-V VMs

 MAINTAINERS                   |    1 +
 arch/x86/include/asm/pci.h    |   15 +
 drivers/pci/Kconfig           |    7 +
 drivers/pci/host/Makefile     |    1 +
 drivers/pci/host/pci-hyperv.c | 2373 +++++++++++++++++++++++++++++++++++++++++
 drivers/pci/probe.c           |   15 +
 include/linux/pci.h           |    4 +
(Continue reading)

kelly.zytaruk | 9 Feb 19:08 2016
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[PATCH] PCI: Support SRIOV on Legacy EndPoint device

From: Kelly Zytaruk <kelly.zytaruk <at> amd.com>

It is not neccessary to check for PCI_EXP_TYPE in sriov_init().  There appears to be no reason for the check.

Some AMD GPUs have hardware support for grapics SRIOV.
If the GPU has a display output then the GPU needs to support Legacy VGA operation.
If CLASS_CODE = VGA then the device should have a Port Type = Legacy EndPoint.
Therefore in order to enable SRIOV on a GPU with a display output, LEGACY_END_POINT is supported as a valid
Port Type by removing the check for Port Type.

Patch is also logged in Bugzilla #112221

Signed-off-by: Kelly Zytaruk <kelly.zytaruk <at> amd.com>
---
 drivers/pci/iov.c |    4 ----
 1 file changed, 4 deletions(-)

diff --git a/drivers/pci/iov.c b/drivers/pci/iov.c
index 31f31d4..fe4bd0a 100644
--- a/drivers/pci/iov.c
+++ b/drivers/pci/iov.c
 <at>  <at>  -387,10 +387,6  <at>  <at>  static int sriov_init(struct pci_dev *dev, int pos)
 	struct resource *res;
 	struct pci_dev *pdev;

-	if (pci_pcie_type(dev) != PCI_EXP_TYPE_RC_END &&
-	    pci_pcie_type(dev) != PCI_EXP_TYPE_ENDPOINT)
-		return -ENODEV;
-
 	pci_read_config_word(dev, pos + PCI_SRIOV_CTRL, &ctrl);
(Continue reading)

我的相片在 | 9 Feb 18:24 2016

我的相片在

你的老朋友邀你来Q群:343257759
Kelly Zytaruk | 9 Feb 16:41 2016
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[PATCH] [PATCH] PCI: Support SRIOV on Legacy EndPoint device

It is not neccessary to check for PCI_EXP_TYPE in sriov_init().  There appears to be no reason for the check.

Some AMD GPUs have hardware support for grapics SRIOV.
If the GPU has a display output then the GPU needs to support Legacy VGA operation.
If CLASS_CODE = VGA then the device should have a Port Type = Legacy EndPoint.
Therefore in order to enable SRIOV on a GPU with a display output, LEGACY_END_POINT is supported as a valid
Port Type by removing the check for Port Type.

Patch is also logged in Bugzilla #112221

Signed-off-by: Kelly Zytaruk <kelly.zytaruk <at> amd.com>
---
 drivers/pci/iov.c |    4 ----
 1 file changed, 4 deletions(-)

diff --git a/drivers/pci/iov.c b/drivers/pci/iov.c
index 31f31d4..fe4bd0a 100644
--- a/drivers/pci/iov.c
+++ b/drivers/pci/iov.c
 <at>  <at>  -387,10 +387,6  <at>  <at>  static int sriov_init(struct pci_dev *dev, int pos)
 	struct resource *res;
 	struct pci_dev *pdev;

-	if (pci_pcie_type(dev) != PCI_EXP_TYPE_RC_END &&
-	    pci_pcie_type(dev) != PCI_EXP_TYPE_ENDPOINT)
-		return -ENODEV;
-
 	pci_read_config_word(dev, pos + PCI_SRIOV_CTRL, &ctrl);
 	if (ctrl & PCI_SRIOV_CTRL_VFE) {
 		pci_write_config_word(dev, pos + PCI_SRIOV_CTRL, 0);
(Continue reading)

Joao Pinto | 8 Feb 18:45 2016

[PATCH v9 0/2] adding PCI support to AXS10x

This patch set has the goal to add suppport for DesignWare PCIe RC in ARC
AXS10x. It includes the necessary tweaks to:
 - the ARC architecture (PCI support)
 - the PCI subsystem (ARC CPU support)
 - to pcie-designware (Centralisation of wait for link routine)
 - to dra7xx, exynos, imx6 and spear13xx drivers to use the centralised
 code for link wait

A simple module was (pcie-designware-plat) was created to contain the 
specific platform init code.

The patches were produced against Bjorn Helgaas' repository. It was properly
tested in an IP Prototyping Kit.

Joao Pinto (2):
  PCI support added to ARC
  pcie-designware platform driver

 .../devicetree/bindings/pci/designware-pcie.txt    |  17 +++
 arch/arc/Kconfig                                   |  23 ++++
 arch/arc/include/asm/dma.h                         |   5 +
 arch/arc/include/asm/io.h                          |   9 ++
 arch/arc/include/asm/pci.h                         |  31 +++++
 arch/arc/kernel/Makefile                           |   1 +
 arch/arc/kernel/pcibios.c                          |  23 ++++
 arch/arc/plat-axs10x/Kconfig                       |   1 +
 drivers/pci/Makefile                               |   1 +
 drivers/pci/host/Kconfig                           |  11 ++
 drivers/pci/host/Makefile                          |   1 +
 drivers/pci/host/pci-dra7xx.c                      |  11 +-
(Continue reading)

Sean O. Stalley | 5 Feb 20:59 2016
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[PATCH v3 0/2] pci/lspci: Identify Enhanced Allocation (EA) Resources

Identify BAR-equivalent resources that are described by EA entries
with the IORESOURCE_PCI_EA_BEI flag.

lspci cannot distinguish between resources from VF BARs and resources from EA.
This results in EA Resources being incorrectly identified as [virtual].
Adding this flag allows EA resources to be marked more accurately as [enhanced].

Although this patchset only add support for this flag to lspci,
there are other use cases (such as vfio) where knowing a resource
comes from EA would be useful.

[PATCH 1/2] is for the kernel, [PATCH 2/2] is for lspci.

Changes from V1: 
	-Rewrote commit message for linux changes

Changes from V2: 
	- Rewrote commit message for linux, fixing spelling :)
	- Added warning about resource flags being exposed in sysfs

Alex Williamson (1):
  pci: Identify Enhanced Allocation (EA) BAR Equivalent resources

Sean O. Stalley (1):
  Add support for enhanced allocation regions

linux changes:
 drivers/pci/pci.c      | 2 +-
 include/linux/ioport.h | 7 +++++++
 2 files changed, 8 insertions(+), 1 deletion(-)
(Continue reading)

Joao Pinto | 5 Feb 20:55 2016

[PATCH v3] synopsys pcie rc generic platform driver update

This patch tries to improve the host/pcie-synopsys branch including a new
driver name, more accurate documentation and centralized link up validation.
Other platform drivers were also updated to include the new centralized link
up validation function.

Signed-off-by: Joao Pinto <jpinto <at> synopsys.com>
---
Changes v2->v3:
 - Created a dw_pcie_wait_for_link_up() function in pcie-designware
 - Updated all the platform drivers that were using the link wait routine to
 use the pcie-designware'
 - Complemented pcie-designware-pltfm.txt with more info
 PS: not able to generate a "rename files merged diff" patch
Changes v1->v2:
 - Patch description was not correct
Changes v1:
 - driver name was changed from pcie-synopsys to pcie-designware-pltfm
 - mdelay() replaced for msleep() in the new driver
 - Devicetree bindings for the new driver was updated (config space 
 removed from ranges and new compatibility strings were introduced)
 - Unnecessary synopsys_pcie_irq_handler() was removed
 - Driver compatibility strings updated

 .../bindings/pci/pcie-designware-pltfm.txt         |  38 +++++++
 .../devicetree/bindings/pci/pcie-synopsys.txt      |  33 ------
 drivers/pci/host/Kconfig                           |   8 +-
 drivers/pci/host/Makefile                          |   2 +-
 drivers/pci/host/pci-dra7xx.c                      |   8 +-
 drivers/pci/host/pci-exynos.c                      |   9 +-
 drivers/pci/host/pci-imx6.c                        |   8 +-
(Continue reading)

Joao Pinto | 5 Feb 15:33 2016

[PATCH] synopsys pcie rc generic platform driver update

The patch work consisted of:
- driver name was changed from pcie-synopsys to pcie-dw-pltfm
- mdelay() replaced for msleep() in the new driver
- Devicetree bindings for the new driver was updated (config space removed
from ranges and new compatibility strings were introduced)
- Unnecessary synopsys_pcie_irq_handler() was removed
- Driver compatibility strings updated

Signed-off-by: Joao Pinto <jpinto <at> synopsys.com>
---
 .../bindings/pci/pcie-designware-pltfm.txt         |  37 +++
 .../devicetree/bindings/pci/pcie-synopsys.txt      |  33 ---
 drivers/pci/host/Kconfig                           |   8 +-
 drivers/pci/host/Makefile                          |   2 +-
 drivers/pci/host/pcie-designware-pltfm.c           | 239 ++++++++++++++++++++
 drivers/pci/host/pcie-synopsys.c                   | 250 ---------------------
 6 files changed, 281 insertions(+), 288 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/pci/pcie-designware-pltfm.txt
 delete mode 100644 Documentation/devicetree/bindings/pci/pcie-synopsys.txt
 create mode 100644 drivers/pci/host/pcie-designware-pltfm.c
 delete mode 100644 drivers/pci/host/pcie-synopsys.c

diff --git a/Documentation/devicetree/bindings/pci/pcie-designware-pltfm.txt b/Documentation/devicetree/bindings/pci/pcie-designware-pltfm.txt
new file mode 100644
index 0000000..77b2637
--- /dev/null
+++ b/Documentation/devicetree/bindings/pci/pcie-designware-pltfm.txt
 <at>  <at>  -0,0 +1,37  <at>  <at> 
+Synopsys PCI RC IP Reference plaftform driver
+---------------------------------------------
(Continue reading)


Gmane