Sean Cross | 19 Dec 09:10 2014

[PATCH 0/2] Add support for kosagi novena

The Kosagi Novena mainboard contains an i.MX6, along with a PCI Express slot.
This patchset adds regulator support to the PCI Express slot, and adds
device tree support for the Novena mainboard.

Sean Cross (2):
  PCI: imx6: Add power-supply support
  ARM: dts: imx6q: add Novena board

 .../devicetree/bindings/pci/fsl,imx6q-pcie.txt     |   3 +
 arch/arm/boot/dts/Makefile                         |   1 +
 arch/arm/boot/dts/imx6q-novena.dts                 | 893 +++++++++++++++++++++
 drivers/pci/host/pci-imx6.c                        |  20 +-
 4 files changed, 916 insertions(+), 1 deletion(-)
 create mode 100644 arch/arm/boot/dts/imx6q-novena.dts

--

-- 
2.1.3

Rusty Russell | 19 Dec 01:49 2014
Picon

Adding an ops to struct pci_host_bridge?

Hi,

        On powerpc, we have a possibly-programmable device (CXL) which
we're making look a lot like a PCI bus containing devices.  Rather than
hacking "if (is_really_cxl(dev))" into every powerpc pcibios_* routine,
Ben Herrenschmidt suggested moving from pcibios_* to an ops structure
inside pci_host_bridge.

        In transition, it'd be up to the arch (ie. powerpc) to call
find_pci_host_bridge(dev->bus)->ops->xxx from their pcibios_ functions,
but if there's general interest other archs could start doing it too.

If this seems like a nice idea, we can discuss which pcibios_ functions
make sense to place into ops.

Thanks,
Rusty.
Murali Karicheri | 17 Dec 19:02 2014
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[RFC PATCH 0/2] PCI: get DMA configuration from parent device

Keystone PCI devices requires the dma_pfn_offset to be set correctly
so that the PCI devices get the right DMA mask to function. This
patch adds a helper function to get this configuration from the root
bridge's parent device. The probe.c code now calls this helper to set
the default dma configuration if the parent device is dma capable.

Typically, dma-ranges are defined in the DT node of the SoC and gets
updated in the root bridge's parent device structure. My original
patch for this was at [1] which was NACK-ed and this is an attempt
to implement a better solution. This may have side effects that I am
unware of. So sending as a RFC patch to get feedback before sending
the formal patch. Please review and provide me the comment so that
I can incorporate the same.

[1] http://www.gossamer-threads.com/lists/linux/kernel/2024591

Murali Karicheri (2):
  common: dma-mapping: introduce dma_get_parent_cfg() helper
  PCI: get device dma configuration from parent

 drivers/base/dma-mapping.c  |   18 ++++++++++++++++++
 drivers/pci/probe.c         |   20 +++++++++++++++++---
 include/linux/dma-mapping.h |    3 +++
 3 files changed, 38 insertions(+), 3 deletions(-)

--

-- 
1.7.9.5

ratheesh kannoth | 16 Dec 18:51 2014
Picon

sysfs-pci remove

Hi list,

https://www.kernel.org/doc/Documentation/filesystems/sysfs-pci.txt
talks about "remove" entry.
The 'remove' file is used to remove the PCI device, by writing a non-zero
integer to the file.  if i remove the device , will the bar resource
map still appear on /proc/iomem ?

-Ratheesh
Bjorn Helgaas | 11 Dec 18:34 2014
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Special handling of display/VGA devices in hotplug drivers

It looks like you added the initial pciehp driver [1], which includes
the following code in pciehp_disable_slot():

+ if (class_code == PCI_BASE_CLASS_DISPLAY) {
+ /* Display/Video adapter (not supported) */
+ rc = REMOVE_NOT_SUPPORTED;

+ /* If it's a bridge, check the VGA Enable bit */
+ if ((header_type & 0x7F) == PCI_HEADER_TYPE_BRIDGE) {
+ rc = pci_bus_read_config_byte (pci_bus, devfn, PCI_BRIDGE_CONTROL, &BCR);
+ if (rc)
+ return rc;
+
+ /* If the VGA Enable bit is set, remove isn't supported */
+ if (BCR & PCI_BRIDGE_CTL_VGA) {
+ rc = REMOVE_NOT_SUPPORTED;

I'm trying to figure out why VGA devices are handled specially.  I
can't find anything in the PCI specs that mentions this.  Most of the
other PCI hotplug drivers have similar code.  Do you remember anything
about this?

Bjorn

[1] https://git.kernel.org/cgit/linux/kernel/git/tglx/history.git/commit/drivers/pci/hotplug/pciehp_ctrl.c?id=c16b4b14d9806e639f4afefa2d651a857a212afe
Gavin Shan | 11 Dec 07:03 2014
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[PATCH RFC] PCI: Turn off BARs when disabling device

When unbinding PCI device mlx4 from its driver, the PCI device is
disabled by pci_disable_device() and the BARs (IO and memory) should
be disabled at the point. However, the memory BARs are still active
after the mlx4_core driver is unloaded as following logs show.

 # lspci -vv -s 0003:0f:00.0
 0003:0f:00.0 Network controller: Mellanox Technologies \
              MT27500 Family [ConnectX-3]
 Subsystem: Mellanox Technologies Device 0061
 Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- \
          ParErr+ Stepping- SERR+ FastB2B- DisINTx+
    :
 Kernel driver in use: mlx4_core
 # echo 0003:0f:00.0 > /sys/bus/pci/drivers/mlx4_core/unbind
 # lspci -vv -s 0003:0f:00.0
 0003:0f:00.0 Network controller: Mellanox Technologies \
              MT27500 Family [ConnectX-3]
 Subsystem: Mellanox Technologies Device 0061
 Control: I/O- Mem+ BusMaster- SpecCycle- MemWINV- VGASnoop- \
          ParErr+ Stepping- SERR+ FastB2B- DisINTx-

The patch turns off all BARs (IO and memory) in do_pci_disable_device().

Signed-off-by: Gavin Shan <gwshan <at> linux.vnet.ibm.com>
---
 drivers/pci/pci.c | 12 +++++++-----
 1 file changed, 7 insertions(+), 5 deletions(-)

diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
index 625a4ac..8d2924b 100644
(Continue reading)

Yinghai Lu | 11 Dec 01:19 2014

[PATCH -v2] PCI: Clear all bridge res MEM_64 if host bridge has non mem64

So we could use bridge 64bit mem pref for children mem pref instead of
forcing them into bridge mem.

Could help Marek's system as his system is using _CRS, and all mem res is under
4G.

-v2: fix checking logic problem found by Gravin and Wei.

Link: https://bugzilla.kernel.org/show_bug.cgi?id=85491
Reported-by: Marek Kordik <kordikmarek <at> gmail.com>
Fixes: 5b28541552ef ("PCI: Restrict 64-bit prefetchable bridge windows to 64-bit resources")
Signed-off-by: Yinghai Lu <yinghai <at> kernel.org>

---
 drivers/pci/host-bridge.c |    7 +++++++
 drivers/pci/pci.h         |    1 +
 drivers/pci/probe.c       |    9 +++++++++
 drivers/pci/setup-bus.c   |    3 +++
 include/linux/pci.h       |    1 +
 5 files changed, 21 insertions(+)

Index: linux-2.6/drivers/pci/host-bridge.c
===================================================================
--- linux-2.6.orig/drivers/pci/host-bridge.c
+++ linux-2.6/drivers/pci/host-bridge.c
 <at>  <at>  -31,6 +31,13  <at>  <at>  void pci_set_host_bridge_release(struct
 	bridge->release_data = release_data;
 }

+bool pcibios_host_bridge_has_mem64_res(struct pci_bus *bus)
(Continue reading)

Wei Yang | 10 Dec 15:34 2014
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Re: [PATCH] PCI: Clear all bridge res MEM_64 if host bridge has non mem64

My mutt hang, in case the mail isn't sent out, I resend it.

On Wed, Dec 10, 2014 at 10:15:37PM +0800, Wei Yang wrote:
>On Tue, Dec 09, 2014 at 03:13:49PM -0800, Yinghai Lu wrote:
>>On Tue, Dec 9, 2014 at 1:53 PM, Bjorn Helgaas <bhelgaas <at> google.com> wrote:
>>> On Tue, Dec 9, 2014 at 2:34 PM, Yinghai Lu <yinghai <at> kernel.org> wrote:
>>>> +       list_for_each_entry(window, &bridge->windows, list) {
>>>> +               res = window->res;
>>>> +               if (resource_type(res) == IORESOURCE_MEM ||
>>>> +                   res->end > 0xffffffff) {
>>>> +                       bridge->has_mem64_res = true;
>>>
>>> This is an interesting idea, but I think you're checking CPU addresses
>>> here, and you need to check PCI bus addresses.
>>
>>Looks like those IBM platforms have res > 4g, but pci bus address < 4g.
>>If we check pci bus address, and then we would break those platforms.
>>

Hi, Yinghai

I did some test with patch on my machine. It looks good.

While as Bjorn mentioned, I think we could change it a little. The pci space
on our machine is like this:

        cpu address                               pci address
  MEM   0x00003ff280000000..0x00003ff2fffeffff -> 0x00000000 8000 0000
  MEM64 0x00003d5000000000..0x00003d5fffffffff -> 0x00003d50 0000 0000

(Continue reading)

Ray Jui | 10 Dec 01:04 2014

[PATCH 0/4] Add PCIe support to Broadcom iProc

This patchset contains the initial PCIe support for Broadcom iProc family of
SoCs. This driver has been validated with Cygnus and NSP and is expected to
work on other iProc family of SoCs that deploy the same PCIe controller

Ray Jui (4):
  pci: iProc: define Broadcom iProc PCIe binding
  PCI: iproc: Add Broadcom iProc PCIe driver
  ARM: mach-bcm: Enable PCIe support for iProc
  ARM: dts: enable PCIe for Broadcom Cygnus

 .../devicetree/bindings/pci/brcm,iproc-pcie.txt    |   62 ++
 arch/arm/boot/dts/bcm-cygnus.dtsi                  |   43 +
 arch/arm/boot/dts/bcm958300k.dts                   |    8 +
 arch/arm/mach-bcm/Kconfig                          |    1 +
 drivers/pci/host/Kconfig                           |    9 +
 drivers/pci/host/Makefile                          |    1 +
 drivers/pci/host/pcie-iproc.c                      |  896 ++++++++++++++++++++
 7 files changed, 1020 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/pci/brcm,iproc-pcie.txt
 create mode 100644 drivers/pci/host/pcie-iproc.c

--

-- 
1.7.9.5

Yinghai Lu | 9 Dec 22:34 2014

[PATCH] PCI: Clear all bridge res MEM_64 if host bridge has non mem64

So we could use bridge 64bit mem pref for children mem pref instead of
forcing them into bridge mem.

Could help Marek's system as his system is using _CRS, and all mem res is under
4G.

Link: https://bugzilla.kernel.org/show_bug.cgi?id=85491
Reported-by: Marek Kordik <kordikmarek <at> gmail.com>
Fixes: 5b28541552ef ("PCI: Restrict 64-bit prefetchable bridge windows to 64-bit resources")
Signed-off-by: Yinghai Lu <yinghai <at> kernel.org>

---
 drivers/pci/host-bridge.c |    7 +++++++
 drivers/pci/pci.h         |    1 +
 drivers/pci/probe.c       |    9 +++++++++
 drivers/pci/setup-bus.c   |    3 +++
 include/linux/pci.h       |    1 +
 5 files changed, 21 insertions(+)

Index: linux-2.6/drivers/pci/host-bridge.c
===================================================================
--- linux-2.6.orig/drivers/pci/host-bridge.c
+++ linux-2.6/drivers/pci/host-bridge.c
 <at>  <at>  -31,6 +31,13  <at>  <at>  void pci_set_host_bridge_release(struct
 	bridge->release_data = release_data;
 }

+bool pcibios_host_bridge_has_mem64_res(struct pci_bus *bus)
+{
+	struct pci_host_bridge *bridge = find_pci_host_bridge(bus);
(Continue reading)

Dennis McLeod | 9 Dec 22:22 2014
Picon

PCI BAR sysfs node permissions

need help figuring out how to make this happen. If my pci driver is
instructed to open a pci device, I want to change the mode of bar0's
sysfs node to o+rw so a user app can mmap it.

In other words, from the driver, perform this:
chmod 766 /sys/bus/pci/[slot path]/resource0
preferably without a lecture on why I shouldn't .. ;-)

If I chmod that sysfs node for bar0 as root, i can run a user process
(as regular user) that does an mmap of that and can do reads/writes to
the bar resource. I would like for my pci driver to do this
automatically when it is told to open a device.

Please help!

Gmane