Bjorn Helgaas | 31 Oct 17:54 2014
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[GIT PULL] PCI fixes for v3.18

Hi Linus,

These changes, intended for v3.18, fix:

  - An unintentional sysfs filename change.  5136b2da770d, which appeared
    in v3.13, changed "enable" to "enabled", and this changes it back.  Old
    users of "enable" are currently broken and will be helped by this
    change.  Anything that started to use "enabled" after v3.13 will be
    broken by this change.  If necessary, we can add a symlink to make both
    work, but this patch doesn't do that.

    See http://lkml.kernel.org/r/20141030163028.GA22250 <at> kroah.com ("[PATCH]
    PCI: fix name of 'enable' sysfs file").

  - An i.MX6 clock problem that prevents mx6 nitrogen boards from booting.

  - A mistaken duplicate merge that added a check twice.  Nothing's broken;
    this just removes the unnecessary code.

Bjorn

The following changes since commit f114040e3ea6e07372334ade75d1ee0775c355e1:

  Linux 3.18-rc1 (2014-10-19 18:08:38 -0700)

are available in the git repository at:

  git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci.git tags/pci-v3.18-fixes-1

for you to fetch changes up to d8e7d53a2fc14e0830ab728cb84ee19933d3ac8d:
(Continue reading)

Greg Kroah-Hartman | 30 Oct 17:30 2014

[PATCH] PCI: fix name of 'enable' sysfs file

From: Greg Kroah-Hartman <gregkh <at> linuxfoundation.org>

Back in commit 5136b2da770d ("PCI: convert bus code to use dev_groups"),
I misstyped the 'enable' sysfs file as 'enabled', which broke the
userspace api.  This patch fixes that issue by renaming the file back.

Reported-by: Jeff Epler <jepler <at> unpythonic.net>
Cc: stable <stable <at> vger.kernel.org> # 3.13
Signed-off-by: Greg Kroah-Hartman <gregkh <at> linuxfoundation.org>

---

Jeff, if you could test this to make sure I got it right, that would be
great.  Again, sorry about this, it was a dumb typo on my part.

diff --git a/drivers/pci/pci-sysfs.c b/drivers/pci/pci-sysfs.c
index 92b6d9ab00e4..2c6643fdc0cf 100644
--- a/drivers/pci/pci-sysfs.c
+++ b/drivers/pci/pci-sysfs.c
 <at>  <at>  -185,7 +185,7  <at>  <at>  static ssize_t modalias_show(struct device *dev, struct device_attribute *attr,
 }
 static DEVICE_ATTR_RO(modalias);

-static ssize_t enabled_store(struct device *dev, struct device_attribute *attr,
+static ssize_t enable_store(struct device *dev, struct device_attribute *attr,
 			     const char *buf, size_t count)
 {
 	struct pci_dev *pdev = to_pci_dev(dev);
 <at>  <at>  -210,7 +210,7  <at>  <at>  static ssize_t enabled_store(struct device *dev, struct device_attribute *attr,
 	return result < 0 ? result : count;
(Continue reading)

Lorenzo Pieralisi | 30 Oct 12:44 2014

[RFC PATCH 0/2] arm: pcibios: remove pci_sys_data domain

This patchset is a first RFC stab at removing the dependency on pci_sys_data
domain field on ARM platforms and by replacing it with generic code that
stashes the domain value in the pci_bus control structure, introduced in

commit 41e5c0f81d3e676d671d96a0a1fafb27abfbd9
("of/pci: Add pci_get_new_domain_nr() and of_get_pci_domain_nr()")

commit 670ba0c8883b576d0aec28bd7a838358a4be1
("PCI: Add generic domain handling")

All the drivers converted (apart from PCIe designware, tested on iMX6SL)
were only compile tested for lack of HW, so along some comments, testing
and verifying that patchset does not break any existing platform are
very appreciated.

Code in drivers/pci/pci-mvebu.c has been changed to add a domain
number to PCI resources by using the nr value coming from the setup
pcibios32 callback, which may not be correct and should be considered
a temporary solution waiting for review comments.

The patchset removes entirely the pci_sys_data.domain field, since its
usage is removed at the same time in the respective host controllers
and ARM is made to select the configuration option
CONFIG_PCI_DOMAINS_GENERIC by default, which compiles a domain_nr in the
pci_bus structure so that the pci_domain_nr() look-up can rely on it.

Lorenzo Pieralisi (2):
  arm: cns3xxx: pci: remove artificial dependency on pci_sys_data domain
  arm: pcibios: move to generic PCI domains

(Continue reading)

Huang Rui | 30 Oct 11:08 2014
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[PATCH v4 00/20] usb: dwc3: add support for AMD Nolan SoC

Hi,

The series of patches add AMD Nolan (NL) SoC support for DesignWare USB3
OTG IP with PCI bus glue layer. This controller supported hibernation, LPM
erratum and used the 2.80a IP version and amd own phy. Current
implementation support both simulation and SoC platform. And already tested
with gadget zero and msc tool. It works well on file storage gadget.

These patches are generated on balbi/testing/next

Changes from v3 -> v4
- Add comment on hibernation patch
- Fix typos of commit log and comments
- Remove WARN_ON for temporary solution of FPGA board
- Rename tx deemph to tx de-emphasis
- Add documentation under Documentation/devicetree/bindings/usb/dwc3.txt
- Check FPGA flag on usb3 and usb2 suspend phy quirk
- Refine description of PCI quirk patch
- Remove amd_nl_plat flag at dwc3 structure
- Make HIRD threshold configurable

Changes from v2 -> v3
- Confirmed these quirks will be needed in product level
- Move AMD configuration patch to the last one with all quirk flags
- Make all quirks as 1-bit field instead of single-bits on a 32-bit
  variable
- Add all quirks DeviceTree counterparts
- Make LPM erratum configurable
- Add PCI ID into pci_ids.h because it will be used both on PCI and DWC3
  device driver.
(Continue reading)

Aravind Gopalakrishnan | 29 Oct 22:18 2014
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[PATCH V3 4/4] edac, amd64_edac: Add F15h M60h support

This patch adds support for ECC error decoding for F15h M60h processor.
Aside from the usual changes, the patch adds support for some new features
in the processor:
 - DDR4(unbuffered, registered); LRDIMM DDR3 support
   - relevant debug messages have been modified/added to report these
     memory types
 - new dbam_to_cs mappers
   - if (F15h M60h && LRDIMM); we need a 'multiplier' value to find
     cs_size. This multiplier value is obtained from the per-dimm
     DCSM register. So, change the interface to accept a 'cs_mask_nr'
     value to facilitate this calculation
 - switch-casing determine_memory_type()
   - done to cleanse the function of too many if-else statements
     and improve readability
   - This is now called early in read_mc_regs() to cache dram_type

Misc cleanup:
 - amd64_pci_table[] is condensed by using PCI_VDEVICE macro.

Testing details:
Tested the patch by injecting 'ECC' type errors using mce_amd_inj
and error decoding works fine.

Signed-off-by: Aravind Gopalakrishnan <Aravind.Gopalakrishnan <at> amd.com>
---
Changes in V3
 - Re-work per-family low_op for determine_memory_type() as
   switch-case
 - Rebase work on top of latest tip.git

(Continue reading)

Huang Rui | 28 Oct 12:54 2014
Picon

[PATCH v3 00/19] usb: dwc3: add support for AMD Nolan SoC

Hi,

The series of patches add AMD Nolan (NL) SoC support for DesignWare USB3
OTG IP with PCI bus glue layer. This controller supported hibernation, LPM
erratum and used the 2.80a IP version and amd own phy. Current
implementation support both simulation and SoC platform. And already tested
with gadget zero and msc tool. It works well on file storage gadget.

These patches are generated on balbi/testing/next

Changes from v2 -> v3
- Confirmed these quirks will be needed in product level
- Move AMD configuration patch to the last one with all quirk flags
- Make all quirks as 1-bit field instead of single-bits on a 32-bit
  variable
- Add all quirks DeviceTree counterparts
- Make LPM erratum configurable
- Add PCI ID into pci_ids.h because it will be used both on PCI and DWC3
  device driver.

Changes from v1 -> v2
- Remove dual role function temporarily
- Add pci quirk to avoid to bind with xhci driver
- Distinguish between simulation board and soc
- Break down all the special quirks

Patch 1:
- Enable hibernation

Patch 2:
(Continue reading)

Bjorn Helgaas | 27 Oct 18:23 2014
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Re: [Bug 86951] New: iommu regression

[+to linux-pci, +cc Alex]

On Sun, Oct 26, 2014 at 7:56 AM,  <bugzilla-daemon <at> bugzilla.kernel.org> wrote:
> https://bugzilla.kernel.org/show_bug.cgi?id=86951
>
>             Bug ID: 86951
>            Summary: iommu regression
>            Product: Drivers
>            Version: 2.5
>     Kernel Version: 3.13
>           Hardware: All
>                 OS: Linux
>               Tree: Mainline
>             Status: NEW
>           Severity: normal
>           Priority: P1
>          Component: PCI
>           Assignee: drivers_pci <at> kernel-bugs.osdl.org
>           Reporter: nodenet <at> hotmail.com
>         Regression: No
>
> I am trying to make a Digium TDM410 PCI card available to a guest VM via VT-d /
> IOMMU. This appears to work under kernel 3.2 but not via any later kernel
> tested since.
>
> I noted pci_find_upstream_pcie_bridge errors
> (https://bugzilla.kernel.org/show_bug.cgi?id=44881) which appear resolved in
> 3.17 and above but was advised to file a new bug as this appears to be a new
> problem.
>
(Continue reading)

Richard Zhu | 27 Oct 06:17 2014

[PATCH V3]PCI: imx6: Wait the clocks to stabilize after ref_en

Hi Bjorn:
Can you pick up this patch as the fix for v3.18?
Thanks in advanced.

Fabio suggested to resend this patch only, because that he notice that
the kernel does not boot anymore since commit  3fce0e882f61
(PCI: imx6: Delay enabling reference clock for SS until it stabilizes)
on a system that does not pass the PCI gpio reset in the dtb. This causes
a regression on mx6 nitrogen boards.

Add "Acked-by: Lucas Stach <l.stach <at> pengutronix.de>" into the patch.
Remove "Tested-by: Tim Harvey <tharvey <at> gateworks.com>" from this patch.

[PATCH V3] PCI: imx6: Wait the clocks to stabilize after ref_en
Jiang Liu | 27 Oct 06:20 2014
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[Patch v7 00/18] Enable support of IOAPIC hotplug on x86 platforms

This patch set enhances IOAPIC core and ACPI drivers to support IOAPIC
hotplug on x86 platforms. It's based on v3.18-rc2 at
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git

You may pull it from 
https://github.com/jiangliu/linux.git ioapic/hotplug_v7

We have pick up several patches from Yinghai's original IOAPIC hotplug
patch set and reimplemented IOAPIC driver as an ACPI driver instead of
a PCI driver.

It has been tested on a 4-socket Intel SDV with socket hot-addition
capability. Any suggestions are welcomed!

Patch 1-3 are bugfixes against v3.17 and should target v3.18. Patch 1
has been merged into tip/x86/urgent.
Patch 4-7 are bugfixes and enhancements to ACPI subsystem
Patch 8 killes PCI IOAPIC driver
Patch 9-17 enhances IOAPIC core to support IOAPIC hotplug
Patch 18 reimplements ACPI IOAPIC driver and enables IOAPIC hotplug

V6->V7:
1) Rebase to v3.18-rc2
2) Three bugfixes for v3.18
V5->V6:
1) Rebase to the latest v3.17-16
2) Minor fixes for comments
V4->V5:
1) Fix a building error
2) Don't rename processor_core.c as apic_id.c
(Continue reading)

Yijing Wang | 27 Oct 03:44 2014

[PATCH 0/3] xen MSI code clean up


Yijing Wang (3):
  x86/xen: Introduce a global flag to fix the MSI mask bug
  x86/xen: Revert "PCI: Add x86_msi.msi_mask_irq() and msix_mask_irq()"
  s390/MSI: Use __msi_mask_irq() instead of default_msi_mask_irq()

 arch/s390/pci/pci.c             |    4 ++--
 arch/x86/include/asm/x86_init.h |    3 ---
 arch/x86/kernel/x86_init.c      |   10 ----------
 arch/x86/pci/xen.c              |   15 +++------------
 drivers/pci/msi.c               |   29 ++++++++++++-----------------
 include/linux/msi.h             |    5 +++--
 6 files changed, 20 insertions(+), 46 deletions(-)

Yijing Wang | 27 Oct 03:15 2014

[PATCH] MSI: Remove the redundant irq_set_chip_data()

Currently, pcie-designware, pcie-rcar and pci-tegra drivers
use irq chip_data to save the msi_chip pointer. They
already call irq_set_chip_data() in their own MSI irq map
functions. And chip_data is an opaque pointer, how to use
it is arch dependent. It should not be placed in MSI core.

Signed-off-by: Yijing Wang <wangyijing <at> huawei.com>
Reviewed-by: Thierry Reding <treding <at> nvidia.com>
---
 drivers/pci/msi.c |    5 ++---
 1 files changed, 2 insertions(+), 3 deletions(-)

diff --git a/drivers/pci/msi.c b/drivers/pci/msi.c
index 9fab30a..38511d9 100644
--- a/drivers/pci/msi.c
+++ b/drivers/pci/msi.c
 <at>  <at>  -41,14 +41,13  <at>  <at>  int __weak arch_setup_msi_irq(struct pci_dev *dev, struct msi_desc *desc)
 	if (err < 0)
 		return err;

-	irq_set_chip_data(desc->irq, chip);
-
 	return 0;
 }

 void __weak arch_teardown_msi_irq(unsigned int irq)
 {
-	struct msi_chip *chip = irq_get_chip_data(irq);
+	struct msi_desc *entry = irq_get_msi_desc(irq);
+	struct msi_chip *chip = entry->dev->bus->msi;
(Continue reading)


Gmane