Tejun Heo | 23 Jul 16:58 2014

[GIT PULL] a libata regression fix for v3.16-rc6

Hello, Linus.

The last libata/for-3.16-fixes pull contained a regression introduced
by 1871ee134b73 ("fb4cadab75752a7152ed2813c751") which in turn was a
fix for a regression introduced earlier while changing queue tag order
to accomodate hard drives which perform poorly if tags are not
allocated in circular order (ugh...).

The regression happens only for SAS controllers making use of libata
to serve ATA devices.  They don't fill an ata_host field which is used
by the new tag allocation function leading to NULL dereference.  This
patch adds a new intermediate field ata_host->n_tags which is
initialized for both SAS and !SAS cases to fix the issue.


The following changes since commit b32bfc06aefab61acc872dec3222624e6cd867ed:

  ahci: add support for the Promise FastTrak TX8660 SATA HBA (ahci mode) (2014-07-18 18:00:50 -0400)

are available in the git repository at:

  git://git.kernel.org/pub/scm/linux/kernel/git/tj/libata.git for-3.16-fixes

for you to fetch changes up to 1a112d10f03e83fb3a2fdc4c9165865dec8a3ca6:

  libata: introduce ata_host->n_tags to avoid oops on SAS controllers (2014-07-23 10:30:34 -0400)

Tejun Heo (1):
(Continue reading)

Tejun Heo | 22 Jul 22:11 2014

Re: [PATCH 2/2] libata: Fix NULL pointer of scsi_host in ata_port


Can you please test the following patch?

diff --git a/drivers/ata/libata-core.c b/drivers/ata/libata-core.c
index d19c37a7..773f4e6 100644
--- a/drivers/ata/libata-core.c
+++ b/drivers/ata/libata-core.c
 <at>  <at>  -4798,9 +4798,8  <at>  <at>  void swap_buf_le16(u16 *buf, unsigned int buf_words)
 static struct ata_queued_cmd *ata_qc_new(struct ata_port *ap)
 	struct ata_queued_cmd *qc = NULL;
-	unsigned int i, tag, max_queue;
-	max_queue = ap->scsi_host->can_queue;
+	unsigned int max_queue = ap->host->n_tags;
+	unsigned int i, tag;

 	/* no command while frozen */
 	if (unlikely(ap->pflags & ATA_PFLAG_FROZEN))
 <at>  <at>  -6094,6 +6093,7  <at>  <at>  void ata_host_init(struct ata_host *host, struct device *dev,
+	host->n_tags = ATA_MAX_QUEUE;
 	host->dev = dev;
 	host->ops = ops;
 <at>  <at>  -6179,11 +6179,7  <at>  <at>  int ata_host_register(struct ata_host *host, struct scsi_host_template *sht)
 	 * The max queue supported by hardware must not be greater than
(Continue reading)

Mike Qiu | 22 Jul 16:50 2014

[PATCH 1/2] libata: Fix scsi_host can_queue issue in ata_qc_new()

The can_queue in scsi_host can be more than ATA_MAX_QUEUE (32),
for example, in ipr, it can be 100 or more.

Also, some drivers, like ipr driver, haven't filled the field
scsi_host in ata_port, and will lead a call trace, so add
check for that.

Signed-off-by: Mike Qiu <qiudayu <at> linux.vnet.ibm.com>
 drivers/ata/libata-core.c | 15 ++++-----------
 1 file changed, 4 insertions(+), 11 deletions(-)

diff --git a/drivers/ata/libata-core.c b/drivers/ata/libata-core.c
index 259d879..a5b9c70 100644
--- a/drivers/ata/libata-core.c
+++ b/drivers/ata/libata-core.c
 <at>  <at>  -4734,7 +4734,10  <at>  <at>  static struct ata_queued_cmd *ata_qc_new(struct ata_port *ap)
 	struct ata_queued_cmd *qc = NULL;
 	unsigned int i, tag, max_queue;

-	max_queue = ap->scsi_host->can_queue;
+	if (ap->scsi_host && ap->scsi_host->can_queue <= ATA_MAX_QUEUE)
+		max_queue = ap->scsi_host->can_queue;
+	else
+		max_queue = ATA_MAX_QUEUE;

 	/* no command while frozen */
 	if (unlikely(ap->pflags & ATA_PFLAG_FROZEN))
 <at>  <at>  -6109,16 +6112,6  <at>  <at>  int ata_host_register(struct ata_host *host, struct scsi_host_template *sht)
(Continue reading)

Kiran Padwal | 22 Jul 16:15 2014

[PATCH] ahci: st: Make of_device_id array const

Make of_device_id array const, because all OF functions handle it as const.

Signed-off-by: Kiran Padwal <kiran.padwal21 <at> gmail.com>
 drivers/ata/ahci_st.c |    2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/ata/ahci_st.c b/drivers/ata/ahci_st.c
index 2595598..29821b9 100644
--- a/drivers/ata/ahci_st.c
+++ b/drivers/ata/ahci_st.c
 <at>  <at>  -221,7 +221,7  <at>  <at>  static int st_ahci_resume(struct device *dev)

 static SIMPLE_DEV_PM_OPS(st_ahci_pm_ops, st_ahci_suspend, st_ahci_resume);

-static struct of_device_id st_ahci_match[] = {
+static const struct of_device_id st_ahci_match[] = {
 	{ .compatible = "st,ahci", },


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Tim Small | 22 Jul 15:28 2014

[PATCH] sata_sil24: Identify which card suffered IRQ status error

In machines with multiple Silicon Image 3124 and/or 3132 cards, there is no
way to tell which card is the culprit when the sata_sil24 interrupt handler
gets a bad status.

Tested-by: tim <at> seoss.co.uk
Signed-off-by: tim <at> seoss.co.uk


I got the following fault on a machine with five SiI3124 / 3132 cards in total
so I patched the driver to report the PCI slot number too.  The resulting code
seems to identify the card as desired...

old output:

sata_sil24: IRQ status == 0xffffffff, PCI fault or device removal?

new output:

sata_sil24 0000:08:04.0: IRQ status == 0xffffffff, PCI fault or device removal?



diff --git a/drivers/ata/sata_sil24.c b/drivers/ata/sata_sil24.c
index 0534890..d81b20d 100644
--- a/drivers/ata/sata_sil24.c
+++ b/drivers/ata/sata_sil24.c
 <at>  <at>  -1154,8 +1154,8  <at>  <at>  static irqreturn_t sil24_interrupt(int irq, void *dev_instance)
(Continue reading)

David Miller | 22 Jul 07:37 2014


Please pull to get these IDE fixes:

1) Fix interrupt registry for some Atari IDE chipsets.

2) Adjust Kconfig dependencies for x86_32 specific chips.


The following changes since commit 0c0bd34a142963ca3454f530e47ce1c230d8cc9d:

  Merge branch 'sched-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
(2014-03-03 10:49:24 -0800)

are available in the git repository at:

  git://git.kernel.org/pub/scm/linux/kernel/git/davem/ide.git master

for you to fetch changes up to 5b40dd30bbfaa7fcba0cd945a4852a146c552ea7:

  ide: Fix SC1200 dependencies (2014-03-17 15:57:28 -0400)

Jean Delvare (2):
      ide: Fix CS5520 and CS5530 dependencies
      ide: Fix SC1200 dependencies

Michael Schmitz (1):
      m68k/atari - ide: do not register interrupt if host->get_lock is set

(Continue reading)

Tejun Heo | 21 Jul 14:17 2014

[GIT PULL] libata fixes for v3.16-rc6

Hello, Linus.

Late libata fixes.

The most important one is from Kevin Hao which makes sure that libata
only allocates tags inside the max tag number the controller supports.
libata always had this problem but the recent tag allocation change
and addition of support for sata_fsl which only supports queue depth
of 16 exposed the issue.

Hans de Goede agreed to become the maintainer of libahci_platform
which is under higher than usual development pressure from all the new
controllers popping up from the ARM world.


The following changes since commit 2a0bdff6b958d1b2523d2754b6cd5e0ea4053016:

  ahci_xgene: fix the dma state machine lockup for the IDENTIFY DEVICE PIO mode command. (2014-07-08
11:46:05 -0400)

are available in the git repository at:


for you to fetch changes up to b32bfc06aefab61acc872dec3222624e6cd867ed:

  ahci: add support for the Promise FastTrak TX8660 SATA HBA (ahci mode) (2014-07-18 18:00:50 -0400)

(Continue reading)

Antoine Ténart | 18 Jul 14:29 2014

[PATCH v10 0/8] ARM: berlin: add AHCI support

Tejun, Kishon, Sebastian,

I looked into the AHCI framework to see how to map PHYs and ports
information. I see two ways of doing this:
  - We can attach the ahci_port_priv to the ahci_host_priv structure,
    but that would require quite a lot of changes since the
    ahci_port_priv is initialized at the very end (in port_start()) and
    because ahci_port_priv is currently retrieved from the ata_port
    structure in libahci functions. We do want to parse the dt ports
    early in the AHCI initialization to be able to generate the right
    port_map mask. Tests would be needed to ensure nothing is broken.
  - We can move the PHY handling to where the ports are handled, moving
    PHYs from ahci_host_priv to ahci_port_priv. This also would require
    to perform some tests as PHY operations would be moved from
    libahci_platform to libahci.

In both cases we do not have time to do this for the next release, as
the request popped up quite late.

So as of now:
  - Either the series is merged as is and changes to the AHCI framework
    can be made for 3.18, as it's not particularly linked to this
  - Or you really do not want it. Then that would be great if patches
    1-2 and 7-8 could be merged so that we do not end up with this big
    series going for yet another cycle... I think Kishon already took
    patches 1-2.

I've done the required modifications so that port_map is not used
anymore as a mask during the initialization (patch 3).
(Continue reading)

Mr. Alfred Robert | 17 Jul 07:50 2014

Kindly consider my proposal

---------------------------- Original Message ----------------------------
Good day

My name is Alfred Robert and I work with the finance house here in the
Netherlands. I found your address through my countries international
Web directory. During our last meeting and examination of the bank
accounts here in the Netherlands, my department found a dormant account
with an enormous sum of US$ 6,500,000.00 (Six million five hundred
thousand US dollar) which was deposited by late Mr. Williams
from England.

Before his death he transferred the sum of US$ 6,500,000.00 (Six million
five hundred thousand US dollar) to a bank here in Netherlands. From our
investigation he had no beneficiary or next of kin to claim these funds.
The financial regulations of our bank allow only a foreigner to stand as
next relatives or next of kin. The request of a foreigner as a next of kin
is base on the fact that the depositor was a foreigner and somebody in the
Netherlands cannot stand as the next of kin.

I need your permission as the next relative or next of kin of our deceased
customer, so that the funds can be released and transferred to your
account, at the end of the transaction 40% will be for you and 60% will be
for me and my colleague.
We need a foreign account. I still work at the financial house and that's
the actual reason that I need a second party or person to stand and work
with me and apply to the bank here in the Netherlands as the next of kin.
I have in my possession all the necessary documents to have this
transaction carried out successfully.

Further information will be provided upon the receipt of your prompt
(Continue reading)

Kumar Gala | 16 Jul 18:10 2014

[PATCH v8 1/2] phy: qcom: Add driver for QCOM IPQ806x SATA PHY

Add a PHY driver for uses with AHCI based SATA controller driver on the
IPQ806x family of SoCs.

Signed-off-by: Kumar Gala <galak <at> codeaurora.org>
* Add comment about the mb()

* Fix compilation issues due to change in devm_phy_create API

* Add platform_set_drvdata

* Fix copy/paste error when killing qcom_ipq806x_sata_delay_us

* removed qcom_ipq806x_sata_delay_us as it was only used one

* Added Kconfig HAS_IOMEM dep
* re-ordered probe function so phy_provider_register is last

* dropped unused dev pointer in struct qcom_ipq806x_sata_phy
* remove unnecessary reg initializaiton
* Removed unneeded error message
* Added remove function to disable the clock

(Continue reading)

Mikko Perttunen | 16 Jul 10:54 2014

[PATCH v3 0/8] Serial ATA support for NVIDIA Tegra124


This series adds support for the onboard AHCI-compliant Serial ATA
controller found on Tegra124 systems-on-chip.

A branch containing the series is located at 
branch ahci-rel-v3.

Changes in v3:
- Fixed style issues in driver
- Changed resource management to use libahci_platform's functions
  I opted to not add reset_control support to libahci_platform yet
  in the interest of getting this series into 3.17. Adding support
  probably requires breaking the existing API and getting ACKs from
  the maintainers of each platform driver.
- Removed code that reads the calibration set to use from fuses.
  The new-style fuse driver this requires is also going in for 3.17,
  so this should make merging easier. For now, the driver defaults
  to assuming FUSE_SATA_CALIB = 0, which works at least for my testing
  hardware. This should be changed to read the actual fuse once the
  fuse series has landed.

Mikko Perttunen (8):
  of: Add NVIDIA Tegra SATA controller binding
  ARM: tegra: Add SATA controller to Tegra124 device tree
  ARM: tegra: Add SATA and SATA power to Jetson TK1 device tree
  clk: tegra: Enable hardware control of SATA PLL
  clk: tegra: Add SATA clocks to Tegra124 initialization table
  ata: ahci_platform: Increase AHCI_MAX_CLKS to 4
(Continue reading)