Dmitry Torokhov | 14 Nov 22:39 2014

[PATCH] sata_fsl: fix error handling of irq_of_parse_and_map

irq_of_parse_and_map() returns 0 on error (the result is unsigned int),
so testing for negative result never works.

Signed-off-by: Dmitry Torokhov <dtor <at> chromium.org>
---

Not tested, found by casual code inspection.

 drivers/ata/sata_fsl.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/ata/sata_fsl.c b/drivers/ata/sata_fsl.c
index 4217415..f9054cd 100644
--- a/drivers/ata/sata_fsl.c
+++ b/drivers/ata/sata_fsl.c
 <at>  <at>  -1488,7 +1488,7  <at>  <at>  static int sata_fsl_probe(struct platform_device *ofdev)
 	host_priv->csr_base = csr_base;

 	irq = irq_of_parse_and_map(ofdev->dev.of_node, 0);
-	if (irq < 0) {
+	if (!irq) {
 		dev_err(&ofdev->dev, "invalid irq from platform\n");
 		goto error_exit_with_cleanup;
 	}
-- 
2.1.0.rc2.206.gedb03e5

--

-- 
Dmitry
--
(Continue reading)

Tejun Heo | 14 Nov 21:43 2014

[GIT PULL] libata fixes for v3.18-rc4

Hello, Linus.

libata fixes for v3.18-rc4.

The most notable is the revert of lock splitting optimization in ahci.
This also made the IRQ handling threaded even when there's only one
IRQ in use.  The conversion missed IRFQ_SHARED leading to screaming
IRQs problem in some cases and the threaded IRQ handling showed
performance regression in some LKP test cases.  The changes are
reverted for now.  It'll probably be retried once threaded IRQ
handling is removed from ahci.

Other than that, there's one fix for ahci and several patches adding
device IDs.

Thanks.

The following changes since commit cac7f2429872d3733dc3f9915857b1691da2eb2f:

  Linux 3.18-rc2 (2014-10-26 16:48:41 -0700)

are available in the git repository at:

  git://git.kernel.org/pub/scm/linux/kernel/git/tj/libata.git for-3.18-fixes

for you to fetch changes up to 9a23c1d6f0f5dbac4c9b73fa6cea7c9ee3d29074:

  ahci: fix AHCI parameters not taken into account (2014-11-04 12:56:25 -0500)

----------------------------------------------------------------
(Continue reading)

Jagan Teki | 14 Nov 13:55 2014
Picon

read performance is too low compared to write - /dev/sda1

Hi,

I'm doing a performance testing on my bench ARM box.

1. dd test: I have validate the read and write by mounting /dev/sda1
with ext4 filesystem,
    able to get the good performance numbers where read is high
compared to write

2.  robocopy test:
     - mkfs.ext4 /dev/sda1
     - mount /dev/sda1 /media/disk
     - << configured samba >>
     - Mapped the /media/disk on windows
     - login on the mapped driver in windows
     - did a robocopy test, where write got 84MBps and read 14MBps

read performance is too slow when compared to write in robocopy case.
Can anyone help me out, how to debug this further.

thanks!
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Hans de Goede | 13 Nov 10:44 2014
Picon

[PATCH resend regression?] AHCI: Fix threaded interrupt setup

Hi Tejun,

Since this patch mentioned sunxi it gained my attention, but as it touches
ahci core code I was expecting you to pick it up, which seems to not have
happened, so hence this resend.

FWIW I've tried to reproduce the problem, but it does not reproduce for me,
that does not mean it is not a real problem though. I'm afraid I'm to
unfamiliar with the ahci interrupt handling to say anything more sensible
about this.

It looks like this is a 3.18 regression, so if this is a real issue, we
should probably get this patch in for 3.18 .

Regards,

Hans
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support2341 | 10 Nov 06:53 2014

A recommendation from Support


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You’ll meet one Millionaire Money Machine user who 
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(Continue reading)

Robert Richter | 10 Nov 06:30 2014

[PATCH] AHCI: Add generic MSI-X interrupt support to SATA PCI driver

From: Sunil Goutham <sgoutham <at> cavium.com>

This patch adds generic support for MSI-X interrupts to the SATA PCI
driver. Only single interrupt support is implemented. Thus, per-port
interrupts can not yet be enabled.

The driver now checks the device for the existence of MSI-X and tries
to enable the interrupt. Otherwise, if a device is not MSI-X capable,
the initialization is skipped and MSI or intx interrupts are
configured.

This patch also enables AHCI for Cavium Thunder SoCs that uses MSI-X.

Signed-off-by: Sunil Goutham <sgoutham <at> cavium.com>
Signed-off-by: Robert Richter <rrichter <at> cavium.com>
---
 arch/arm64/Kconfig |  1 +
 drivers/ata/ahci.c | 40 +++++++++++++++++++++++++++++++++++++++-
 2 files changed, 40 insertions(+), 1 deletion(-)

diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
index ac9afde76dea..55970474d3ae 100644
--- a/arch/arm64/Kconfig
+++ b/arch/arm64/Kconfig
 <at>  <at>  -145,6 +145,7  <at>  <at>  config ARCH_THUNDER
 	bool "Cavium Inc. Thunder SoC Family"
 	help
 	  This enables support for Cavium's Thunder Family of SoCs.
+	select SATA_AHCI

(Continue reading)

support2341 | 7 Nov 18:55 2014

A recommendation from Support


Hello,

Hey Friend,

As you know, I’m always on the lookout for 
real ways to make decent money.       
                                                     
Not just a measly $20 or $30 a day; I mean real money. 

$20,000 or $30,000 A DAY?!?! Now THAT is…

DAMN GOOD REAL MONEY!

His 6 figure bank accounts now are a pretty good 
indicator that Trevor Haynes has figured it out.

Check this out -  http://tinyurl.com/ko7bljk


The Millionaire Money Machine has nothing to do with 
eBooks, websites, T-shirts, MLM, gambling, writing, 
flipping sites or any of that.

THIS isn’t about making ten buck here or there. 

It’s about making TENS OF THOUSANDS DAILY.

You’ll meet one Millionaire Money Machine user who 
banked over $30K overnight… 

(Continue reading)

Devin Ryles | 7 Nov 23:59 2014
Picon

[PATCH 2/3] AHCI: Add DeviceIDs for Sunrise Point-LP SATA controller

From f01919cca1259bb2eec1c6db00cf31055a5c481d Mon Sep 17 00:00:00 2001
From: Devin Ryles <devin.ryles <at> intel.com>
Date: Wed, 5 Nov 2014 17:41:22 -0500
Subject: [PATCH 2/3] AHCI: Add DeviceIDs for Sunrise Point-LP SATA
controller

This patch adds DeviceIDs for Sunrise Point-LP

Signed-off-by: Devin Ryles <devin.ryles <at> intel.com>
---
 drivers/ata/ahci.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/ata/ahci.c b/drivers/ata/ahci.c
index 5f039f1..50d9de5 100644
--- a/drivers/ata/ahci.c
+++ b/drivers/ata/ahci.c
 <at>  <at>  -313,6 +313,9  <at>  <at>  static const struct pci_device_id ahci_pci_tbl[] = {
 	{ PCI_VDEVICE(INTEL, 0x8c87), board_ahci }, /* 9 Series RAID */
 	{ PCI_VDEVICE(INTEL, 0x8c8e), board_ahci }, /* 9 Series RAID */
 	{ PCI_VDEVICE(INTEL, 0x8c8f), board_ahci }, /* 9 Series RAID */
+	{ PCI_VDEVICE(INTEL, 0x9d03), board_ahci }, /* Sunrise Point-LP AHCI*/
+	{ PCI_VDEVICE(INTEL, 0x9d05), board_ahci }, /* Sunrise Point-LP RAID*/
+	{ PCI_VDEVICE(INTEL, 0x9d07), board_ahci }, /* Sunrise Point-LP RAID*/

 	/* JMicron 360/1/3/5/6, match class to avoid IDE function */
 	{ PCI_VENDOR_ID_JMICRON, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
--

-- 
1.9.3

(Continue reading)

Hannes Reinecke | 5 Nov 13:08 2014
Picon

[PATCHv2 0/3] Initial ZAC support

Hi all,

this patchset updates the ATA stack to correctly detect
host-managed ZAC devices.

Hannes Reinecke (3):
  libsas: use ata_dev_classify()
  libata: Implement ATA_DEV_ZAC
  libata-scsi: Update SATL for ZAC drives

 drivers/ata/libata-core.c           | 20 +++++++----
 drivers/ata/libata-eh.c             |  7 ++--
 drivers/ata/libata-scsi.c           | 30 +++++++++++++++--
 drivers/ata/libata-transport.c      |  1 +
 drivers/scsi/aic94xx/aic94xx_task.c | 10 +++---
 drivers/scsi/isci/request.c         |  4 +--
 drivers/scsi/libsas/sas_ata.c       | 66 +++++++------------------------------
 drivers/scsi/mvsas/mv_sas.c         |  4 +--
 drivers/scsi/pm8001/pm8001_hwi.c    |  2 +-
 drivers/scsi/pm8001/pm80xx_hwi.c    |  2 +-
 include/linux/libata.h              |  6 ++--
 include/scsi/libsas.h               | 11 ++-----
 12 files changed, 76 insertions(+), 87 deletions(-)

--

-- 
1.8.5.2

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(Continue reading)

Barto | 3 Nov 11:34 2014
Picon

Re: FW: [PATCH V2] ata: Disabling the async PM for JMicron chips

Hello,

yes I confirm that this patch solves the problem with JMicron JMB363-368
sata/ide controlers,

I have tested this patch with kernel 3.17.2 and kernel 3.18rc3, my
JMicron JMB363/368 can now work after a standby mode,

so I hope that this patch will be merged

Le 03/11/2014 10:13, Liu, Chuansheng a écrit :
> Hello Mister,
> You should have received this email, please reply to all with your test result, which will help the patch
merged, thanks.
> 
> Best Regards
> Chuansheng
> 
> -----Original Message-----
> From: Liu, Chuansheng 
> Sent: Wednesday, September 24, 2014 3:22 PM
> To: tj <at> kernel.org; rjw <at> rjwysocki.net
> Cc: linux-ide <at> vger.kernel.org; linux-kernel <at> vger.kernel.org; mister.freeman <at> laposte.net;
Zhang, Rui; Liu, Chuansheng
> Subject: [PATCH V2] ata: Disabling the async PM for JMicron chips
> 
> Like the commit e6b7e41cdd8c ("ata: Disabling the async PM for JMicron chip 363/361"),
> Barto found the similar issue for JMicron chip 368, that 363/368 has no
> parent-children relationship, but they have the power dependency.
> 
(Continue reading)

MRS GRACE MANDA | 2 Nov 20:54 2014
Picon

(unknown)


This is Mrs Grace Manda (  Please I need your Help is Urgent). 
Attachment (Mrs Grace Manda.rtf): application/rtf, 47 KiB

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