Alexander Gordeev | 29 Sep 18:25 2014
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[PATCH v5 0/5] AHCI: Optimize interrupt processing in multi-MSI mode

Changes since v4:
  - CONFIG_SATA_HIGHBANK platform build error fixed;
  - code movement (from ahci.c to libahci.c) separated from other changes;

Changes since v3:
  - series rebased on libata/for-3.18;
  - single IRQ interrupt update removed, along with patches 4,5
    "AHCI: Get rid of redundant arg to ahci_handle_port_interrupt()"
    "AHCI: Optimize single IRQ interrupt processing" removed;
  - multi-MSI updated to skip zero value port status;

Changes since v2:
  - single patch split in a series;
  - benchmarking statistics reworded;
  - HOST_IRQ_STAT reg optimization added (patch 6);

Cc: linux-ide <at> vger.kernel.org

Alexander Gordeev (5):
  AHCI: Pass SCSI host template as arg to ahci_host_activate()
  AHCI: Move ahci_host_activate() function to libahci.c
  AHCI: Move host activation code into ahci_host_activate()
  AHCI: Make few function names more descriptive
  AHCI: Do not read HOST_IRQ_STAT reg in multi-MSI mode

 drivers/ata/acard-ahci.c       |   3 +-
 drivers/ata/ahci.c             |  66 +-----------------
 drivers/ata/ahci.h             |   8 +--
 drivers/ata/libahci.c          | 149 +++++++++++++++++++++++------------------
 drivers/ata/libahci_platform.c |   3 +-
(Continue reading)

ccscott | 25 Sep 03:13 2014

[PATCH] pata_serverworks: disable 64-KB DMA transfers on Broadcom OSB4 IDE Controller

From: Scott Carter <ccscott <at> funsoft.com>

The Broadcom OSB4 IDE Controller (vendor and device IDs: 1166:0211)
does not support 64-KB DMA transfers.
Whenever a 64-KB DMA transfer is attempted,
the transfer fails and messages similar to the following
are written to the console log:

   [ 2431.851125] sr 0:0:0:0: [sr0] Unhandled sense code
   [ 2431.851139] sr 0:0:0:0: [sr0]  Result: hostbyte=DID_OK driverbyte=DRIVER_SENSE
   [ 2431.851152] sr 0:0:0:0: [sr0]  Sense Key : Hardware Error [current]
   [ 2431.851166] sr 0:0:0:0: [sr0]  Add. Sense: Logical unit communication time-out
   [ 2431.851182] sr 0:0:0:0: [sr0] CDB: Read(10): 28 00 00 00 76 f4 00 00 40 00
   [ 2431.851210] end_request: I/O error, dev sr0, sector 121808

When the libata and pata_serverworks modules
are recompiled with ATA_DEBUG and ATA_VERBOSE_DEBUG defined in libata.h,
the 64-KB transfer size in the scatter-gather list can be seen
in the console log:

   [ 2664.897267] sr 9:0:0:0: [sr0] Send:
   [ 2664.897274] 0xf63d85e0
   [ 2664.897283] sr 9:0:0:0: [sr0] CDB:
   [ 2664.897288] Read(10): 28 00 00 00 7f b4 00 00 40 00
   [ 2664.897319] buffer = 0xf6d6fbc0, bufflen = 131072, queuecommand 0xf81b7700
   [ 2664.897331] ata_scsi_dump_cdb: CDB (1:0,0,0) 28 00 00 00 7f b4 00 00 40
   [ 2664.897338] ata_scsi_translate: ENTER
   [ 2664.897345] ata_sg_setup: ENTER, ata1
   [ 2664.897356] ata_sg_setup: 3 sg elements mapped
   [ 2664.897364] ata_bmdma_fill_sg: PRD[0] = (0x66FD2000, 0xE000)
(Continue reading)

Chuansheng Liu | 24 Sep 09:22 2014
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[PATCH V2] ata: Disabling the async PM for JMicron chips

Like the commit e6b7e41cdd8c ("ata: Disabling the async PM for JMicron chip 363/361"),
Barto found the similar issue for JMicron chip 368, that 363/368 has no
parent-children relationship, but they have the power dependency.

So here we can exclude the JMicron chips out of pm_async method directly,
to avoid further similar issues.

Details in:
https://bugzilla.kernel.org/show_bug.cgi?id=84861

Reported-and-tested-by: Barto <mister.freeman <at> laposte.net>
Signed-off-by: Chuansheng Liu <chuansheng.liu <at> intel.com>
---
 drivers/ata/ahci.c         |   11 +++++------
 drivers/ata/pata_jmicron.c |   11 +++++------
 2 files changed, 10 insertions(+), 12 deletions(-)

diff --git a/drivers/ata/ahci.c b/drivers/ata/ahci.c
index a0cc0ed..85aa6ec 100644
--- a/drivers/ata/ahci.c
+++ b/drivers/ata/ahci.c
 <at>  <at>  -1340,15 +1340,14  <at>  <at>  static int ahci_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
 		ahci_pci_bar = AHCI_PCI_BAR_ENMOTUS;

 	/*
-	 * The JMicron chip 361/363 contains one SATA controller and one
+	 * The JMicron chip 361/363/368 contains one SATA controller and one
 	 * PATA controller,for powering on these both controllers, we must
 	 * follow the sequence one by one, otherwise one of them can not be
-	 * powered on successfully, so here we disable the async suspend
(Continue reading)

Chuansheng Liu | 23 Sep 07:37 2014
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[PATCH] ata: Disabling the async PM for JMicron chips

Be similar with commit (ata: Disabling the async PM for JMicron chip 363/361),
Barto found the similar issue for JMicron chip 368, that 363/368 has no
parent-children relationship, but they have the power dependency.

So here we can exclude the JMicron chips out of pm_async method directly,
to avoid further similar issues.

Details in:
https://bugzilla.kernel.org/show_bug.cgi?id=84861

Reported-and-tested-by: Barto <mister.freeman <at> laposte.net>
Signed-off-by: Chuansheng Liu <chuansheng.liu <at> intel.com>
---
 drivers/ata/ahci.c         |    6 +++---
 drivers/ata/pata_jmicron.c |    6 +++---
 2 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/drivers/ata/ahci.c b/drivers/ata/ahci.c
index a0cc0ed..c096d49 100644
--- a/drivers/ata/ahci.c
+++ b/drivers/ata/ahci.c
 <at>  <at>  -1345,10 +1345,10  <at>  <at>  static int ahci_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
 	 * follow the sequence one by one, otherwise one of them can not be
 	 * powered on successfully, so here we disable the async suspend
 	 * method for these chips.
+	 * Jmicron chip 368 has been found has the similar issue, here we can
+	 * exclude the Jmicron family directly to avoid other similar issues.
 	 */
-	if (pdev->vendor == PCI_VENDOR_ID_JMICRON &&
-		(pdev->device == PCI_DEVICE_ID_JMICRON_JMB363 ||
(Continue reading)

Suman Tripathi | 22 Sep 15:01 2014

[PATCH] ahci_xgene: Fix the error print invalid resource for APM X-Gene SoC AHCI SATA Host Controller driver.

This patch fixes the error print invalid resource for the APM X-Gene
SoC AHCI SATA Host Controller driver. This print was due to the fact
that the controller 3 don't have a mux resource. This didn't result
in any errors but the print seems like meaningless.

Signed-off-by: Loc Ho <lho <at> apm.com>
Signed-off-by: Suman Tripathi <stripathi <at> apm.com>
---
 drivers/ata/ahci_xgene.c | 10 ++++++++--
 1 file changed, 8 insertions(+), 2 deletions(-)

diff --git a/drivers/ata/ahci_xgene.c b/drivers/ata/ahci_xgene.c
index 40d0a76..26f1f78 100644
--- a/drivers/ata/ahci_xgene.c
+++ b/drivers/ata/ahci_xgene.c
 <at>  <at>  -434,7 +434,7  <at>  <at>  static int xgene_ahci_mux_select(struct xgene_ahci_context *ctx)
 	u32 val;

 	/* Check for optional MUX resource */
-	if (IS_ERR(ctx->csr_mux))
+	if (!ctx->csr_mux)
 		return 0;

 	val = readl(ctx->csr_mux + SATA_ENET_CONFIG_REG);
 <at>  <at>  -485,7 +485,13  <at>  <at>  static int xgene_ahci_probe(struct platform_device *pdev)

 	/* Retrieve the optional IP mux resource */
 	res = platform_get_resource(pdev, IORESOURCE_MEM, 4);
-	ctx->csr_mux = devm_ioremap_resource(dev, res);
+	if (res) {
(Continue reading)

Alexander Gordeev | 21 Sep 15:19 2014
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[PATCH RESEND v3 0/6] AHCI: Optimize interrupt processing

As per Tejun's feedback I am sending v3.

Changes since v2:
  - single patch split in a series;
  - benchmarking statistics reworded;
  - HOST_IRQ_STAT reg optimization added (patch 6);

Cc: linux-ide <at> vger.kernel.org

Alexander Gordeev (6):
  AHCI: Cleanup checking of multiple MSIs/SLM modes
  AHCI: Move host activation code into ahci_host_activate()
  AHCI: Make few function names more descriptive
  AHCI: Get rid of redundant arg to ahci_handle_port_interrupt()
  AHCI: Optimize single IRQ interrupt processing
  AHCI: Do not read HOST_IRQ_STAT reg in multi-MSI mode

 drivers/ata/acard-ahci.c       |   3 +-
 drivers/ata/ahci.c             | 101 +++++++++++++++++++++++------------
 drivers/ata/ahci.h             |  10 ++--
 drivers/ata/libahci.c          | 117 +++++++++++++++++------------------------
 drivers/ata/libahci_platform.c |   3 +-
 5 files changed, 123 insertions(+), 111 deletions(-)

--

-- 
1.8.3.1

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To unsubscribe from this list: send the line "unsubscribe linux-ide" in
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(Continue reading)

Alexander Gordeev | 19 Sep 10:25 2014
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[PATCH v3 6/5] AHCI: Do not read HOST_IRQ_STAT register in multi-MSI mode

As described in AHCI v1.0 specification chapter 10.6.2.2
"Multiple MSI Based Messages" generation of interrupts
is not controlled through the HOST_IRQ_STAT register.

Considering MMIO access is expensive remove unnecessary
reading and writing of HOST_IRQ_STAT register.

Further, serializing access to the host data is no longer
needed and the interrupt service routine can avoid competing
on the host lock.

Signed-off-by: Alexander Gordeev <agordeev <at> redhat.com>
Suggested-by: "Jiang, Dave" <dave.jiang <at> intel.com>
Cc: linux-ide <at> vger.kernel.org
---
 drivers/ata/ahci.h    |  1 +
 drivers/ata/libahci.c | 54 ++++++++-------------------------------------------
 2 files changed, 9 insertions(+), 46 deletions(-)

diff --git a/drivers/ata/ahci.h b/drivers/ata/ahci.h
index c12f590..b8e117a 100644
--- a/drivers/ata/ahci.h
+++ b/drivers/ata/ahci.h
 <at>  <at>  -305,6 +305,7  <at>  <at>  struct ahci_port_priv {
 	unsigned int		ncq_saw_dmas:1;
 	unsigned int		ncq_saw_sdb:1;
 	u32			intr_status;	/* interrupts to handle */
+	spinlock_t		intr_lock;	/* protects intr_status */
 	spinlock_t		lock;		/* protects parent ata_port */
 	u32 			intr_mask;	/* interrupts to enable */
(Continue reading)

Alexander Gordeev | 18 Sep 11:58 2014
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Re: [PATCH v2 0/5] AHCI: Optimize interrupt processing

On Wed, Sep 17, 2014 at 05:41:44PM +0200, Alexander Gordeev wrote:
> Hello,
> 
> As per Tejun's feedback I am sending v2.

This should have been v3, not v2.
Please, disregard this series if you see it.

Thanks!

> Changes since v1:
>   - single patch split in a series of 5;
>   - changelog for patch 5 reworded;
> 
> Cc: linux-ide <at> vger.kernel.org
> 
> Alexander Gordeev (5):
>   AHCI: Cleanup checking of multiple MSIs/SLM modes
>   AHCI: Move host activation code into ahci_host_activate()
>   AHCI: Make some function names more descriptive
>   AHCI: Get rid of a redundant parameter to a function
>   AHCI: Optimize interrupt processing
> 
>  drivers/ata/acard-ahci.c       |  3 +-
>  drivers/ata/ahci.c             | 99 +++++++++++++++++++++++++++---------------
>  drivers/ata/ahci.h             |  8 ++--
>  drivers/ata/libahci.c          | 74 ++++++++++++++++++-------------
>  drivers/ata/libahci_platform.c |  3 +-
>  5 files changed, 114 insertions(+), 73 deletions(-)
> 
(Continue reading)

Jacobo Pantoja | 15 Sep 14:41 2014
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Re: [nForce4] - Repeatable issues with nForce 4

Dears,

Thank you for taking your time to answer. See my comments below.

On 14 September 2014 22:03, Robert Hancock <hancockrwd <at> gmail.com> wrote:
> On Sun, Sep 14, 2014 at 3:37 AM, Tejun Heo <tj <at> kernel.org> wrote:
>>
>> (cc'ing Robert Hancock)
>>
>> Hello,
>>
>> On Sat, Sep 13, 2014 at 11:50:08PM +0200, Jacobo Pantoja wrote:
>> > (Sorry if you receive twice, I have noticed that the first email had
>> > blank subject)
>> > Dear Tejun Heo and linux-ide team,
>> >
>> > I'm Jacobo Pantoja. I'm a technology passionate and electronics
>> > engineer.
>> > I have my ("beloved") computer with an nForce4 chipset, and I have had
>> > almost
>> > always the ADMA interface enabled. The board itself is ASUS A8N-E, with
>> > reportedly CK804 chipset, if it may be relevant at all.
>> >
>> > As suggested by Tejun, I'm sending my problem to the list.
>> >
>> > I noticed that from time to time the machine was freezed, but I was not
>> > able to correctly catch the trigger. Till yesterday.
>> >
>> > I noticed that one of my 2 TB drives had some few sectors, which were
>> > marked as "pending reallocation", but not reallocated. When this has
(Continue reading)

Tejun Heo | 14 Sep 11:39 2014

Re: [PATCH] ahci_xgene: Fix the error print invalid resource for APM X-Gene SoC AHCI SATA Host Controller driver.

Hello,

On Sun, Sep 14, 2014 at 11:36:51AM +0530, Suman Tripathi wrote:
> We can  maintain same piece (IS_ERR(ctx->csr_mux)), then we can do the
> below instead of NULL ??
> 
> ctx->csr_mux = res ? devm_ioremap_resource(dev, res) : ERR_PTR(-EINVAL);

Setting it to NULL on failure would probably make more sense.  No need
to carry around ERR_PTR() value around.

Thanks.

--

-- 
tejun
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Tejun Heo | 14 Sep 11:37 2014

Re: [nForce4] - Repeatable issues with nForce 4

(cc'ing Robert Hancock)

Hello,

On Sat, Sep 13, 2014 at 11:50:08PM +0200, Jacobo Pantoja wrote:
> (Sorry if you receive twice, I have noticed that the first email had
> blank subject)
> Dear Tejun Heo and linux-ide team,
> 
> I'm Jacobo Pantoja. I'm a technology passionate and electronics engineer.
> I have my ("beloved") computer with an nForce4 chipset, and I have had almost
> always the ADMA interface enabled. The board itself is ASUS A8N-E, with
> reportedly CK804 chipset, if it may be relevant at all.
> 
> As suggested by Tejun, I'm sending my problem to the list.
> 
> I noticed that from time to time the machine was freezed, but I was not
> able to correctly catch the trigger. Till yesterday.
> 
> I noticed that one of my 2 TB drives had some few sectors, which were
> marked as "pending reallocation", but not reallocated. When this has
> happened to me (in different computers, though), I solved it by dd'ing
> the whole disk, locating the bad sector(s) and filling it with zeroes.
> So I tried... and I have discovered that when a bad sector is tried to
> be read, the system locks up.
> 
> You may find attached:
> * dmesg when adma activated (but not including the moment of the error
>        because the computer freezes)
> * photo taken in the moment of the error with adma activated
(Continue reading)


Gmane