blackfin: gpio: Remove interrupt configuration for new ADI GPIO driver out of blackfi arch folder.
commit: http://blackfin.uclinux.org/git/?p=linux-kernel;a=commitdiff;h=8fbafb0878dfac6fe55f89687e6cc6bc71534133
branch: http://blackfin.uclinux.org/git/?p=linux-kernel;a=shortlog;h=refs/heads/trunk
This patch remove the GPIO interrupt code for the new ADI GPIO driver from
the blackfin interrupt driver. Some GPIO PM functions are also cleaned up.
Signed-off-by: Sonic Zhang <sonic.zhang-OyLXuOCK7orQT0dZR+AlfA@public.gmane.org>
---
arch/blackfin/include/asm/gpio.h | 33 ++-
arch/blackfin/include/asm/irq.h | 2 +-
arch/blackfin/include/asm/irq_handler.h | 6 +-
arch/blackfin/kernel/bfin_gpio.c | 11 +-
arch/blackfin/mach-bf548/include/mach/irq.h | 2 +-
arch/blackfin/mach-bf609/include/mach/irq.h | 2 +-
arch/blackfin/mach-common/ints-priority.c | 427 ++------------------------
arch/blackfin/mach-common/pm.c | 8 +-
8 files changed, 67 insertions(+), 424 deletions(-)
diff --git a/arch/blackfin/include/asm/gpio.h b/arch/blackfin/include/asm/gpio.h
index 7afd687..30857e7 100644
--- a/arch/blackfin/include/asm/gpio.h
+++ b/arch/blackfin/include/asm/gpio.h
<at> <at> -30,6 +30,7 <at> <at>
#include <linux/compiler.h>
#include <asm/blackfin.h>
#include <asm/portmux.h>
+#include <asm/irq_handler.h>
/***********************************************************
*
<at> <at> -130,25 +131,28 <at> <at> void bfin_special_gpio_pm_hibernate_suspend(void);
#endif
#ifdef CONFIG_PM
-int adi_gpio_pm_standby_ctrl(unsigned ctrl);
+void adi_gpio_pm_hibernate_restore(void);
+void adi_gpio_pm_hibernate_suspend(void);
+
+# if BFIN_GPIO_PINT
+# define adi_internal_set_wake bfin_internal_set_wake
+# define gpio_pint_regs bfin_pint_regs
+void adi_pint_suspend(void);
+void adi_pint_resume(void);
+# else
+int bfin_gpio_pm_wakeup_ctrl(unsigned gpio, unsigned ctrl);
+int bfin_gpio_pm_standby_ctrl(unsigned ctrl);
static inline int bfin_pm_standby_setup(void)
{
- return adi_gpio_pm_standby_ctrl(1);
+ return bfin_gpio_pm_standby_ctrl(1);
}
static inline void bfin_pm_standby_restore(void)
{
- adi_gpio_pm_standby_ctrl(0);
+ bfin_gpio_pm_standby_ctrl(0);
}
-void adi_gpio_pm_hibernate_restore(void);
-void adi_gpio_pm_hibernate_suspend(void);
-void bfin_pint_suspend(void);
-void bfin_pint_resume(void);
-
-# if !BFIN_GPIO_PINT
-int adi_gpio_pm_wakeup_ctrl(unsigned gpio, unsigned ctrl);
struct gpio_port_s {
unsigned short data;
<at> <at> -181,10 +185,11 <at> <at> struct gpio_port_s {
*************************************************************
* MODIFICATION HISTORY :
**************************************************************/
-
-int adi_gpio_irq_request(unsigned gpio, const char *label);
-void adi_gpio_irq_free(unsigned gpio);
-void adi_gpio_irq_prepare(unsigned gpio);
+#ifdef CONFIG_GPIO_ADI
+int bfin_gpio_irq_request(unsigned gpio, const char *label);
+void bfin_gpio_irq_free(unsigned gpio);
+void bfin_gpio_irq_prepare(unsigned gpio);
+#endif
#include <asm/irq.h>
#include <asm/errno.h>
diff --git a/arch/blackfin/include/asm/irq.h b/arch/blackfin/include/asm/irq.h
index 4ae1144..2fac596 100644
--- a/arch/blackfin/include/asm/irq.h
+++ b/arch/blackfin/include/asm/irq.h
<at> <at> -23,7 +23,7 <at> <at>
/*
* pm save bfin pint registers
*/
-struct bfin_pm_pint_save {
+struct adi_pm_pint_save {
u32 mask_set;
u32 assign;
u32 edge_set;
diff --git a/arch/blackfin/include/asm/irq_handler.h b/arch/blackfin/include/asm/irq_handler.h
index 60b97a6..3f770b2 100644
--- a/arch/blackfin/include/asm/irq_handler.h
+++ b/arch/blackfin/include/asm/irq_handler.h
<at> <at> -12,11 +12,11 <at> <at>
#include <mach/irq.h>
/* init functions only */
-extern int __init init_arch_irq(void);
+extern int init_arch_irq(void);
extern void init_exception_vectors(void);
-extern void __init program_IAR(void);
+extern void program_IAR(void);
#ifdef init_mach_irq
-extern void __init init_mach_irq(void);
+extern void init_mach_irq(void);
#else
# define init_mach_irq()
#endif
diff --git a/arch/blackfin/kernel/bfin_gpio.c b/arch/blackfin/kernel/bfin_gpio.c
index 2b08afa..2182de1 100644
--- a/arch/blackfin/kernel/bfin_gpio.c
+++ b/arch/blackfin/kernel/bfin_gpio.c
<at> <at> -13,7 +13,6 <at> <at>
#include <linux/seq_file.h>
#include <linux/gpio.h>
#include <linux/irq.h>
-#include <asm/irq_handler.h>
#if ANOMALY_05000311 || ANOMALY_05000323
enum {
<at> <at> -519,7 +518,7 <at> <at> static const unsigned int sic_iwr_irqs[] = {
*************************************************************
* MODIFICATION HISTORY :
**************************************************************/
-int adi_gpio_pm_wakeup_ctrl(unsigned gpio, unsigned ctrl)
+int bfin_gpio_pm_wakeup_ctrl(unsigned gpio, unsigned ctrl)
{
unsigned long flags;
<at> <at> -538,7 +537,7 <at> <at> int adi_gpio_pm_wakeup_ctrl(unsigned gpio, unsigned ctrl)
return 0;
}
-int adi_gpio_pm_standby_ctrl(unsigned ctrl)
+int bfin_gpio_pm_standby_ctrl(unsigned ctrl)
{
u16 bank, mask, i;
<at> <at> -946,7 +945,7 <at> <at> EXPORT_SYMBOL(bfin_special_gpio_free);
#endif
-int adi_gpio_irq_request(unsigned gpio, const char *label)
+int bfin_gpio_irq_request(unsigned gpio, const char *label)
{
unsigned long flags;
<at> <at> -979,7 +978,7 <at> <at> int adi_gpio_irq_request(unsigned gpio, const char *label)
return 0;
}
-void adi_gpio_irq_free(unsigned gpio)
+void bfin_gpio_irq_free(unsigned gpio)
{
unsigned long flags;
<at> <at> -1027,7 +1026,7 <at> <at> int bfin_gpio_direction_input(unsigned gpio)
}
EXPORT_SYMBOL(bfin_gpio_direction_input);
-void adi_gpio_irq_prepare(unsigned gpio)
+void bfin_gpio_irq_prepare(unsigned gpio)
{
port_setup(gpio, GPIO_USAGE);
}
diff --git a/arch/blackfin/mach-bf548/include/mach/irq.h b/arch/blackfin/mach-bf548/include/mach/irq.h
index 10dc142..cf7cb72 100644
--- a/arch/blackfin/mach-bf548/include/mach/irq.h
+++ b/arch/blackfin/mach-bf548/include/mach/irq.h
<at> <at> -433,7 +433,7 <at> <at>
#include <linux/types.h>
/*
- * bfin pint registers layout
+ * gpio pint registers layout
*/
struct bfin_pint_regs {
u32 mask_set;
diff --git a/arch/blackfin/mach-bf609/include/mach/irq.h b/arch/blackfin/mach-bf609/include/mach/irq.h
index fa0843d..d1cb6a8 100644
--- a/arch/blackfin/mach-bf609/include/mach/irq.h
+++ b/arch/blackfin/mach-bf609/include/mach/irq.h
<at> <at> -298,7 +298,7 <at> <at>
extern u8 sec_int_priority[];
/*
- * bfin pint registers layout
+ * gpio pint registers layout
*/
struct bfin_pint_regs {
u32 mask_set;
diff --git a/arch/blackfin/mach-common/ints-priority.c b/arch/blackfin/mach-common/ints-priority.c
index 5c3653a..4dd4bd8 100644
--- a/arch/blackfin/mach-common/ints-priority.c
+++ b/arch/blackfin/mach-common/ints-priority.c
<at> <at> -729,9 +729,9 <at> <at> static inline void bfin_set_irq_handler(unsigned irq, irq_flow_handler_t handle)
__irq_set_handler_locked(irq, handle);
}
-static DECLARE_BITMAP(gpio_enabled, MAX_BLACKFIN_GPIOS);
+#ifdef CONFIG_GPIO_ADI
-#if !BFIN_GPIO_PINT
+static DECLARE_BITMAP(gpio_enabled, MAX_BLACKFIN_GPIOS);
static void bfin_gpio_ack_irq(struct irq_data *d)
{
<at> <at> -767,7 +767,7 <at> <at> static unsigned int bfin_gpio_irq_startup(struct irq_data *d)
u32 gpionr = irq_to_gpio(d->irq);
if (__test_and_set_bit(gpionr, gpio_enabled))
- adi_gpio_irq_prepare(gpionr);
+ bfin_gpio_irq_prepare(gpionr);
bfin_gpio_unmask_irq(d);
<at> <at> -780,7 +780,7 <at> <at> static void bfin_gpio_irq_shutdown(struct irq_data *d)
bfin_gpio_mask_irq(d);
__clear_bit(gpionr, gpio_enabled);
- adi_gpio_irq_free(gpionr);
+ bfin_gpio_irq_free(gpionr);
}
static int bfin_gpio_irq_type(struct irq_data *d, unsigned int type)
<at> <at> -801,12 +801,12 <at> <at> static int bfin_gpio_irq_type(struct irq_data *d, unsigned int type)
IRQ_TYPE_LEVEL_HIGH | IRQ_TYPE_LEVEL_LOW)) {
snprintf(buf, 16, "gpio-irq%d", irq);
- ret = adi_gpio_irq_request(gpionr, buf);
+ ret = bfin_gpio_irq_request(gpionr, buf);
if (ret)
return ret;
if (__test_and_set_bit(gpionr, gpio_enabled))
- adi_gpio_irq_prepare(gpionr);
+ bfin_gpio_irq_prepare(gpionr);
} else {
__clear_bit(gpionr, gpio_enabled);
<at> <at> -845,15 +845,6 <at> <at> static int bfin_gpio_irq_type(struct irq_data *d, unsigned int type)
return 0;
}
-#ifdef CONFIG_PM
-static int bfin_gpio_set_wake(struct irq_data *d, unsigned int state)
-{
- return adi_gpio_pm_wakeup_ctrl(irq_to_gpio(d->irq), state);
-}
-#else
-# define bfin_gpio_set_wake NULL
-#endif
-
static void bfin_demux_gpio_block(unsigned int irq)
{
unsigned int gpio, mask;
<at> <at> -920,278 +911,40 <at> <at> void bfin_demux_gpio_irq(unsigned int inta_irq,
bfin_demux_gpio_block(irq);
}
-#else
-
-#define NR_PINT_BITS 32
-#define IRQ_NOT_AVAIL 0xFF
-
-#define PINT_2_BANK(x) ((x) >> 5)
-#define PINT_2_BIT(x) ((x) & 0x1F)
-#define PINT_BIT(x) (1 << (PINT_2_BIT(x)))
-
-static unsigned char irq2pint_lut[NR_PINTS];
-static unsigned char pint2irq_lut[NR_PINT_SYS_IRQS * NR_PINT_BITS];
-
-static struct bfin_pint_regs * const pint[NR_PINT_SYS_IRQS] = {
- (struct bfin_pint_regs *)PINT0_MASK_SET,
- (struct bfin_pint_regs *)PINT1_MASK_SET,
- (struct bfin_pint_regs *)PINT2_MASK_SET,
- (struct bfin_pint_regs *)PINT3_MASK_SET,
-#ifdef CONFIG_BF60x
- (struct bfin_pint_regs *)PINT4_MASK_SET,
- (struct bfin_pint_regs *)PINT5_MASK_SET,
-#endif
-};
-
-inline unsigned int get_irq_base(u32 bank, u8 bmap)
-{
- unsigned int irq_base;
-
-#ifndef CONFIG_BF60x
- if (bank < 2) { /*PA-PB */
- irq_base = IRQ_PA0 + bmap * 16;
- } else { /*PC-PJ */
- irq_base = IRQ_PC0 + bmap * 16;
- }
-#else
- irq_base = IRQ_PA0 + bank * 16 + bmap * 16;
-#endif
- return irq_base;
-}
-
- /* Whenever PINTx_ASSIGN is altered init_pint_lut() must be executed! */
-void init_pint_lut(void)
-{
- u16 bank, bit, irq_base, bit_pos;
- u32 pint_assign;
- u8 bmap;
-
- memset(irq2pint_lut, IRQ_NOT_AVAIL, sizeof(irq2pint_lut));
-
- for (bank = 0; bank < NR_PINT_SYS_IRQS; bank++) {
-
- pint_assign = pint[bank]->assign;
-
- for (bit = 0; bit < NR_PINT_BITS; bit++) {
-
- bmap = (pint_assign >> ((bit / 8) * 8)) & 0xFF;
-
- irq_base = get_irq_base(bank, bmap);
-
- irq_base += (bit % 8) + ((bit / 8) & 1 ? 8 : 0);
- bit_pos = bit + bank * NR_PINT_BITS;
-
- pint2irq_lut[bit_pos] = irq_base - SYS_IRQS;
- irq2pint_lut[irq_base - SYS_IRQS] = bit_pos;
- }
- }
-}
-
-static void bfin_gpio_ack_irq(struct irq_data *d)
-{
- u32 pint_val = irq2pint_lut[d->irq - SYS_IRQS];
- u32 pintbit = PINT_BIT(pint_val);
- u32 bank = PINT_2_BANK(pint_val);
-
- if (irqd_get_trigger_type(d) == IRQ_TYPE_EDGE_BOTH) {
- if (pint[bank]->invert_set & pintbit)
- pint[bank]->invert_clear = pintbit;
- else
- pint[bank]->invert_set = pintbit;
- }
- pint[bank]->request = pintbit;
-
-}
-
-static void bfin_gpio_mask_ack_irq(struct irq_data *d)
-{
- u32 pint_val = irq2pint_lut[d->irq - SYS_IRQS];
- u32 pintbit = PINT_BIT(pint_val);
- u32 bank = PINT_2_BANK(pint_val);
-
- if (irqd_get_trigger_type(d) == IRQ_TYPE_EDGE_BOTH) {
- if (pint[bank]->invert_set & pintbit)
- pint[bank]->invert_clear = pintbit;
- else
- pint[bank]->invert_set = pintbit;
- }
-
- pint[bank]->request = pintbit;
- pint[bank]->mask_clear = pintbit;
-}
-
-static void bfin_gpio_mask_irq(struct irq_data *d)
-{
- u32 pint_val = irq2pint_lut[d->irq - SYS_IRQS];
-
- pint[PINT_2_BANK(pint_val)]->mask_clear = PINT_BIT(pint_val);
-}
-
-static void bfin_gpio_unmask_irq(struct irq_data *d)
-{
- u32 pint_val = irq2pint_lut[d->irq - SYS_IRQS];
- u32 pintbit = PINT_BIT(pint_val);
- u32 bank = PINT_2_BANK(pint_val);
-
- pint[bank]->mask_set = pintbit;
-}
-
-static unsigned int bfin_gpio_irq_startup(struct irq_data *d)
-{
- unsigned int irq = d->irq;
- u32 gpionr = irq_to_gpio(irq);
- u32 pint_val = irq2pint_lut[irq - SYS_IRQS];
-
- if (pint_val == IRQ_NOT_AVAIL) {
- printk(KERN_ERR
- "GPIO IRQ %d :Not in PINT Assign table "
- "Reconfigure Interrupt to Port Assignemt\n", irq);
- return -ENODEV;
- }
-
- if (__test_and_set_bit(gpionr, gpio_enabled))
- adi_gpio_irq_prepare(gpionr);
-
- bfin_gpio_unmask_irq(d);
-
- return 0;
-}
-
-static void bfin_gpio_irq_shutdown(struct irq_data *d)
-{
- u32 gpionr = irq_to_gpio(d->irq);
-
- bfin_gpio_mask_irq(d);
- __clear_bit(gpionr, gpio_enabled);
- adi_gpio_irq_free(gpionr);
-}
-
-static int bfin_gpio_irq_type(struct irq_data *d, unsigned int type)
-{
- unsigned int irq = d->irq;
- int ret;
- char buf[16];
- u32 gpionr = irq_to_gpio(irq);
- u32 pint_val = irq2pint_lut[irq - SYS_IRQS];
- u32 pintbit = PINT_BIT(pint_val);
- u32 bank = PINT_2_BANK(pint_val);
-
- if (pint_val == IRQ_NOT_AVAIL)
- return -ENODEV;
-
- if (type == IRQ_TYPE_PROBE) {
- /* only probe unenabled GPIO interrupt lines */
- if (test_bit(gpionr, gpio_enabled))
- return 0;
- type = IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING;
- }
-
- if (type & (IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING |
- IRQ_TYPE_LEVEL_HIGH | IRQ_TYPE_LEVEL_LOW)) {
-
- snprintf(buf, 16, "gpio-irq%d", irq);
- ret = adi_gpio_irq_request(gpionr, buf);
- if (ret)
- return ret;
-
- if (__test_and_set_bit(gpionr, gpio_enabled))
- adi_gpio_irq_prepare(gpionr);
- } else {
- __clear_bit(gpionr, gpio_enabled);
- return 0;
- }
-
- if ((type & (IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_LEVEL_LOW)))
- pint[bank]->invert_set = pintbit; /* low or falling edge denoted by one */
- else
- pint[bank]->invert_clear = pintbit; /* high or rising edge denoted by zero */
-
- if ((type & (IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING))
- == (IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING)) {
- if (gpio_get_value(gpionr))
- pint[bank]->invert_set = pintbit;
- else
- pint[bank]->invert_clear = pintbit;
- }
-
- if (type & (IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING)) {
- pint[bank]->edge_set = pintbit;
- bfin_set_irq_handler(irq, handle_edge_irq);
- } else {
- pint[bank]->edge_clear = pintbit;
- bfin_set_irq_handler(irq, handle_level_irq);
- }
-
- return 0;
-}
-
#ifdef CONFIG_PM
-static struct bfin_pm_pint_save save_pint_reg[NR_PINT_SYS_IRQS];
-static u32 save_pint_sec_ctl[NR_PINT_SYS_IRQS];
static int bfin_gpio_set_wake(struct irq_data *d, unsigned int state)
{
- u32 pint_irq;
- u32 pint_val = irq2pint_lut[d->irq - SYS_IRQS];
- u32 bank = PINT_2_BANK(pint_val);
-
- switch (bank) {
- case 0:
- pint_irq = IRQ_PINT0;
- break;
- case 2:
- pint_irq = IRQ_PINT2;
- break;
- case 3:
- pint_irq = IRQ_PINT3;
- break;
- case 1:
- pint_irq = IRQ_PINT1;
- break;
-#ifdef CONFIG_BF60x
- case 4:
- pint_irq = IRQ_PINT4;
- break;
- case 5:
- pint_irq = IRQ_PINT5;
- break;
-#endif
- default:
- return -EINVAL;
- }
+ return bfin_gpio_pm_wakeup_ctrl(irq_to_gpio(d->irq), state);
+}
-#ifndef SEC_GCTL
- bfin_internal_set_wake(pint_irq, state);
-#endif
+#else
- return 0;
-}
+# define bfin_gpio_set_wake NULL
-void bfin_pint_suspend(void)
-{
- u32 bank;
+#endif
- for (bank = 0; bank < NR_PINT_SYS_IRQS; bank++) {
- save_pint_reg[bank].mask_set = pint[bank]->mask_set;
- save_pint_reg[bank].assign = pint[bank]->assign;
- save_pint_reg[bank].edge_set = pint[bank]->edge_set;
- save_pint_reg[bank].invert_set = pint[bank]->invert_set;
- }
-}
+static struct irq_chip bfin_gpio_irqchip = {
+ .name = "GPIO",
+ .irq_ack = bfin_gpio_ack_irq,
+ .irq_mask = bfin_gpio_mask_irq,
+ .irq_mask_ack = bfin_gpio_mask_ack_irq,
+ .irq_unmask = bfin_gpio_unmask_irq,
+ .irq_disable = bfin_gpio_mask_irq,
+ .irq_enable = bfin_gpio_unmask_irq,
+ .irq_set_type = bfin_gpio_irq_type,
+ .irq_startup = bfin_gpio_irq_startup,
+ .irq_shutdown = bfin_gpio_irq_shutdown,
+ .irq_set_wake = bfin_gpio_set_wake,
+};
-void bfin_pint_resume(void)
-{
- u32 bank;
+#endif
- for (bank = 0; bank < NR_PINT_SYS_IRQS; bank++) {
- pint[bank]->mask_set = save_pint_reg[bank].mask_set;
- pint[bank]->assign = save_pint_reg[bank].assign;
- pint[bank]->edge_set = save_pint_reg[bank].edge_set;
- pint[bank]->invert_set = save_pint_reg[bank].invert_set;
- }
-}
+#ifdef CONFIG_PM
#ifdef SEC_GCTL
+static u32 save_pint_sec_ctl[NR_PINT_SYS_IRQS];
+
static int sec_suspend(void)
{
u32 bank;
<at> <at> -1218,92 +971,10 <at> <at> static struct syscore_ops sec_pm_syscore_ops = {
.suspend = sec_suspend,
.resume = sec_resume,
};
-
#endif
-#else
-# define bfin_gpio_set_wake NULL
-#endif
-
-void bfin_demux_gpio_irq(unsigned int inta_irq,
- struct irq_desc *desc)
-{
- u32 bank, pint_val;
- u32 request, irq;
- u32 level_mask;
- int umask = 0;
- struct irq_chip *chip = irq_desc_get_chip(desc);
-
- if (chip->irq_mask_ack) {
- chip->irq_mask_ack(&desc->irq_data);
- } else {
- chip->irq_mask(&desc->irq_data);
- if (chip->irq_ack)
- chip->irq_ack(&desc->irq_data);
- }
-
- switch (inta_irq) {
- case IRQ_PINT0:
- bank = 0;
- break;
- case IRQ_PINT2:
- bank = 2;
- break;
- case IRQ_PINT3:
- bank = 3;
- break;
- case IRQ_PINT1:
- bank = 1;
- break;
-#ifdef CONFIG_BF60x
- case IRQ_PINT4:
- bank = 4;
- break;
- case IRQ_PINT5:
- bank = 5;
- break;
-#endif
- default:
- return;
- }
-
- pint_val = bank * NR_PINT_BITS;
-
- request = pint[bank]->request;
- level_mask = pint[bank]->edge_set & request;
-
- while (request) {
- if (request & 1) {
- irq = pint2irq_lut[pint_val] + SYS_IRQS;
- if (level_mask & PINT_BIT(pint_val)) {
- umask = 1;
- chip->irq_unmask(&desc->irq_data);
- }
- bfin_handle_irq(irq);
- }
- pint_val++;
- request >>= 1;
- }
-
- if (!umask)
- chip->irq_unmask(&desc->irq_data);
-}
#endif
-static struct irq_chip bfin_gpio_irqchip = {
- .name = "GPIO",
- .irq_ack = bfin_gpio_ack_irq,
- .irq_mask = bfin_gpio_mask_irq,
- .irq_mask_ack = bfin_gpio_mask_ack_irq,
- .irq_unmask = bfin_gpio_unmask_irq,
- .irq_disable = bfin_gpio_mask_irq,
- .irq_enable = bfin_gpio_unmask_irq,
- .irq_set_type = bfin_gpio_irq_type,
- .irq_startup = bfin_gpio_irq_startup,
- .irq_shutdown = bfin_gpio_irq_shutdown,
- .irq_set_wake = bfin_gpio_set_wake,
-};
-
void __cpuinit init_exception_vectors(void)
{
/* cannot program in software:
<at> <at> -1354,17 +1025,6 <at> <at> int __init init_arch_irq(void)
local_irq_disable();
-#if BFIN_GPIO_PINT
-# ifdef CONFIG_PINTx_REASSIGN
- pint[0]->assign = CONFIG_PINT0_ASSIGN;
- pint[1]->assign = CONFIG_PINT1_ASSIGN;
- pint[2]->assign = CONFIG_PINT2_ASSIGN;
- pint[3]->assign = CONFIG_PINT3_ASSIGN;
-# endif
- /* Whenever PINTx_ASSIGN is altered init_pint_lut() must be executed! */
- init_pint_lut();
-#endif
-
for (irq = 0; irq <= SYS_IRQS; irq++) {
if (irq <= IRQ_CORETMR)
irq_set_chip(irq, &bfin_core_irqchip);
<at> <at> -1372,12 +1032,8 <at> <at> int __init init_arch_irq(void)
irq_set_chip(irq, &bfin_internal_irqchip);
switch (irq) {
-#if BFIN_GPIO_PINT
- case IRQ_PINT0:
- case IRQ_PINT1:
- case IRQ_PINT2:
- case IRQ_PINT3:
-#elif defined(BF537_FAMILY)
+#if !BFIN_GPIO_PINT
+#if defined(BF537_FAMILY)
case IRQ_PH_INTA_MAC_RX:
case IRQ_PF_INTA_PG_INTA:
#elif defined(BF533_FAMILY)
<at> <at> -1395,6 +1051,7 <at> <at> int __init init_arch_irq(void)
#endif
irq_set_chained_handler(irq, bfin_demux_gpio_irq);
break;
+#endif
#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
case IRQ_MAC_ERROR:
irq_set_chained_handler(irq,
<at> <at> -1442,10 +1099,12 <at> <at> int __init init_arch_irq(void)
handle_level_irq);
#endif
/* if configured as edge, then will be changed to do_edge_IRQ */
+#ifdef CONFIG_GPIO_ADI
for (irq = GPIO_IRQ_BASE;
irq < (GPIO_IRQ_BASE + MAX_BLACKFIN_GPIOS); irq++)
irq_set_chip_and_handler(irq, &bfin_gpio_irqchip,
handle_level_irq);
+#endif
bfin_write_IMASK(0);
CSYNC();
ilat = bfin_read_ILAT();
<at> <at> -1548,19 +1207,6 <at> <at> int __init init_arch_irq(void)
local_irq_disable();
-#if BFIN_GPIO_PINT
-# ifdef CONFIG_PINTx_REASSIGN
- pint[0]->assign = CONFIG_PINT0_ASSIGN;
- pint[1]->assign = CONFIG_PINT1_ASSIGN;
- pint[2]->assign = CONFIG_PINT2_ASSIGN;
- pint[3]->assign = CONFIG_PINT3_ASSIGN;
- pint[4]->assign = CONFIG_PINT4_ASSIGN;
- pint[5]->assign = CONFIG_PINT5_ASSIGN;
-# endif
- /* Whenever PINTx_ASSIGN is altered init_pint_lut() must be executed! */
- init_pint_lut();
-#endif
-
for (irq = 0; irq <= SYS_IRQS; irq++) {
if (irq <= IRQ_CORETMR) {
irq_set_chip_and_handler(irq, &bfin_core_irqchip,
<at> <at> -1569,9 +1215,6 <at> <at> int __init init_arch_irq(void)
if (irq == IRQ_CORETMR)
irq_set_handler(irq, handle_percpu_irq);
#endif
- } else if (irq >= BFIN_IRQ(21) && irq <= BFIN_IRQ(26)) {
- irq_set_chip(irq, &bfin_sec_irqchip);
- irq_set_chained_handler(irq, bfin_demux_gpio_irq);
} else if (irq >= BFIN_IRQ(34) && irq <= BFIN_IRQ(37)) {
irq_set_chip_and_handler(irq, &bfin_sec_irqchip,
handle_percpu_irq);
<at> <at> -1586,10 +1229,6 <at> <at> int __init init_arch_irq(void)
__irq_set_preflow_handler(irq, bfin_sec_preflow_handler);
}
}
- for (irq = GPIO_IRQ_BASE;
- irq < (GPIO_IRQ_BASE + MAX_BLACKFIN_GPIOS); irq++)
- irq_set_chip_and_handler(irq, &bfin_gpio_irqchip,
- handle_level_irq);
bfin_write_IMASK(0);
CSYNC();
diff --git a/arch/blackfin/mach-common/pm.c b/arch/blackfin/mach-common/pm.c
index 939262f..1275d1c 100644
--- a/arch/blackfin/mach-common/pm.c
+++ b/arch/blackfin/mach-common/pm.c
<at> <at> -27,7 +27,7 <at> <at> struct bfin_cpu_pm_fns *bfin_cpu_pm;
void bfin_pm_suspend_standby_enter(void)
{
-#ifndef CONFIG_BF60x
+#if !BFIN_GPIO_PINT
bfin_pm_standby_setup();
#endif
<at> <at> -41,7 +41,7 <at> <at> void bfin_pm_suspend_standby_enter(void)
# endif
#endif
-#ifndef CONFIG_BF60x
+#if !BFIN_GPIO_PINT
bfin_pm_standby_restore();
#endif
<at> <at> -173,7 +173,7 <at> <at> int bfin_pm_suspend_mem_enter(void)
adi_gpio_pm_hibernate_suspend();
#if BFIN_GPIO_PINT
- bfin_pint_suspend();
+ adi_pint_suspend();
#endif
#if defined(CONFIG_BFIN_EXTMEM_WRITEBACK) || defined(CONFIG_BFIN_L2_WRITEBACK)
<at> <at> -195,7 +195,7 <at> <at> int bfin_pm_suspend_mem_enter(void)
_enable_dcplb();
#if BFIN_GPIO_PINT
- bfin_pint_resume();
+ adi_pint_resume();
#endif
adi_gpio_pm_hibernate_restore();
<div>commit: http://blackfin.uclinux.org/git/?p=linux-kernel;a=commitdiff;h=8fbafb0878dfac6fe55f89687e6cc6bc71534133
branch: http://blackfin.uclinux.org/git/?p=linux-kernel;a=shortlog;h=refs/heads/trunk
This patch remove the GPIO interrupt code for the new ADI GPIO driver from
the blackfin interrupt driver. Some GPIO PM functions are also cleaned up.
Signed-off-by: Sonic Zhang <sonic.zhang@...>
---
arch/blackfin/include/asm/gpio.h | 33 ++-
arch/blackfin/include/asm/irq.h | 2 +-
arch/blackfin/include/asm/irq_handler.h | 6 +-
arch/blackfin/kernel/bfin_gpio.c | 11 +-
arch/blackfin/mach-bf548/include/mach/irq.h | 2 +-
arch/blackfin/mach-bf609/include/mach/irq.h | 2 +-
arch/blackfin/mach-common/ints-priority.c | 427 ++------------------------
arch/blackfin/mach-common/pm.c | 8 +-
8 files changed, 67 insertions(+), 424 deletions(-)
<span>diff --git a/arch/blackfin/include/asm/gpio.h b/arch/blackfin/include/asm/gpio.h</span>
<span>index 7afd687..30857e7 100644</span>
<span>--- a/arch/blackfin/include/asm/gpio.h</span>
<span>+++ b/arch/blackfin/include/asm/gpio.h</span>
<span> <at> <at> -30,6 +30,7 <at> <at> </span>
#include <linux/compiler.h>
#include <asm/blackfin.h>
#include <asm/portmux.h>
<span>+#include <asm/irq_handler.h></span>
/***********************************************************
*
<span> <at> <at> -130,25 +131,28 <at> <at> void bfin_special_gpio_pm_hibernate_suspend(void);</span>
#endif
#ifdef CONFIG_PM
<span>-int adi_gpio_pm_standby_ctrl(unsigned ctrl);</span>
<span>+void adi_gpio_pm_hibernate_restore(void);</span>
<span>+void adi_gpio_pm_hibernate_suspend(void);</span>
<span>+</span>
<span>+# if BFIN_GPIO_PINT</span>
<span>+# define adi_internal_set_wake bfin_internal_set_wake</span>
<span>+# define gpio_pint_regs bfin_pint_regs</span>
<span>+void adi_pint_suspend(void);</span>
<span>+void adi_pint_resume(void);</span>
<span>+# else</span>
<span>+int bfin_gpio_pm_wakeup_ctrl(unsigned gpio, unsigned ctrl);</span>
<span>+int bfin_gpio_pm_standby_ctrl(unsigned ctrl);</span>
static inline int bfin_pm_standby_setup(void)
{
<span>- return adi_gpio_pm_standby_ctrl(1);</span>
<span>+ return bfin_gpio_pm_standby_ctrl(1);</span>
}
static inline void bfin_pm_standby_restore(void)
{
<span>- adi_gpio_pm_standby_ctrl(0);</span>
<span>+ bfin_gpio_pm_standby_ctrl(0);</span>
}
<span>-void adi_gpio_pm_hibernate_restore(void);</span>
<span>-void adi_gpio_pm_hibernate_suspend(void);</span>
<span>-void bfin_pint_suspend(void);</span>
<span>-void bfin_pint_resume(void);</span>
<span>-</span>
<span>-# if !BFIN_GPIO_PINT</span>
<span>-int adi_gpio_pm_wakeup_ctrl(unsigned gpio, unsigned ctrl);</span>
struct gpio_port_s {
unsigned short data;
<span> <at> <at> -181,10 +185,11 <at> <at> struct gpio_port_s {</span>
*************************************************************
* MODIFICATION HISTORY :
**************************************************************/
<span>-</span>
<span>-int adi_gpio_irq_request(unsigned gpio, const char *label);</span>
<span>-void adi_gpio_irq_free(unsigned gpio);</span>
<span>-void adi_gpio_irq_prepare(unsigned gpio);</span>
<span>+#ifdef CONFIG_GPIO_ADI</span>
<span>+int bfin_gpio_irq_request(unsigned gpio, const char *label);</span>
<span>+void bfin_gpio_irq_free(unsigned gpio);</span>
<span>+void bfin_gpio_irq_prepare(unsigned gpio);</span>
<span>+#endif</span>
#include <asm/irq.h>
#include <asm/errno.h>
<span>diff --git a/arch/blackfin/include/asm/irq.h b/arch/blackfin/include/asm/irq.h</span>
<span>index 4ae1144..2fac596 100644</span>
<span>--- a/arch/blackfin/include/asm/irq.h</span>
<span>+++ b/arch/blackfin/include/asm/irq.h</span>
<span> <at> <at> -23,7 +23,7 <at> <at> </span>
/*
* pm save bfin pint registers
*/
<span>-struct bfin_pm_pint_save {</span>
<span>+struct adi_pm_pint_save {</span>
u32 mask_set;
u32 assign;
u32 edge_set;
<span>diff --git a/arch/blackfin/include/asm/irq_handler.h b/arch/blackfin/include/asm/irq_handler.h</span>
<span>index 60b97a6..3f770b2 100644</span>
<span>--- a/arch/blackfin/include/asm/irq_handler.h</span>
<span>+++ b/arch/blackfin/include/asm/irq_handler.h</span>
<span> <at> <at> -12,11 +12,11 <at> <at> </span>
#include <mach/irq.h>
/* init functions only */
<span>-extern int __init init_arch_irq(void);</span>
<span>+extern int init_arch_irq(void);</span>
extern void init_exception_vectors(void);
<span>-extern void __init program_IAR(void);</span>
<span>+extern void program_IAR(void);</span>
#ifdef init_mach_irq
<span>-extern void __init init_mach_irq(void);</span>
<span>+extern void init_mach_irq(void);</span>
#else
# define init_mach_irq()
#endif
<span>diff --git a/arch/blackfin/kernel/bfin_gpio.c b/arch/blackfin/kernel/bfin_gpio.c</span>
<span>index 2b08afa..2182de1 100644</span>
<span>--- a/arch/blackfin/kernel/bfin_gpio.c</span>
<span>+++ b/arch/blackfin/kernel/bfin_gpio.c</span>
<span> <at> <at> -13,7 +13,6 <at> <at> </span>
#include <linux/seq_file.h>
#include <linux/gpio.h>
#include <linux/irq.h>
<span>-#include <asm/irq_handler.h></span>
#if ANOMALY_05000311 || ANOMALY_05000323
enum {
<span> <at> <at> -519,7 +518,7 <at> <at> static const unsigned int sic_iwr_irqs[] = {</span>
*************************************************************
* MODIFICATION HISTORY :
**************************************************************/
<span>-int adi_gpio_pm_wakeup_ctrl(unsigned gpio, unsigned ctrl)</span>
<span>+int bfin_gpio_pm_wakeup_ctrl(unsigned gpio, unsigned ctrl)</span>
{
unsigned long flags;
<span> <at> <at> -538,7 +537,7 <at> <at> int adi_gpio_pm_wakeup_ctrl(unsigned gpio, unsigned ctrl)</span>
return 0;
}
<span>-int adi_gpio_pm_standby_ctrl(unsigned ctrl)</span>
<span>+int bfin_gpio_pm_standby_ctrl(unsigned ctrl)</span>
{
u16 bank, mask, i;
<span> <at> <at> -946,7 +945,7 <at> <at> EXPORT_SYMBOL(bfin_special_gpio_free);</span>
#endif
<span>-int adi_gpio_irq_request(unsigned gpio, const char *label)</span>
<span>+int bfin_gpio_irq_request(unsigned gpio, const char *label)</span>
{
unsigned long flags;
<span> <at> <at> -979,7 +978,7 <at> <at> int adi_gpio_irq_request(unsigned gpio, const char *label)</span>
return 0;
}
<span>-void adi_gpio_irq_free(unsigned gpio)</span>
<span>+void bfin_gpio_irq_free(unsigned gpio)</span>
{
unsigned long flags;
<span> <at> <at> -1027,7 +1026,7 <at> <at> int bfin_gpio_direction_input(unsigned gpio)</span>
}
EXPORT_SYMBOL(bfin_gpio_direction_input);
<span>-void adi_gpio_irq_prepare(unsigned gpio)</span>
<span>+void bfin_gpio_irq_prepare(unsigned gpio)</span>
{
port_setup(gpio, GPIO_USAGE);
}
<span>diff --git a/arch/blackfin/mach-bf548/include/mach/irq.h b/arch/blackfin/mach-bf548/include/mach/irq.h</span>
<span>index 10dc142..cf7cb72 100644</span>
<span>--- a/arch/blackfin/mach-bf548/include/mach/irq.h</span>
<span>+++ b/arch/blackfin/mach-bf548/include/mach/irq.h</span>
<span> <at> <at> -433,7 +433,7 <at> <at> </span>
#include <linux/types.h>
/*
<span>- * bfin pint registers layout</span>
<span>+ * gpio pint registers layout</span>
*/
struct bfin_pint_regs {
u32 mask_set;
<span>diff --git a/arch/blackfin/mach-bf609/include/mach/irq.h b/arch/blackfin/mach-bf609/include/mach/irq.h</span>
<span>index fa0843d..d1cb6a8 100644</span>
<span>--- a/arch/blackfin/mach-bf609/include/mach/irq.h</span>
<span>+++ b/arch/blackfin/mach-bf609/include/mach/irq.h</span>
<span> <at> <at> -298,7 +298,7 <at> <at> </span>
extern u8 sec_int_priority[];
/*
<span>- * bfin pint registers layout</span>
<span>+ * gpio pint registers layout</span>
*/
struct bfin_pint_regs {
u32 mask_set;
<span>diff --git a/arch/blackfin/mach-common/ints-priority.c b/arch/blackfin/mach-common/ints-priority.c</span>
<span>index 5c3653a..4dd4bd8 100644</span>
<span>--- a/arch/blackfin/mach-common/ints-priority.c</span>
<span>+++ b/arch/blackfin/mach-common/ints-priority.c</span>
<span> <at> <at> -729,9 +729,9 <at> <at> static inline void bfin_set_irq_handler(unsigned irq, irq_flow_handler_t handle)</span>
__irq_set_handler_locked(irq, handle);
}
<span>-static DECLARE_BITMAP(gpio_enabled, MAX_BLACKFIN_GPIOS);</span>
<span>+#ifdef CONFIG_GPIO_ADI</span>
<span>-#if !BFIN_GPIO_PINT</span>
<span>+static DECLARE_BITMAP(gpio_enabled, MAX_BLACKFIN_GPIOS);</span>
static void bfin_gpio_ack_irq(struct irq_data *d)
{
<span> <at> <at> -767,7 +767,7 <at> <at> static unsigned int bfin_gpio_irq_startup(struct irq_data *d)</span>
u32 gpionr = irq_to_gpio(d->irq);
if (__test_and_set_bit(gpionr, gpio_enabled))
<span>- adi_gpio_irq_prepare(gpionr);</span>
<span>+ bfin_gpio_irq_prepare(gpionr);</span>
bfin_gpio_unmask_irq(d);
<span> <at> <at> -780,7 +780,7 <at> <at> static void bfin_gpio_irq_shutdown(struct irq_data *d)</span>
bfin_gpio_mask_irq(d);
__clear_bit(gpionr, gpio_enabled);
<span>- adi_gpio_irq_free(gpionr);</span>
<span>+ bfin_gpio_irq_free(gpionr);</span>
}
static int bfin_gpio_irq_type(struct irq_data *d, unsigned int type)
<span> <at> <at> -801,12 +801,12 <at> <at> static int bfin_gpio_irq_type(struct irq_data *d, unsigned int type)</span>
IRQ_TYPE_LEVEL_HIGH | IRQ_TYPE_LEVEL_LOW)) {
snprintf(buf, 16, "gpio-irq%d", irq);
<span>- ret = adi_gpio_irq_request(gpionr, buf);</span>
<span>+ ret = bfin_gpio_irq_request(gpionr, buf);</span>
if (ret)
return ret;
if (__test_and_set_bit(gpionr, gpio_enabled))
<span>- adi_gpio_irq_prepare(gpionr);</span>
<span>+ bfin_gpio_irq_prepare(gpionr);</span>
} else {
__clear_bit(gpionr, gpio_enabled);
<span> <at> <at> -845,15 +845,6 <at> <at> static int bfin_gpio_irq_type(struct irq_data *d, unsigned int type)</span>
return 0;
}
<span>-#ifdef CONFIG_PM</span>
<span>-static int bfin_gpio_set_wake(struct irq_data *d, unsigned int state)</span>
<span>-{</span>
<span>- return adi_gpio_pm_wakeup_ctrl(irq_to_gpio(d->irq), state);</span>
<span>-}</span>
<span>-#else</span>
<span>-# define bfin_gpio_set_wake NULL</span>
<span>-#endif</span>
<span>-</span>
static void bfin_demux_gpio_block(unsigned int irq)
{
unsigned int gpio, mask;
<span> <at> <at> -920,278 +911,40 <at> <at> void bfin_demux_gpio_irq(unsigned int inta_irq,</span>
bfin_demux_gpio_block(irq);
}
<span>-#else</span>
<span>-</span>
<span>-#define NR_PINT_BITS 32</span>
<span>-#define IRQ_NOT_AVAIL 0xFF</span>
<span>-</span>
<span>-#define PINT_2_BANK(x) ((x) >> 5)</span>
<span>-#define PINT_2_BIT(x) ((x) & 0x1F)</span>
<span>-#define PINT_BIT(x) (1 << (PINT_2_BIT(x)))</span>
<span>-</span>
<span>-static unsigned char irq2pint_lut[NR_PINTS];</span>
<span>-static unsigned char pint2irq_lut[NR_PINT_SYS_IRQS * NR_PINT_BITS];</span>
<span>-</span>
<span>-static struct bfin_pint_regs * const pint[NR_PINT_SYS_IRQS] = {</span>
<span>- (struct bfin_pint_regs *)PINT0_MASK_SET,</span>
<span>- (struct bfin_pint_regs *)PINT1_MASK_SET,</span>
<span>- (struct bfin_pint_regs *)PINT2_MASK_SET,</span>
<span>- (struct bfin_pint_regs *)PINT3_MASK_SET,</span>
<span>-#ifdef CONFIG_BF60x</span>
<span>- (struct bfin_pint_regs *)PINT4_MASK_SET,</span>
<span>- (struct bfin_pint_regs *)PINT5_MASK_SET,</span>
<span>-#endif</span>
<span>-};</span>
<span>-</span>
<span>-inline unsigned int get_irq_base(u32 bank, u8 bmap)</span>
<span>-{</span>
<span>- unsigned int irq_base;</span>
<span>-</span>
<span>-#ifndef CONFIG_BF60x</span>
<span>- if (bank < 2) { /*PA-PB */</span>
<span>- irq_base = IRQ_PA0 + bmap * 16;</span>
<span>- } else { /*PC-PJ */</span>
<span>- irq_base = IRQ_PC0 + bmap * 16;</span>
<span>- }</span>
<span>-#else</span>
<span>- irq_base = IRQ_PA0 + bank * 16 + bmap * 16;</span>
<span>-#endif</span>
<span>- return irq_base;</span>
<span>-}</span>
<span>-</span>
<span>- /* Whenever PINTx_ASSIGN is altered init_pint_lut() must be executed! */</span>
<span>-void init_pint_lut(void)</span>
<span>-{</span>
<span>- u16 bank, bit, irq_base, bit_pos;</span>
<span>- u32 pint_assign;</span>
<span>- u8 bmap;</span>
<span>-</span>
<span>- memset(irq2pint_lut, IRQ_NOT_AVAIL, sizeof(irq2pint_lut));</span>
<span>-</span>
<span>- for (bank = 0; bank < NR_PINT_SYS_IRQS; bank++) {</span>
<span>-</span>
<span>- pint_assign = pint[bank]->assign;</span>
<span>-</span>
<span>- for (bit = 0; bit < NR_PINT_BITS; bit++) {</span>
<span>-</span>
<span>- bmap = (pint_assign >> ((bit / 8) * 8)) & 0xFF;</span>
<span>-</span>
<span>- irq_base = get_irq_base(bank, bmap);</span>
<span>-</span>
<span>- irq_base += (bit % 8) + ((bit / 8) & 1 ? 8 : 0);</span>
<span>- bit_pos = bit + bank * NR_PINT_BITS;</span>
<span>-</span>
<span>- pint2irq_lut[bit_pos] = irq_base - SYS_IRQS;</span>
<span>- irq2pint_lut[irq_base - SYS_IRQS] = bit_pos;</span>
<span>- }</span>
<span>- }</span>
<span>-}</span>
<span>-</span>
<span>-static void bfin_gpio_ack_irq(struct irq_data *d)</span>
<span>-{</span>
<span>- u32 pint_val = irq2pint_lut[d->irq - SYS_IRQS];</span>
<span>- u32 pintbit = PINT_BIT(pint_val);</span>
<span>- u32 bank = PINT_2_BANK(pint_val);</span>
<span>-</span>
<span>- if (irqd_get_trigger_type(d) == IRQ_TYPE_EDGE_BOTH) {</span>
<span>- if (pint[bank]->invert_set & pintbit)</span>
<span>- pint[bank]->invert_clear = pintbit;</span>
<span>- else</span>
<span>- pint[bank]->invert_set = pintbit;</span>
<span>- }</span>
<span>- pint[bank]->request = pintbit;</span>
<span>-</span>
<span>-}</span>
<span>-</span>
<span>-static void bfin_gpio_mask_ack_irq(struct irq_data *d)</span>
<span>-{</span>
<span>- u32 pint_val = irq2pint_lut[d->irq - SYS_IRQS];</span>
<span>- u32 pintbit = PINT_BIT(pint_val);</span>
<span>- u32 bank = PINT_2_BANK(pint_val);</span>
<span>-</span>
<span>- if (irqd_get_trigger_type(d) == IRQ_TYPE_EDGE_BOTH) {</span>
<span>- if (pint[bank]->invert_set & pintbit)</span>
<span>- pint[bank]->invert_clear = pintbit;</span>
<span>- else</span>
<span>- pint[bank]->invert_set = pintbit;</span>
<span>- }</span>
<span>-</span>
<span>- pint[bank]->request = pintbit;</span>
<span>- pint[bank]->mask_clear = pintbit;</span>
<span>-}</span>
<span>-</span>
<span>-static void bfin_gpio_mask_irq(struct irq_data *d)</span>
<span>-{</span>
<span>- u32 pint_val = irq2pint_lut[d->irq - SYS_IRQS];</span>
<span>-</span>
<span>- pint[PINT_2_BANK(pint_val)]->mask_clear = PINT_BIT(pint_val);</span>
<span>-}</span>
<span>-</span>
<span>-static void bfin_gpio_unmask_irq(struct irq_data *d)</span>
<span>-{</span>
<span>- u32 pint_val = irq2pint_lut[d->irq - SYS_IRQS];</span>
<span>- u32 pintbit = PINT_BIT(pint_val);</span>
<span>- u32 bank = PINT_2_BANK(pint_val);</span>
<span>-</span>
<span>- pint[bank]->mask_set = pintbit;</span>
<span>-}</span>
<span>-</span>
<span>-static unsigned int bfin_gpio_irq_startup(struct irq_data *d)</span>
<span>-{</span>
<span>- unsigned int irq = d->irq;</span>
<span>- u32 gpionr = irq_to_gpio(irq);</span>
<span>- u32 pint_val = irq2pint_lut[irq - SYS_IRQS];</span>
<span>-</span>
<span>- if (pint_val == IRQ_NOT_AVAIL) {</span>
<span>- printk(KERN_ERR</span>
<span>- "GPIO IRQ %d :Not in PINT Assign table "</span>
<span>- "Reconfigure Interrupt to Port Assignemt\n", irq);</span>
<span>- return -ENODEV;</span>
<span>- }</span>
<span>-</span>
<span>- if (__test_and_set_bit(gpionr, gpio_enabled))</span>
<span>- adi_gpio_irq_prepare(gpionr);</span>
<span>-</span>
<span>- bfin_gpio_unmask_irq(d);</span>
<span>-</span>
<span>- return 0;</span>
<span>-}</span>
<span>-</span>
<span>-static void bfin_gpio_irq_shutdown(struct irq_data *d)</span>
<span>-{</span>
<span>- u32 gpionr = irq_to_gpio(d->irq);</span>
<span>-</span>
<span>- bfin_gpio_mask_irq(d);</span>
<span>- __clear_bit(gpionr, gpio_enabled);</span>
<span>- adi_gpio_irq_free(gpionr);</span>
<span>-}</span>
<span>-</span>
<span>-static int bfin_gpio_irq_type(struct irq_data *d, unsigned int type)</span>
<span>-{</span>
<span>- unsigned int irq = d->irq;</span>
<span>- int ret;</span>
<span>- char buf[16];</span>
<span>- u32 gpionr = irq_to_gpio(irq);</span>
<span>- u32 pint_val = irq2pint_lut[irq - SYS_IRQS];</span>
<span>- u32 pintbit = PINT_BIT(pint_val);</span>
<span>- u32 bank = PINT_2_BANK(pint_val);</span>
<span>-</span>
<span>- if (pint_val == IRQ_NOT_AVAIL)</span>
<span>- return -ENODEV;</span>
<span>-</span>
<span>- if (type == IRQ_TYPE_PROBE) {</span>
<span>- /* only probe unenabled GPIO interrupt lines */</span>
<span>- if (test_bit(gpionr, gpio_enabled))</span>
<span>- return 0;</span>
<span>- type = IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING;</span>
<span>- }</span>
<span>-</span>
<span>- if (type & (IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING |</span>
<span>- IRQ_TYPE_LEVEL_HIGH | IRQ_TYPE_LEVEL_LOW)) {</span>
<span>-</span>
<span>- snprintf(buf, 16, "gpio-irq%d", irq);</span>
<span>- ret = adi_gpio_irq_request(gpionr, buf);</span>
<span>- if (ret)</span>
<span>- return ret;</span>
<span>-</span>
<span>- if (__test_and_set_bit(gpionr, gpio_enabled))</span>
<span>- adi_gpio_irq_prepare(gpionr);</span>
<span>- } else {</span>
<span>- __clear_bit(gpionr, gpio_enabled);</span>
<span>- return 0;</span>
<span>- }</span>
<span>-</span>
<span>- if ((type & (IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_LEVEL_LOW)))</span>
<span>- pint[bank]->invert_set = pintbit; /* low or falling edge denoted by one */</span>
<span>- else</span>
<span>- pint[bank]->invert_clear = pintbit; /* high or rising edge denoted by zero */</span>
<span>-</span>
<span>- if ((type & (IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING))</span>
<span>- == (IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING)) {</span>
<span>- if (gpio_get_value(gpionr))</span>
<span>- pint[bank]->invert_set = pintbit;</span>
<span>- else</span>
<span>- pint[bank]->invert_clear = pintbit;</span>
<span>- }</span>
<span>-</span>
<span>- if (type & (IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING)) {</span>
<span>- pint[bank]->edge_set = pintbit;</span>
<span>- bfin_set_irq_handler(irq, handle_edge_irq);</span>
<span>- } else {</span>
<span>- pint[bank]->edge_clear = pintbit;</span>
<span>- bfin_set_irq_handler(irq, handle_level_irq);</span>
<span>- }</span>
<span>-</span>
<span>- return 0;</span>
<span>-}</span>
<span>-</span>
#ifdef CONFIG_PM
<span>-static struct bfin_pm_pint_save save_pint_reg[NR_PINT_SYS_IRQS];</span>
<span>-static u32 save_pint_sec_ctl[NR_PINT_SYS_IRQS];</span>
static int bfin_gpio_set_wake(struct irq_data *d, unsigned int state)
{
<span>- u32 pint_irq;</span>
<span>- u32 pint_val = irq2pint_lut[d->irq - SYS_IRQS];</span>
<span>- u32 bank = PINT_2_BANK(pint_val);</span>
<span>-</span>
<span>- switch (bank) {</span>
<span>- case 0:</span>
<span>- pint_irq = IRQ_PINT0;</span>
<span>- break;</span>
<span>- case 2:</span>
<span>- pint_irq = IRQ_PINT2;</span>
<span>- break;</span>
<span>- case 3:</span>
<span>- pint_irq = IRQ_PINT3;</span>
<span>- break;</span>
<span>- case 1:</span>
<span>- pint_irq = IRQ_PINT1;</span>
<span>- break;</span>
<span>-#ifdef CONFIG_BF60x</span>
<span>- case 4:</span>
<span>- pint_irq = IRQ_PINT4;</span>
<span>- break;</span>
<span>- case 5:</span>
<span>- pint_irq = IRQ_PINT5;</span>
<span>- break;</span>
<span>-#endif</span>
<span>- default:</span>
<span>- return -EINVAL;</span>
<span>- }</span>
<span>+ return bfin_gpio_pm_wakeup_ctrl(irq_to_gpio(d->irq), state);</span>
<span>+}</span>
<span>-#ifndef SEC_GCTL</span>
<span>- bfin_internal_set_wake(pint_irq, state);</span>
<span>-#endif</span>
<span>+#else</span>
<span>- return 0;</span>
<span>-}</span>
<span>+# define bfin_gpio_set_wake NULL</span>
<span>-void bfin_pint_suspend(void)</span>
<span>-{</span>
<span>- u32 bank;</span>
<span>+#endif</span>
<span>- for (bank = 0; bank < NR_PINT_SYS_IRQS; bank++) {</span>
<span>- save_pint_reg[bank].mask_set = pint[bank]->mask_set;</span>
<span>- save_pint_reg[bank].assign = pint[bank]->assign;</span>
<span>- save_pint_reg[bank].edge_set = pint[bank]->edge_set;</span>
<span>- save_pint_reg[bank].invert_set = pint[bank]->invert_set;</span>
<span>- }</span>
<span>-}</span>
<span>+static struct irq_chip bfin_gpio_irqchip = {</span>
<span>+ .name = "GPIO",</span>
<span>+ .irq_ack = bfin_gpio_ack_irq,</span>
<span>+ .irq_mask = bfin_gpio_mask_irq,</span>
<span>+ .irq_mask_ack = bfin_gpio_mask_ack_irq,</span>
<span>+ .irq_unmask = bfin_gpio_unmask_irq,</span>
<span>+ .irq_disable = bfin_gpio_mask_irq,</span>
<span>+ .irq_enable = bfin_gpio_unmask_irq,</span>
<span>+ .irq_set_type = bfin_gpio_irq_type,</span>
<span>+ .irq_startup = bfin_gpio_irq_startup,</span>
<span>+ .irq_shutdown = bfin_gpio_irq_shutdown,</span>
<span>+ .irq_set_wake = bfin_gpio_set_wake,</span>
<span>+};</span>
<span>-void bfin_pint_resume(void)</span>
<span>-{</span>
<span>- u32 bank;</span>
<span>+#endif</span>
<span>- for (bank = 0; bank < NR_PINT_SYS_IRQS; bank++) {</span>
<span>- pint[bank]->mask_set = save_pint_reg[bank].mask_set;</span>
<span>- pint[bank]->assign = save_pint_reg[bank].assign;</span>
<span>- pint[bank]->edge_set = save_pint_reg[bank].edge_set;</span>
<span>- pint[bank]->invert_set = save_pint_reg[bank].invert_set;</span>
<span>- }</span>
<span>-}</span>
<span>+#ifdef CONFIG_PM</span>
#ifdef SEC_GCTL
<span>+static u32 save_pint_sec_ctl[NR_PINT_SYS_IRQS];</span>
<span>+</span>
static int sec_suspend(void)
{
u32 bank;
<span> <at> <at> -1218,92 +971,10 <at> <at> static struct syscore_ops sec_pm_syscore_ops = {</span>
.suspend = sec_suspend,
.resume = sec_resume,
};
<span>-</span>
#endif
<span>-#else</span>
<span>-# define bfin_gpio_set_wake NULL</span>
<span>-#endif</span>
<span>-</span>
<span>-void bfin_demux_gpio_irq(unsigned int inta_irq,</span>
<span>- struct irq_desc *desc)</span>
<span>-{</span>
<span>- u32 bank, pint_val;</span>
<span>- u32 request, irq;</span>
<span>- u32 level_mask;</span>
<span>- int umask = 0;</span>
<span>- struct irq_chip *chip = irq_desc_get_chip(desc);</span>
<span>-</span>
<span>- if (chip->irq_mask_ack) {</span>
<span>- chip->irq_mask_ack(&desc->irq_data);</span>
<span>- } else {</span>
<span>- chip->irq_mask(&desc->irq_data);</span>
<span>- if (chip->irq_ack)</span>
<span>- chip->irq_ack(&desc->irq_data);</span>
<span>- }</span>
<span>-</span>
<span>- switch (inta_irq) {</span>
<span>- case IRQ_PINT0:</span>
<span>- bank = 0;</span>
<span>- break;</span>
<span>- case IRQ_PINT2:</span>
<span>- bank = 2;</span>
<span>- break;</span>
<span>- case IRQ_PINT3:</span>
<span>- bank = 3;</span>
<span>- break;</span>
<span>- case IRQ_PINT1:</span>
<span>- bank = 1;</span>
<span>- break;</span>
<span>-#ifdef CONFIG_BF60x</span>
<span>- case IRQ_PINT4:</span>
<span>- bank = 4;</span>
<span>- break;</span>
<span>- case IRQ_PINT5:</span>
<span>- bank = 5;</span>
<span>- break;</span>
<span>-#endif</span>
<span>- default:</span>
<span>- return;</span>
<span>- }</span>
<span>-</span>
<span>- pint_val = bank * NR_PINT_BITS;</span>
<span>-</span>
<span>- request = pint[bank]->request;</span>
<span>- level_mask = pint[bank]->edge_set & request;</span>
<span>-</span>
<span>- while (request) {</span>
<span>- if (request & 1) {</span>
<span>- irq = pint2irq_lut[pint_val] + SYS_IRQS;</span>
<span>- if (level_mask & PINT_BIT(pint_val)) {</span>
<span>- umask = 1;</span>
<span>- chip->irq_unmask(&desc->irq_data);</span>
<span>- }</span>
<span>- bfin_handle_irq(irq);</span>
<span>- }</span>
<span>- pint_val++;</span>
<span>- request >>= 1;</span>
<span>- }</span>
<span>-</span>
<span>- if (!umask)</span>
<span>- chip->irq_unmask(&desc->irq_data);</span>
<span>-}</span>
#endif
<span>-static struct irq_chip bfin_gpio_irqchip = {</span>
<span>- .name = "GPIO",</span>
<span>- .irq_ack = bfin_gpio_ack_irq,</span>
<span>- .irq_mask = bfin_gpio_mask_irq,</span>
<span>- .irq_mask_ack = bfin_gpio_mask_ack_irq,</span>
<span>- .irq_unmask = bfin_gpio_unmask_irq,</span>
<span>- .irq_disable = bfin_gpio_mask_irq,</span>
<span>- .irq_enable = bfin_gpio_unmask_irq,</span>
<span>- .irq_set_type = bfin_gpio_irq_type,</span>
<span>- .irq_startup = bfin_gpio_irq_startup,</span>
<span>- .irq_shutdown = bfin_gpio_irq_shutdown,</span>
<span>- .irq_set_wake = bfin_gpio_set_wake,</span>
<span>-};</span>
<span>-</span>
void __cpuinit init_exception_vectors(void)
{
/* cannot program in software:
<span> <at> <at> -1354,17 +1025,6 <at> <at> int __init init_arch_irq(void)</span>
local_irq_disable();
<span>-#if BFIN_GPIO_PINT</span>
<span>-# ifdef CONFIG_PINTx_REASSIGN</span>
<span>- pint[0]->assign = CONFIG_PINT0_ASSIGN;</span>
<span>- pint[1]->assign = CONFIG_PINT1_ASSIGN;</span>
<span>- pint[2]->assign = CONFIG_PINT2_ASSIGN;</span>
<span>- pint[3]->assign = CONFIG_PINT3_ASSIGN;</span>
<span>-# endif</span>
<span>- /* Whenever PINTx_ASSIGN is altered init_pint_lut() must be executed! */</span>
<span>- init_pint_lut();</span>
<span>-#endif</span>
<span>-</span>
for (irq = 0; irq <= SYS_IRQS; irq++) {
if (irq <= IRQ_CORETMR)
irq_set_chip(irq, &bfin_core_irqchip);
<span> <at> <at> -1372,12 +1032,8 <at> <at> int __init init_arch_irq(void)</span>
irq_set_chip(irq, &bfin_internal_irqchip);
switch (irq) {
<span>-#if BFIN_GPIO_PINT</span>
<span>- case IRQ_PINT0:</span>
<span>- case IRQ_PINT1:</span>
<span>- case IRQ_PINT2:</span>
<span>- case IRQ_PINT3:</span>
<span>-#elif defined(BF537_FAMILY)</span>
<span>+#if !BFIN_GPIO_PINT</span>
<span>+#if defined(BF537_FAMILY)</span>
case IRQ_PH_INTA_MAC_RX:
case IRQ_PF_INTA_PG_INTA:
#elif defined(BF533_FAMILY)
<span> <at> <at> -1395,6 +1051,7 <at> <at> int __init init_arch_irq(void)</span>
#endif
irq_set_chained_handler(irq, bfin_demux_gpio_irq);
break;
<span>+#endif</span>
#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
case IRQ_MAC_ERROR:
irq_set_chained_handler(irq,
<span> <at> <at> -1442,10 +1099,12 <at> <at> int __init init_arch_irq(void)</span>
handle_level_irq);
#endif
/* if configured as edge, then will be changed to do_edge_IRQ */
<span>+#ifdef CONFIG_GPIO_ADI</span>
for (irq = GPIO_IRQ_BASE;
irq < (GPIO_IRQ_BASE + MAX_BLACKFIN_GPIOS); irq++)
irq_set_chip_and_handler(irq, &bfin_gpio_irqchip,
handle_level_irq);
<span>+#endif</span>
bfin_write_IMASK(0);
CSYNC();
ilat = bfin_read_ILAT();
<span> <at> <at> -1548,19 +1207,6 <at> <at> int __init init_arch_irq(void)</span>
local_irq_disable();
<span>-#if BFIN_GPIO_PINT</span>
<span>-# ifdef CONFIG_PINTx_REASSIGN</span>
<span>- pint[0]->assign = CONFIG_PINT0_ASSIGN;</span>
<span>- pint[1]->assign = CONFIG_PINT1_ASSIGN;</span>
<span>- pint[2]->assign = CONFIG_PINT2_ASSIGN;</span>
<span>- pint[3]->assign = CONFIG_PINT3_ASSIGN;</span>
<span>- pint[4]->assign = CONFIG_PINT4_ASSIGN;</span>
<span>- pint[5]->assign = CONFIG_PINT5_ASSIGN;</span>
<span>-# endif</span>
<span>- /* Whenever PINTx_ASSIGN is altered init_pint_lut() must be executed! */</span>
<span>- init_pint_lut();</span>
<span>-#endif</span>
<span>-</span>
for (irq = 0; irq <= SYS_IRQS; irq++) {
if (irq <= IRQ_CORETMR) {
irq_set_chip_and_handler(irq, &bfin_core_irqchip,
<span> <at> <at> -1569,9 +1215,6 <at> <at> int __init init_arch_irq(void)</span>
if (irq == IRQ_CORETMR)
irq_set_handler(irq, handle_percpu_irq);
#endif
<span>- } else if (irq >= BFIN_IRQ(21) && irq <= BFIN_IRQ(26)) {</span>
<span>- irq_set_chip(irq, &bfin_sec_irqchip);</span>
<span>- irq_set_chained_handler(irq, bfin_demux_gpio_irq);</span>
} else if (irq >= BFIN_IRQ(34) && irq <= BFIN_IRQ(37)) {
irq_set_chip_and_handler(irq, &bfin_sec_irqchip,
handle_percpu_irq);
<span> <at> <at> -1586,10 +1229,6 <at> <at> int __init init_arch_irq(void)</span>
__irq_set_preflow_handler(irq, bfin_sec_preflow_handler);
}
}
<span>- for (irq = GPIO_IRQ_BASE;</span>
<span>- irq < (GPIO_IRQ_BASE + MAX_BLACKFIN_GPIOS); irq++)</span>
<span>- irq_set_chip_and_handler(irq, &bfin_gpio_irqchip,</span>
<span>- handle_level_irq);</span>
bfin_write_IMASK(0);
CSYNC();
<span>diff --git a/arch/blackfin/mach-common/pm.c b/arch/blackfin/mach-common/pm.c</span>
<span>index 939262f..1275d1c 100644</span>
<span>--- a/arch/blackfin/mach-common/pm.c</span>
<span>+++ b/arch/blackfin/mach-common/pm.c</span>
<span> <at> <at> -27,7 +27,7 <at> <at> struct bfin_cpu_pm_fns *bfin_cpu_pm;</span>
void bfin_pm_suspend_standby_enter(void)
{
<span>-#ifndef CONFIG_BF60x</span>
<span>+#if !BFIN_GPIO_PINT</span>
bfin_pm_standby_setup();
#endif
<span> <at> <at> -41,7 +41,7 <at> <at> void bfin_pm_suspend_standby_enter(void)</span>
# endif
#endif
<span>-#ifndef CONFIG_BF60x</span>
<span>+#if !BFIN_GPIO_PINT</span>
bfin_pm_standby_restore();
#endif
<span> <at> <at> -173,7 +173,7 <at> <at> int bfin_pm_suspend_mem_enter(void)</span>
adi_gpio_pm_hibernate_suspend();
#if BFIN_GPIO_PINT
<span>- bfin_pint_suspend();</span>
<span>+ adi_pint_suspend();</span>
#endif
#if defined(CONFIG_BFIN_EXTMEM_WRITEBACK) || defined(CONFIG_BFIN_L2_WRITEBACK)
<span> <at> <at> -195,7 +195,7 <at> <at> int bfin_pm_suspend_mem_enter(void)</span>
_enable_dcplb();
#if BFIN_GPIO_PINT
<span>- bfin_pint_resume();</span>
<span>+ adi_pint_resume();</span>
#endif
adi_gpio_pm_hibernate_restore();
</div>
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