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(unknown)


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(Continue reading)

viresh kumar | 3 Jan 04:48 2011

Re: [PATCH V3 36/63] ST SPEAr : FSMC (Flexible Static Memory Controller) NOR interface driver


Linus,

On 12/26/2010 09:08 PM, Linus Walleij wrote:
> 2010/12/20 Viresh Kumar <viresh.kumar <at> st.com>:
> 

(...)

>> diff --git a/arch/arm/mach-spear13xx/fsmc-nor.c b/arch/arm/mach-spear13xx/fsmc-nor.c
>> new file mode 100644
>> index 0000000..03234b6
>> --- /dev/null
>> +++ b/arch/arm/mach-spear13xx/fsmc-nor.c
> 
> What is this file doing in mach-spear13xx? Several other platforms
> like U300 and Nomadik use the same NOR controller.
> 
> This should be in drivers/mtd/* somewhere I believe?
> 
>>  <at>  <at>  -0,0 +1,85  <at>  <at> 
>> +/*
>> + * arch/arm/mach-spear13xx/fsmc-nor.c
>> + *
>> + * FSMC (Flexible Static Memory Controller) interface for NOR
>> + *
>> + * Copyright (C) 2010 ST Microelectronics
>> + * Vipin Kumar<vipin.kumar <at> st.com>
>> + *
>> + * This file is licensed under the terms of the GNU General Public
(Continue reading)

Nori, Sekhar | 3 Jan 12:49 2011
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RE: [PATCH v7 4/7] omap3: nand: prefetch in irq mode support

Hi Sukumar,

On Wed, Dec 29, 2010 at 19:02:23, Ghorai, Sukumar wrote:
> This patch enable prefetch-irq mode for nand transfer(read, write)
> 
> Signed-off-by: Vimal Singh <vimalsingh <at> ti.com>
> Signed-off-by: Sukumar Ghorai <s-ghorai <at> ti.com>
> ---
>  arch/arm/mach-omap2/board-flash.c      |    2 +
>  arch/arm/plat-omap/include/plat/nand.h |    4 +-
>  drivers/mtd/nand/omap2.c               |  169 ++++++++++++++++++++++++++++++++
>  3 files changed, 174 insertions(+), 1 deletions(-)
> 
> diff --git a/arch/arm/mach-omap2/board-flash.c b/arch/arm/mach-omap2/board-flash.c
> index f6b7253..1964509 100644
> --- a/arch/arm/mach-omap2/board-flash.c
> +++ b/arch/arm/mach-omap2/board-flash.c
>  <at>  <at>  -16,6 +16,7  <at>  <at> 
>  #include <linux/platform_device.h>
>  #include <linux/mtd/physmap.h>
>  #include <linux/io.h>
> +#include <plat/irqs.h>
>  
>  #include <plat/gpmc.h>
>  #include <plat/nand.h>
>  <at>  <at>  -147,6 +148,7  <at>  <at>  __init board_nand_init(struct mtd_partition *nand_parts,
>  	board_nand_data.nr_parts	= nr_parts;
>  	board_nand_data.devsize		= nand_type;
>  
> +	board_nand_data.gpmc_irq = OMAP_GPMC_IRQ_BASE + cs;
(Continue reading)

Nori, Sekhar | 3 Jan 13:25 2011
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RE: [PATCH v7 5/7] omap3: nand: configurable fifo threshold to gain the throughput

Hi Sukumar,

On Wed, Dec 29, 2010 at 19:02:24, Ghorai, Sukumar wrote:
> Configure the FIFO THREASHOLD value different for read and write to keep busy
> both filling and to drain out of FIFO at reading and writing.
> 
> Signed-off-by: Vimal Singh <vimalsingh <at> ti.com>
> Signed-off-by: Sukumar Ghorai <s-ghorai <at> ti.com>
> ---
>  arch/arm/mach-omap2/gpmc.c             |   11 +++++++----
>  arch/arm/plat-omap/include/plat/gpmc.h |    5 ++++-
>  drivers/mtd/nand/omap2.c               |   22 ++++++++++++++--------
>  3 files changed, 25 insertions(+), 13 deletions(-)
> 
> diff --git a/arch/arm/mach-omap2/gpmc.c b/arch/arm/mach-omap2/gpmc.c
> index cfaf357..b26b1a5 100644
> --- a/arch/arm/mach-omap2/gpmc.c
> +++ b/arch/arm/mach-omap2/gpmc.c
>  <at>  <at>  -59,7 +59,6  <at>  <at> 
>  #define GPMC_CHUNK_SHIFT	24		/* 16 MB */
>  #define GPMC_SECTION_SHIFT	28		/* 128 MB */
>  
> -#define PREFETCH_FIFOTHRESHOLD	(0x40 << 8)
>  #define CS_NUM_SHIFT		24
>  #define ENABLE_PREFETCH		(0x1 << 7)
>  #define DMA_MPU_MODE		2
>  <at>  <at>  -595,15 +594,19  <at>  <at>  EXPORT_SYMBOL(gpmc_nand_write);
>  /**
>   * gpmc_prefetch_enable - configures and starts prefetch transfer
>   *  <at> cs: cs (chip select) number
(Continue reading)

stefani | 3 Jan 16:39 2011
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[PATCH] Add an option do not erase pristine blocks in ubiformat

From: Stefani Seibold <stefani <at> seibold.net>

This patch add a pristine option which skips erasing of pristine flash blocks.
This is useful for first time production environments where the flash arrived
erased.

The patch is against the current mtd git tree.

Signed-off-by: Stefani Seibold <stefani <at> seibold.net>
---
 ubi-utils/src/ubiformat.c |   34 +++++++++++++++++++++++++++++-----
 1 files changed, 29 insertions(+), 5 deletions(-)

diff --git a/ubi-utils/src/ubiformat.c b/ubi-utils/src/ubiformat.c
index 098da7d..83e3485 100644
--- a/ubi-utils/src/ubiformat.c
+++ b/ubi-utils/src/ubiformat.c
 <at>  <at>  -29,7 +29,7  <at>  <at> 
  */
 #define MAX_CONSECUTIVE_BAD_BLOCKS 4

-#define PROGRAM_VERSION "1.5"
+#define PROGRAM_VERSION "1.6"
 #define PROGRAM_NAME    "ubiformat"

 #include <sys/stat.h>
 <at>  <at>  -55,6 +55,7  <at>  <at>  struct args {
 	unsigned int verbose:1;
 	unsigned int override_ec:1;
 	unsigned int novtbl:1;
(Continue reading)

Dan Carpenter | 3 Jan 20:14 2011
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smatch stuff: mtd/cafe_nand: cafe_device_ready() always returns true

Hi David,

cafe_device_ready() always returns 1.  It looks like something else was
intended but I don't know the code enough to say what should go there.

drivers/mtd/nand/cafe_nand.c +107 cafe_device_ready(3)
	warn: condition is always true

   104  static int cafe_device_ready(struct mtd_info *mtd)
   105  {
   106          struct cafe_priv *cafe = mtd->priv;
   107          int result = !!(cafe_readl(cafe, NAND_STATUS) | 0x40000000);
                                                             ^^^^^^^^^^^^^
	This bit is always non-zero because we take the result of
	cafe_readl() and do a bitwize or with 0x40000000.  Then the
	double negate means that result is always 1.

   108          uint32_t irqs = cafe_readl(cafe, NAND_IRQ);
   109

regards,
dan carpenter

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Atsushi Nemoto | 4 Jan 06:13 2011
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Re: [PATCH] txx9ndfmc: limit transfer bytes to 512 (ECC provides 6 bytes max)

On Thu, 30 Dec 2010 10:30:11 +0100, Ralf Rösch <ralf.roesch <at> rw-gmbh.de> wrote:
> See commit: c0cbfd0e81d879a950ba6f0df3f75ea30c5ab16e
> Using __nand_correct_data() helper function, this driver can read 512
> byte (with 6 byte ECC) at a time.
> 
> This is correct, but not more:
> With NAND chips providing page sizes > 512 Bytes
> chip->ecc.bytes are calculated > 6 in txx9ndfmc_nand_scan.
> According the data sheet there are (only) 6 bytes ECC available.
> 
> After applying the patch a Hynix 512M*8 with 2k page size could be
> successfully formatted and used with an ubifs file system.
> 
> Signed-off-by: Ralf Roesch <ralf.roesch <at> rw-gmbh.de>

Thank you for the fix.  It is good news that this controller can work
with large page NAND.

Acked-by: Atsushi Nemoto <anemo <at> mba.ocn.ne.jp>

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Aleksandr Koltsoff | 4 Jan 09:42 2011
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[PATCH 1/1] m25p80: Fix JEDEC ID for AT26DF321

The last byte of the ID should be zero for this chip. Was added in
commit d0e8c47c58575b9131e786edb488fd029eba443e . Reported by Tomi
Varjo.

Signed-off-by: Aleksandr Koltsoff <aleksandr.koltsoff <at> ebts.fi>
---
 drivers/mtd/devices/m25p80.c |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/drivers/mtd/devices/m25p80.c b/drivers/mtd/devices/m25p80.c
index bf5a002..513b202 100644
--- a/drivers/mtd/devices/m25p80.c
+++ b/drivers/mtd/devices/m25p80.c
 <at>  <at>  -635,7 +635,7  <at>  <at>  static const struct spi_device_id m25p_ids[] = {
 	{ "at26f004",   INFO(0x1f0400, 0, 64 * 1024,  8, SECT_4K) },
 	{ "at26df081a", INFO(0x1f4501, 0, 64 * 1024, 16, SECT_4K) },
 	{ "at26df161a", INFO(0x1f4601, 0, 64 * 1024, 32, SECT_4K) },
-	{ "at26df321",  INFO(0x1f4701, 0, 64 * 1024, 64, SECT_4K) },
+	{ "at26df321",  INFO(0x1f4700, 0, 64 * 1024, 64, SECT_4K) },

 	/* EON -- en25pxx */
 	{ "en25p32", INFO(0x1c2016, 0, 64 * 1024,  64, 0) },
--

-- 
1.7.3.4

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(Continue reading)

Ghorai, Sukumar | 4 Jan 09:50 2011
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RE: [PATCH v7 4/7] omap3: nand: prefetch in irq mode support


[..snip...]
> > +		if (info->buf_len & (info->buf_len < bytes))
> 
> Meant to use logical AND here?
[Ghorai] thanks, you are right.

[..snip..]
> > +	init_completion(&info->comp);
> 
> You can use INIT_COMPLETION to reset the completion variable.
> Same change can be done in write below.
[..snip..]
> s/methode/method
> 
[Ghorai] yes. I will do this 

[..snip..]
> > +	/* waiting for write to complete */
> > +	wait_for_completion(&info->comp);
> > +	/* wait for data to flushed-out before reset the prefetch */
> > +	do {
> > +		ret = gpmc_read_status(GPMC_PREFETCH_COUNT);
> > +	} while (ret);
> 
> Please have a timeout for this while loop in case hardware does
> not become ready. Also, consider using cpu_relax() inside the
> tight loop.
> 
[Ghorai] Thanks. I will send again.
(Continue reading)

Sukumar Ghorai | 4 Jan 14:33 2011
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[PATCH v8 1/7] omap3630: nand: fix device size to work in polled mode

zoom3 and 3630-sdp having the x16 nand device.
This patch configure gpmc as x16 and select the currect function in driver
for polled mode (without prefetch enable) transfer.

Signed-off-by: Sukumar Ghorai <s-ghorai <at> ti.com>
---
 arch/arm/mach-omap2/board-3430sdp.c |    2 +-
 arch/arm/mach-omap2/board-3630sdp.c |    3 ++-
 arch/arm/mach-omap2/board-flash.c   |   10 ++++++----
 arch/arm/mach-omap2/board-flash.h   |    4 ++--
 arch/arm/mach-omap2/board-ldp.c     |    2 +-
 arch/arm/mach-omap2/board-zoom2.c   |    5 +++--
 arch/arm/mach-omap2/board-zoom3.c   |    5 +++--
 arch/arm/mach-omap2/gpmc-nand.c     |    7 +++++--
 drivers/mtd/nand/omap2.c            |    2 +-
 9 files changed, 24 insertions(+), 16 deletions(-)

diff --git a/arch/arm/mach-omap2/board-3430sdp.c b/arch/arm/mach-omap2/board-3430sdp.c
index 4e3742c..470872e 100644
--- a/arch/arm/mach-omap2/board-3430sdp.c
+++ b/arch/arm/mach-omap2/board-3430sdp.c
 <at>  <at>  -809,7 +809,7  <at>  <at>  static void __init omap_3430sdp_init(void)
 	omap_serial_init();
 	usb_musb_init(&musb_board_data);
 	board_smc91x_init();
-	board_flash_init(sdp_flash_partitions, chip_sel_3430);
+	board_flash_init(sdp_flash_partitions, chip_sel_3430, 0);
 	sdp3430_display_init();
 	enable_board_wakeup_source();
 	usb_ehci_init(&ehci_pdata);
(Continue reading)


Gmane