Nicolas Iooss | 5 Jul 03:57 2015

[PATCH] mtd: r852: make ecc_reg 32-bit in r852_ecc_correct

r852_ecc_correct() reads a 32-bit register into a 16-bit variable,
ecc_reg, but this variable is later used as if it was larger.  This is
reported by clang when building the kernel with many warnings:

    drivers/mtd/nand/r852.c:512:11: error: shift count >= width of type
    [-Werror,-Wshift-count-overflow]
                    ecc_reg >>= 16;
                            ^   ~~
Fix this by making ecc_reg 32-bit, like the return type of
r852_read_reg_dword().

Signed-off-by: Nicolas Iooss <nicolas.iooss_linux <at> m4x.org>
---

As I haven't got the hardware to test this patch, it is only compile-tested.

 drivers/mtd/nand/r852.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/mtd/nand/r852.c b/drivers/mtd/nand/r852.c
index 77e96d2df96c..cc6bac537f5a 100644
--- a/drivers/mtd/nand/r852.c
+++ b/drivers/mtd/nand/r852.c
 <at>  <at>  -466,7 +466,7  <at>  <at>  static int r852_ecc_calculate(struct mtd_info *mtd, const uint8_t *dat,
 static int r852_ecc_correct(struct mtd_info *mtd, uint8_t *dat,
 				uint8_t *read_ecc, uint8_t *calc_ecc)
 {
-	uint16_t ecc_reg;
+	uint32_t ecc_reg;
 	uint8_t ecc_status, err_byte;
(Continue reading)

Richard Weinberger | 3 Jul 10:36 2015
Picon

[PATCH 1/3] UBI: Fastmap: Simplify expression

There is no need to compute pnum again.

Signed-off-by: Richard Weinberger <richard <at> nod.at>
---
 drivers/mtd/ubi/fastmap.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/mtd/ubi/fastmap.c b/drivers/mtd/ubi/fastmap.c
index 24f2cf6..22db594 100644
--- a/drivers/mtd/ubi/fastmap.c
+++ b/drivers/mtd/ubi/fastmap.c
 <at>  <at>  -775,7 +775,7  <at>  <at>  static int ubi_attach_fastmap(struct ubi_device *ubi,
 		for (j = 0; j < be32_to_cpu(fm_eba->reserved_pebs); j++) {
 			int pnum = be32_to_cpu(fm_eba->pnum[j]);

-			if ((int)be32_to_cpu(fm_eba->pnum[j]) < 0)
+			if (pnum < 0)
 				continue;

 			aeb = NULL;
--

-- 
1.8.4.5

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Andrew E. Mileski | 2 Jul 21:21 2015
Picon

Hang on reboot in nand_get_device()

I'm experiencing a hang on reboot with a Freescale P1022 PowerPC system, with a
dual chip-select NAND part (specified in the device tree as two separate 
devices), and kernel v4.0.6.

It appears to be a hang in mtd/nand/nand_base.c:nand_get_device() waiting on
chip->controller->active.

Shouldn't nand_shutdown(), or perhaps a special case in nand_get_device() for
FL_SHUTDOWN, set chip->controller->active = NULL before returning?

This seems to fix the problem for me, but I don't know all the code well enough
to know whether doing so is appropriate, or sufficient.

~~Andrew E. Mileski

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Alexander Stein | 2 Jul 11:37 2015

[PATCH] mtd: fsl-quadspi: Actually clear TX FIFO upon write

QUADSPI_MCR_CLR_TXF_MASK is the correct mask for clearing the TX FIFO.

Signed-off-by: Alexander Stein <alexander.stein <at> systec-electronic.com>
---
 drivers/mtd/spi-nor/fsl-quadspi.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/mtd/spi-nor/fsl-quadspi.c b/drivers/mtd/spi-nor/fsl-quadspi.c
index 5d5d362..d8349cd 100644
--- a/drivers/mtd/spi-nor/fsl-quadspi.c
+++ b/drivers/mtd/spi-nor/fsl-quadspi.c
 <at>  <at>  -537,7 +537,7  <at>  <at>  static int fsl_qspi_nor_write(struct fsl_qspi *q, struct spi_nor *nor,

 	/* clear the TX FIFO. */
 	tmp = readl(q->iobase + QUADSPI_MCR);
-	writel(tmp | QUADSPI_MCR_CLR_RXF_MASK, q->iobase + QUADSPI_MCR);
+	writel(tmp | QUADSPI_MCR_CLR_TXF_MASK, q->iobase + QUADSPI_MCR);

 	/* fill the TX data to the FIFO */
 	for (j = 0, i = ((count + 3) / 4); j < i; j++) {
--

-- 
2.3.6

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Sasnett_Karen | 1 Jul 13:53 2015

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pavi1729 | 1 Jul 13:03 2015
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Query on ubifs_assert

Hi,

 FILE: fs/ubifs/misc.h :
 FUNCTION : ubifs_compr_present

"ubifs_compr_present" function has "ubifs_assert" which checks for the
valid compression value
and does a stack_dump if not.

Could there be a case where the "compr_type" is corrupt; if yes, then
does a stack_dump  suffice?
Thus if compr_type is invalid then the below return is not reliable.
    return !!ubifs_compressors[compr_type]->capi_name;

So where does this end, eventually does it go to a point where the
volume get corrupt and not unmountable ?

PS: If this is a very basic query do let me know, I can push this to
KernelNewbies mailing list.

Thanks,
PK

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Dongsheng Yang | 1 Jul 07:29 2015

[PATCH 1/2] ubifs: Kconfig: fix the description in Kconfig

If unsure we would say 'N' rather than 'Y'.

Signed-off-by: Dongsheng Yang <yangds.fnst <at> cn.fujitsu.com>
---
 fs/ubifs/Kconfig | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/fs/ubifs/Kconfig b/fs/ubifs/Kconfig
index ba66d50..f9aaad1 100644
--- a/fs/ubifs/Kconfig
+++ b/fs/ubifs/Kconfig
 <at>  <at>  -27,11 +27,11  <at>  <at>  config UBIFS_FS_LZO
 	default y
 	help
 	   LZO compressor is generally faster than zlib but compresses worse.
-	   Say 'Y' if unsure.
+	   Say 'N' if unsure.

 config UBIFS_FS_ZLIB
 	bool "ZLIB compression support" if UBIFS_FS_ADVANCED_COMPR
 	depends on UBIFS_FS
 	default y
 	help
-	  Zlib compresses better than LZO but it is slower. Say 'Y' if unsure.
+	  Zlib compresses better than LZO but it is slower. Say 'N' if unsure.
--

-- 
1.8.4.2

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(Continue reading)

Dongsheng Yang | 1 Jul 05:44 2015

[PATCH 1/4] mtd-utils: fix the trailing whitespace problems

Signed-off-by: Dongsheng Yang <yangds.fnst <at> cn.fujitsu.com>
---
 MAKEDEV                        | 2 +-
 fectest.c                      | 3 +--
 tests/ubi-tests/stress-test.sh | 8 ++++----
 ubi-utils/libubi.c             | 2 +-
 4 files changed, 7 insertions(+), 8 deletions(-)

diff --git a/MAKEDEV b/MAKEDEV
index b31e61f..a4141b5 100755
--- a/MAKEDEV
+++ b/MAKEDEV
 <at>  <at>  -38,5 +38,5  <at>  <at>  for a in `seq 0 16` ; do
 	mknod /dev/mtd$a c 90 `expr $a + $a`
 	mknod /dev/mtdr$a c 90 `expr $a + $a + 1`
 	mknod /dev/mtdblock$a b 31 $a
-done	
+done

diff --git a/fectest.c b/fectest.c
index c1fbd52..fd577f3 100644
--- a/fectest.c
+++ b/fectest.c
 <at>  <at>  -11,7 +11,6  <at>  <at> 
 #include <crc32.h>

 #define ERASE_SIZE 131072
-//#define PKT_SIZE 1400
 #define NR_PKTS ((ERASE_SIZE + PKT_SIZE - 1) / PKT_SIZE)
 #define DROPS 8
(Continue reading)

Yani Dubin | 1 Jul 02:58 2015

NAND/GPMC bus arbitration and MTD/OTP access

Hi,

I have a NAND driver question I was hoping someone could shed some light on
- it touches on the area of mtd, and I gather this is where the expertise
in such areas lies?

We have an extended NAND driver which adds OTP functionality (which works),
and I now want to determine whether this is robust. We access OTP functions
directly at the NAND driver level via sysfs (read, write, set page
number/offset), rather than coming through the mtd layer.

These (legacy) functions do not put the device into an exclusive OTP mode
(which would alter the semantics of read/write while active and hence would
require an exclusive lock).

We are using a TI Sitara AM3352 (OMAP) processor via its GPMC module,
connected to a parallel 8-bit Micron NAND (MT29F8G08ADBDAH4), with the
Linux-3.14.29ltsi kernel.

While I have locking around the OTP functions
(nand_chip.controller.lock/wq), other requests will be coming in via the
mtd layer.

The bus is driven using hwcontrol, and the command sequences look like:
Drive CLE (command byte 1 sets operation)
Drive ALE (5 cycles to set page row/col address)
[if write operation] write data to bus
Drive CLE (command byte 2 begins read or write)
[if read operation] poll gpmc status register for ready, then read data
from bus
(Continue reading)

Ionela Voinescu | 30 Jun 15:56 2015
Ionela Voinescu <ionela.voinescu <at> imgtec.com>

Subject: RE: [PATCH 1/1] mtd: nand_bbt: separate struct nand_chip from nand_bbt.c

RE: [PATCH 1/1] mtd: nand_bbt: separate struct nand_chip from nand_bbt.c

Hi Peter,

Thank you for putting the time and effort into separating BBT and preparing the ground for SPI NAND. This is good work.

I know you're preparing a new version of this but I wanted to draw your attention to some small details in the code.

I'm looking forward to working with you on this and we'll talk tomorrow about an action plan going forward.

Best regards,

Ionela.

> -----Original Message-----
> From: linux-mtd [mailto:linux-mtd-bounces <at> lists.infradead.org] On Behalf Of Peter Pan ?? (peterpandong)
> Sent: 15 May 2015 08:32
> To: dwmw2 <at> infradead.org; Brian Norris; fransklaver <at> gmail.com; wsa <at> the-dreams.de; zajec5 <at> gmail.com; boris.brezillon <at> free-electrons.com; baruch <at> tkos.co.il; ezequiel.garcia <at> free-electrons.com; kdasu.kdev <at> gmail.com; rogerq <at> ti.com; asierra <at> xes-inc.com; bpqw
> Cc: Qi Wang 王起 (qiwang); linux-mtd <at> lists.infradead.org; linux-kernel <at> vger.kernel.org; Peter Pan 潘栋 (peterpandong)
> Subject: [PATCH 1/1] mtd: nand_bbt: separate struct nand_chip from nand_bbt.c
>
> Currently nand_bbt.c is tied with struct nand_chip, and it makes other
> NAND family chips hard to use nand_bbt.c. Maybe it's the reason why
> onenand has own bbt(onenand_bbt.c).
>
> Parameterize a few relevant device detail information into a new
> nand_bbt struct, and set some hooks for chip specified part. Allocate
> and initialize struct nand_bbt in nand_base.c.
>
> Most of the patch is borrowed from Brian Norris <computersforpeace <at> gmail.com>.
> http://git.infradead.org/users/norris/linux-mtd.git/shortlog/refs/heads/nand-bbt
>
(Continue reading)

Alexey Firago | 30 Jun 11:53 2015

[PATCH] mtd: spi-nor: set SECT_4K for n25q064 SPI flash

Micron n25q064 flash supports 4 KiB erase sectors.

Signed-off-by: Alexey Firago <alexey_firago <at> mentor.com>
---
 drivers/mtd/spi-nor/spi-nor.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c
index d78831b..b2e8c3b 100644
--- a/drivers/mtd/spi-nor/spi-nor.c
+++ b/drivers/mtd/spi-nor/spi-nor.c
 <at>  <at>  -589,7 +589,7  <at>  <at>  static const struct spi_device_id spi_nor_ids[] = {

 	/* Micron */
 	{ "n25q032",	 INFO(0x20ba16, 0, 64 * 1024,   64, SPI_NOR_QUAD_READ) },
-	{ "n25q064",     INFO(0x20ba17, 0, 64 * 1024,  128, SPI_NOR_QUAD_READ) },
+	{ "n25q064",     INFO(0x20ba17, 0, 64 * 1024,  128, SECT_4K | SPI_NOR_QUAD_READ) },
 	{ "n25q128a11",  INFO(0x20bb18, 0, 64 * 1024,  256, SPI_NOR_QUAD_READ) },
 	{ "n25q128a13",  INFO(0x20ba18, 0, 64 * 1024,  256, SPI_NOR_QUAD_READ) },
 	{ "n25q256a",    INFO(0x20ba19, 0, 64 * 1024,  512, SECT_4K | SPI_NOR_QUAD_READ) },
--

-- 
1.9.1

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