Alexander Sverdlin | 19 Dec 18:00 2014

[PATCH v2] of: i2c: Add idle-disconnect DT property to PCA954x mux driver

of: i2c: Add idle-disconnect DT property to PCA954x mux driver

Add idle-disconnect device tree property to PCA954x mux driver. The new property
forces the multiplexer to disconnect child buses in idle state. This is used, for
example, when there are several multiplexers on the same bus and the devices on
the underlying buses might have same I2C addresses.

At the same time old (and not used in the tree) platform data binding
deselect_on_exit is removed to simplify the implementation. Old binding has
different (per-channel) semantics and doesn't fit well in the new concept.

Signed-off-by: Alexander Sverdlin <alexander.sverdlin@...>

Changes in v2:
- dropped idle-state binding
- headers in alphabetical order
- removed old platform data deselect_on_exit flag

 .../devicetree/bindings/i2c/i2c-mux-pca954x.txt    |    3 +++
 drivers/i2c/muxes/i2c-mux-pca954x.c                |    9 +++++++--
 include/linux/i2c/pca954x.h                        |    3 ---
 3 files changed, 10 insertions(+), 5 deletions(-)

diff --git a/Documentation/devicetree/bindings/i2c/i2c-mux-pca954x.txt b/Documentation/devicetree/bindings/i2c/i2c-mux-pca954x.txt
index 34a3fb6..0272463 100644
--- a/Documentation/devicetree/bindings/i2c/i2c-mux-pca954x.txt
+++ b/Documentation/devicetree/bindings/i2c/i2c-mux-pca954x.txt
 <at>  <at>  -16,6 +16,9  <at>  <at>  Required Properties:
 Optional Properties:
(Continue reading)

Wolfram Sang | 15 Dec 22:55 2014

Re: [PATCH v3 0/3] Add I2C support to Broadcom iProc


please don't drop the i2c-list.

> I guess you are probably extremely busy and might not have had a chance to
> look into the iProc I2C driver v3 patch that was submitted on December 9.
> I'm not trying to rush it, and am perfectly fine with waiting longer. I
> understand subsystem maintainers like you are usually very busy.

True, true.

> As I'm quite new to the upstreaming process, here I'd just like to find out
> in a bit more details on what to expect and how to proceed forward.

We are in the merge window currently, and I will start looking at new
patches probably around rc2 or so.

If you want to speed up things, check the reviews of other new drivers I
did in the recent past and check if some of the remarks also apply to
your driver.



Geert Uytterhoeven | 15 Dec 14:37 2014

[PATCH] i2c: sh_mobile: I2C_SH_MOBILE should depend on HAS_DMA

If NO_DMA=y:

drivers/built-in.o: In function `sh_mobile_i2c_dma_unmap':
i2c-sh_mobile.c:(.text+0x60de42): undefined reference to `dma_unmap_single'
drivers/built-in.o: In function `sh_mobile_i2c_xfer_dma':
i2c-sh_mobile.c:(.text+0x60df22): undefined reference to `dma_map_single'
i2c-sh_mobile.c:(.text+0x60df2e): undefined reference to `dma_mapping_error'

Signed-off-by: Geert Uytterhoeven <geert@...>
 drivers/i2c/busses/Kconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig
index c1351d9fb35bbc8d..f08dd20f625c184d 100644
--- a/drivers/i2c/busses/Kconfig
+++ b/drivers/i2c/busses/Kconfig
 <at>  <at>  -753,6 +753,7  <at>  <at>  config I2C_SH7760

 config I2C_SH_MOBILE
 	tristate "SuperH Mobile I2C Controller"
+	depends on HAS_DMA
 	  If you say yes to this option, support will be included for the


Alexander Sverdlin | 15 Dec 02:25 2014

[PATCH] of: i2c: Add DT bindings for idle states to PCA954x mux driver

of: i2c: Add DT bindings for idle states to PCA954x mux driver

Introduce two new device tree bindings to specify idle state of PCA954x family
of I2C multiplexors:
  - idle-state: specifies particular child bus to be selected in idle;
  - idle-disconnect: signals that mux should disconnect all child buses in idle;

Signed-off-by: Alexander Sverdlin <alexander.sverdlin@...>
 .../devicetree/bindings/i2c/i2c-mux-pca954x.txt    |    3 +
 drivers/i2c/muxes/i2c-mux-pca954x.c                |   51 +++++++++++++++++--
 2 files changed, 48 insertions(+), 6 deletions(-)

diff --git a/Documentation/devicetree/bindings/i2c/i2c-mux-pca954x.txt b/Documentation/devicetree/bindings/i2c/i2c-mux-pca954x.txt
index 34a3fb6..1fbe287 100644
--- a/Documentation/devicetree/bindings/i2c/i2c-mux-pca954x.txt
+++ b/Documentation/devicetree/bindings/i2c/i2c-mux-pca954x.txt
 <at>  <at>  -16,6 +16,9  <at>  <at>  Required Properties:
 Optional Properties:

   - reset-gpios: Reference to the GPIO connected to the reset input.
+  - idle-state: Child bus connected in idle state (specified by its "reg" value)
+  - idle-disconnect: Boolean; if defined, forces mux to disconnect all children
+    in idle state

diff --git a/drivers/i2c/muxes/i2c-mux-pca954x.c b/drivers/i2c/muxes/i2c-mux-pca954x.c
index ec11b40..69cf603 100644
--- a/drivers/i2c/muxes/i2c-mux-pca954x.c
(Continue reading)

Wolfram Sang | 14 Dec 14:38 2014

[PULL REQUEST] i2c for 3.19


for 3.19, the I2C subsystem has to offer special candy this time. Right
in time for Christmas :)

* I2C slave framework: finally, a generic mechanism for Linux being
  an I2C slave (if the bus driver supports that). Docs are still missing
  but will come later this cycle, the code is good enough to go.
* I2C muxes represent their topology in sysfs much more detailed.
  This will help users to navigate around much easier.
* irq population of i2c clients is now done at probe time, not device
  creation time, to have better support for deferred probing.
* new drivers for Imagination SCB, Amlogic Meson
* DMA support added for Freescale IMX, Renesas SHMobile
* slightly bigger driver updates to OMAP, i801, AT91, and rk3x
  (mostly quirk handling, timing updates, and using better kernel
* eeprom driver can now write with byte-access (very slow, but OK to
* and the bunch of smaller fixes, cleanups, ID updates...

Plese pull!



The following changes since commit 206c5f60a3d902bc4b56dab2de3e88de5eb06108:

  Linux 3.18-rc4 (2014-11-09 14:55:29 -0800)
(Continue reading)

Neelesh Gupta | 13 Dec 19:01 2014

[PATCH v4] i2c: Driver to expose PowerNV platform i2c busses

The patch exposes the available i2c busses on the PowerNV platform
to the kernel and implements the bus driver to support i2c and
smbus commands.
The driver uses the platform device infrastructure to probe the busses
on the platform and registers them with the i2c driver framework.

Signed-off-by: Neelesh Gupta <neelegup@...>
Signed-off-by: Benjamin Herrenschmidt <benh@...>
Acked-by: Wolfram Sang <wsa@...> (I2C part, excluding the bindings)

v3 -> v4:
- Rebased to the latest tree.
- Exported the opal function 'opal_i2c_request' in opal.c to make the
  driver build as module.

v2 -> v3:
- Added the device tree binding documentation for the driver.
- Sorted the ordering of this new driver added in Makefile.
- Removed populating the superfluous .owner field in 'struct driver'.

 Documentation/devicetree/bindings/i2c/i2c-opal.txt |   37 +++
 arch/powerpc/include/asm/opal.h                    |   29 ++
 arch/powerpc/platforms/powernv/opal-wrappers.S     |    1 
 arch/powerpc/platforms/powernv/opal.c              |   12 +
 drivers/i2c/busses/Kconfig                         |   11 +
 drivers/i2c/busses/Makefile                        |    1 
 drivers/i2c/busses/i2c-opal.c                      |  294 ++++++++++++++++++++
 7 files changed, 385 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/i2c/i2c-opal.txt
(Continue reading)

Muthu Mani | 13 Dec 12:47 2014

[PATCH v5 1/3] mfd: add support for Cypress CYUSBS234 USB Serial Bridge controller

Adds support for USB-I2C/GPIO interfaces of Cypress Semiconductor
CYUSBS234 USB-Serial Bridge controller.

Details about the device can be found at:

Separate cell drivers are available for I2C and GPIO. SPI and UART
are not supported yet.

Signed-off-by: Muthu Mani <muth@...>
Signed-off-by: Rajaram Regupathy <rera@...>
Changes since v4:
* Used macros for subclass values

Changes since v3:
* Added devm_* allocation function
* Added vendor commands to read configuration info

Changes since v2:
* Used auto mfd id to support multiple devices
* Cleaned up the code

Changes since v1:
* Identified different serial interface and loaded correct cell driver
* Formed a mfd id to support multiple devices
* Removed unused platform device

 drivers/mfd/Kconfig           |  11 +++
 drivers/mfd/Makefile          |   1 +
(Continue reading)

Harini Katakam | 12 Dec 05:18 2014

[PATCH v5 0/2] Cadence I2C driver fixes

This series implements workarounds for some bugs in Cadence I2C controller.

- The I2C controller when configured in Master Mode generates invalid read transactions.
When HOLD bit is set and HW timeout occurs, invalid read transactions are
generated on the bus. This will affect repeated start conditions and large
data transfer condtions where transfer_size_register has to be updated again.
The transfer size register rolls over erroneously under these conditions.
Note that this HW timeout cannot be disabled even if the interrupt is unused.
Errata link:

-The I2C controller when configured in Master Mode is the missing master completion interrupt.
During repeated start condition, the driver has to set the HOLD bit for
the set of transfer being done together and clear the HOLD bit just before
the last transfer. But the controller does not indicate completion when
a read/receive transfer is done if the HOLD bit is set. This affects
all repeated start operation where a read/receive transfer is not
the last transfer.
Errata link:

To address the above,
- >252 byte transfers are done such that transfer_size never becomes zero.
- timeout register value is increased (even though the driver doesn't use this).
- A check is performed to see if there is any transfer following a
read/receive transfer in the set of messages using repeated start.
An error is returned in such cases because if we proceed, completion interrupt
is never obtained and a SW timeout will occur.

Harini Katakam (2):
  i2c: cadence: Handle > 252 byte transfers
  i2c: cadence: Check for errata condition involving master receive
(Continue reading)

Doug Anderson | 11 Dec 20:18 2014

[PATCH] i2c: rk3x: Account for repeated start time requirement

On Rockchip I2C the controller drops SDA low in the repeated start
condition at half the SCL high time.

If we want to meet timing requirements, that means we need to hold SCL
high for (4.7us * 2) when we're sending a repeated start (.6us * 2 for
Fast-mode).  That lets us achieve minimum tSU;STA.  However, we don't
want to always hold SCL high for that long because we'd never be able
to make 100kHz or 400kHz speeds.

Let's fix this by doing our clock calculations twice: once taking the
above into account and once running at normal speeds.  We'll use the
slower speed when sending the start bit and the normal speed

Note: we really only need the conservative timing when sending
_repeated_ starts, not when sending the first start.  We don't account
for this so technically the first start bit will be longer too.
...well, except in the case when we use the combined write/read
optimization which doesn't use the same code.

As part of this change we needed to account for the SDA falling time.
The specification indicates that this should be the same, but we'll
follow Designware and add a binding.  Note that we deviate from
Designware and assign the default SDA falling time to be the same as
the SCL falling time, which is incredibly likely.

Signed-off-by: Doug Anderson <dianders@...>
Note: This is based on Addy's patch (i2c: rk3x: fix bug that cause
measured high_ns doesn't meet I2C specification) that can be found at
(Continue reading)

Thomas Petazzoni | 11 Dec 17:33 2014

[PATCH 0/2] i2c: i2c-mv64xxx: fix offload support


Please consider this set of two patches (one cleanup and one fix) that
aim at making the i2c-mv64xxx offload support work properly for SMBus
type transfers and make sure it only gets used for transactions where
it can really be used (in order to comply with the expectations of the
I2C subsystem in terms of repeated start usage between messages of the
same xfer).

Without this patch, a platform like the Armada XP WRT1900AC doesn't
even boot completely, because an I2C LED controller driver triggers
some SMBus transfers that are do not work with the current i2c-mv64xxx

They apply on top of 3.18.



Thomas Petazzoni (2):
  i2c: i2c-mv64xxx: use BIT() macro for register value definitions
  i2c: i2c-mv64xxx: rework offload support to fix several problems

 drivers/i2c/busses/i2c-mv64xxx.c | 325 +++++++++++++++++++++++----------------
 1 file changed, 194 insertions(+), 131 deletions(-)



(Continue reading)

Jisheng Zhang | 11 Dec 07:26 2014

[PATCH] i2c: designware: use {readl|writel}_relaxed instead of readl/writel

readl/writel is too expensive especially on Cortex A9 w/ outer L2 cache.
This introduces i2c read/write errors on Marvell BG2/BG2Q SoCs when there
are heavy L2 cache maintenance operations at the same time.

The driver does not perform DMA, so it's safe to use the relaxed version.
From another side, the relaxed io accessor macros are available on all
architectures now, so we can use the relaxed versions instead.

Signed-off-by: Jisheng Zhang <jszhang@...>
 drivers/i2c/busses/i2c-designware-core.c | 12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/drivers/i2c/busses/i2c-designware-core.c b/drivers/i2c/busses/i2c-designware-core.c
index 23628b7..e279948 100644
--- a/drivers/i2c/busses/i2c-designware-core.c
+++ b/drivers/i2c/busses/i2c-designware-core.c
 <at>  <at>  -170,10 +170,10  <at>  <at>  u32 dw_readl(struct dw_i2c_dev *dev, int offset)
 	u32 value;

 	if (dev->accessor_flags & ACCESS_16BIT)
-		value = readw(dev->base + offset) |
-			(readw(dev->base + offset + 2) << 16);
+		value = readw_relaxed(dev->base + offset) |
+			(readw_relaxed(dev->base + offset + 2) << 16);
-		value = readl(dev->base + offset);
+		value = readl_relaxed(dev->base + offset);

 	if (dev->accessor_flags & ACCESS_SWAP)
(Continue reading)