page allocation failure
Richard Harvey Chapman <hchapman-em28xx <at> 3gfp.com>
2007-05-22 20:07:04 GMT
I'm trying to demonstrate that a Videology 20K155USB works on my
embedded ARM system. I am using the "Video Capture Example" code from
Appendix B of the V4L2 spec. When I run that program the em28xx
driver generates a page allocation failure when calling
usb_buffer_alloc() in em28xx_init_isoc() in em28xx-core.c. Below, I
am including the output of /proc/cpuinfo, the module parameters, and
the dmesg output. I turned off i2c_debug for this test, but if
needed, I can capture that as well. My ultimate goal is to use this
camera in a handheld device like the camera in cel phone: live video
(possibly fps limited) and still picture capture.
I am only using the em28xx driver from Linux-2.6.17.9. I can try to
put the newer code into the older kernel (I'm tied to that kernel for
now), but the code that fails seems to be the same.
Any help would be appreciated. The same code works on an x86 system,
btw, with the same camera.
Thanks,
Harvey
------
Processor : XScale-PXA270 rev 7 (v5l)
BogoMIPS : 519.37
Features : swp half fastmult edsp
CPU implementer : 0x69
CPU architecture: 5TE
CPU variant : 0x0
CPU part : 0x411
CPU revision : 7
Cache type : undefined 5
Cache clean : undefined 5
Cache lockdown : undefined 5
Cache format : Harvard
I size : 32768
I assoc : 32
I line length : 32
I sets : 32
D size : 32768
D assoc : 32
D line length : 32
D sets : 32
Hardware : Applied Data Systems BitsyXb
Revision : 0000
Serial : 0000000000000000
---------
modprobe em28xx card=14 video_debug=1 core_debug=1 reg_debug=1
isoc_debug=1
em28xx v4l2 driver version 0.0.1 loaded
em28xx new video device (eb1a:2820): interface 0, class 255
em28xx #0: Alternate settings: 8
em28xx #0: Alternate setting 0, max size= 0
em28xx #0: Alternate setting 1, max size= 512
em28xx #0: Alternate setting 2, max size= 640
em28xx #0: Alternate setting 3, max size= 768
em28xx #0: Alternate setting 4, max size= 832
em28xx #0: Alternate setting 5, max size= 896
em28xx #0: Alternate setting 6, max size= 960
em28xx #0: Alternate setting 7, max size= 1020
em28xx #0 em28xx_init_dev :tvnorm=PAL
em28xx #0 em28xx_write_regs_req :req=00 reg=06: 40
em28xx #0 em28xx_write_regs_req :req=00 reg=11: 51
em28xx #0 em28xx_read_reg_req :req=00, reg=0f:07
em28xx #0 em28xx_write_regs_req :req=00 reg=0f: 07
em28xx #0 em28xx_write_regs_req :req=00 reg=40: 00 80
em28xx #0 em28xx_write_regs_req :req=00 reg=42: 02
em28xx #0 em28xx_read_reg_req :req=00, reg=43:00
em28xx #0 em28xx_write_regs_req :req=00 reg=40: 08 08
em28xx #0 em28xx_write_regs_req :req=00 reg=42: 14
em28xx #0 em28xx_read_reg_req :req=00, reg=43:00
em28xx #0 em28xx_write_regs_req :req=00 reg=27: 34
em28xx #0 em28xx_write_regs_req :req=00 reg=10: 10
em28xx #0 em28xx_write_regs_req :req=00 reg=11: 11
em28xx #0 em28xx_write_regs_req :req=00 reg=20: 10
em28xx #0 em28xx_write_regs_req :req=00 reg=21: 00
em28xx #0 em28xx_write_regs_req :req=00 reg=22: 10
em28xx #0 em28xx_write_regs_req :req=00 reg=23: 00
em28xx #0 em28xx_write_regs_req :req=00 reg=24: 00
em28xx #0 em28xx_write_regs_req :req=00 reg=25: 00
em28xx #0 em28xx_write_regs_req :req=00 reg=14: 20
em28xx #0 em28xx_write_regs_req :req=00 reg=15: 20
em28xx #0 em28xx_write_regs_req :req=00 reg=16: 20
em28xx #0 em28xx_write_regs_req :req=00 reg=17: 20
em28xx #0 em28xx_write_regs_req :req=00 reg=18: 00
em28xx #0 em28xx_write_regs_req :req=00 reg=19: 00
em28xx #0 em28xx_write_regs_req :req=00 reg=1a: 00
em28xx #0 em28xx_write_regs_req :req=00 reg=26: 00
em28xx #0 em28xx_read_reg_req :req=02, reg=d0:00
em28xx #0 em28xx_read_reg_req :req=00, reg=05:10
em28xx #0 em28xx_read_reg_req :req=02, reg=40:10
em28xx #0 em28xx_read_reg_req :req=00, reg=05:10
em28xx #0 em28xx_read_reg_req :req=02, reg=a0:70
em28xx #0 em28xx_read_reg_req :req=00, reg=05:00
em28xx #0 em28xx_read_reg_req :req=02, reg=a0:00
em28xx #0 em28xx_read_reg_req :req=00, reg=05:00
em28xx #0 em28xx_read_reg_req :req=02, reg=a0:38
em28xx #0 em28xx_read_reg_req :req=00, reg=05:00
em28xx #0 em28xx_write_regs_req :req=02 reg=a0: 00
em28xx #0 em28xx_read_reg_req_len :req=02, reg=a0 10 values: 00 43
29 ff 70 00 38 05 01 50 c0 20 20 20 20 20
em28xx #0 em28xx_read_reg_req :req=00, reg=05:00
em28xx #0 em28xx_read_reg_req_len :req=02, reg=a0 10 values: 20 20
20 30 12 15 45 0a 00 00 e1 f0 01 00 11 c0
em28xx #0 em28xx_read_reg_req :req=00, reg=05:00
em28xx #0 em28xx_read_reg_req_len :req=02, reg=a0 10 values: a0 a0
00 05 1a 83 50 10 48 10 00 00 00 01 80 08
em28xx #0 em28xx_read_reg_req :req=00, reg=05:00
em28xx #0 em28xx_read_reg_req_len :req=02, reg=a0 10 values: 00 00
00 00 00 05 a0 a0 80 80 a0 a0 80 80 02 02
em28xx #0 em28xx_read_reg_req :req=00, reg=05:00
em28xx #0 em28xx_read_reg_req_len :req=02, reg=a0 10 values: 55 00
3b 74 44 56 4f 43 4f 1a 47 27 4c 1f 54 2b
em28xx #0 em28xx_read_reg_req :req=00, reg=05:00
em28xx #0 em28xx_read_reg_req_len :req=02, reg=a0 10 values: 47 25
55 34 4b 12 2e 0e 4f 11 03 1a 05 28 21 3f
em28xx #0 em28xx_read_reg_req :req=00, reg=05:00
em28xx #0 em28xx_read_reg_req_len :req=02, reg=a0 10 values: 08 21
23 3f 09 21 23 3f 0b 99 07 00 03 00 00 00
em28xx #0 em28xx_read_reg_req :req=00, reg=05:00
em28xx #0 em28xx_read_reg_req_len :req=02, reg=a0 10 values: 02 40
02 c4 00 40 00 50 20 88 00 d0 08 04 08 40
em28xx #0 em28xx_read_reg_req :req=00, reg=05:00
em28xx #0 em28xx_read_reg_req_len :req=02, reg=a0 10 values: d5 ff
ff fe 33 80 80 80 34 00 b2 0c 43 01 26 10
em28xx #0 em28xx_read_reg_req :req=00, reg=05:00
em28xx #0 em28xx_read_reg_req_len :req=02, reg=a0 10 values: 05 4e
2f 00 13 20 3f 88 00 00 00 00 00 00 3f 37
em28xx #0 em28xx_read_reg_req :req=00, reg=05:00
em28xx #0 em28xx_read_reg_req_len :req=02, reg=a0 10 values: 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00
em28xx #0 em28xx_read_reg_req :req=00, reg=05:00
em28xx #0 em28xx_read_reg_req_len :req=02, reg=a0 10 values: 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00
em28xx #0 em28xx_read_reg_req :req=00, reg=05:00
em28xx #0 em28xx_read_reg_req_len :req=02, reg=a0 10 values: 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00
em28xx #0 em28xx_read_reg_req :req=00, reg=05:00
em28xx #0 em28xx_read_reg_req_len :req=02, reg=a0 10 values: 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00
em28xx #0 em28xx_read_reg_req :req=00, reg=05:00
em28xx #0 em28xx_read_reg_req_len :req=02, reg=a0 10 values: 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00
em28xx #0 em28xx_read_reg_req :req=00, reg=05:00
em28xx #0 em28xx_read_reg_req_len :req=02, reg=a0 10 values: 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00
em28xx #0 em28xx_read_reg_req :req=00, reg=05:00
em28xx #0: i2c eeprom 00: 00 43 29 ff 70 00 38 05 01 50 c0 20 20 20
20 20
em28xx #0: i2c eeprom 10: 20 20 20 30 12 15 45 0a 00 00 e1 f0 01 00
11 c0
em28xx #0: i2c eeprom 20: a0 a0 00 05 1a 83 50 10 48 10 00 00 00 01
80 08
em28xx #0: i2c eeprom 30: 00 00 00 00 00 05 a0 a0 80 80 a0 a0 80 80
02 02
em28xx #0: i2c eeprom 40: 55 00 3b 74 44 56 4f 43 4f 1a 47 27 4c 1f
54 2b
em28xx #0: i2c eeprom 50: 47 25 55 34 4b 12 2e 0e 4f 11 03 1a 05 28
21 3f
em28xx #0: i2c eeprom 60: 08 21 23 3f 09 21 23 3f 0b 99 07 00 03 00
00 00
em28xx #0: i2c eeprom 70: 02 40 02 c4 00 40 00 50 20 88 00 d0 08 04
08 40
em28xx #0: i2c eeprom 80: d5 ff ff fe 33 80 80 80 34 00 b2 0c 43 01
26 10
em28xx #0: i2c eeprom 90: 05 4e 2f 00 13 20 3f 88 00 00 00 00 00 00
3f 37
em28xx #0: i2c eeprom a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00
em28xx #0: i2c eeprom b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00
em28xx #0: i2c eeprom c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00
em28xx #0: i2c eeprom d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00
em28xx #0: i2c eeprom e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00
em28xx #0: i2c eeprom f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00
EEPROM ID= 0xff294300
Vendor/Product ID= 0070:0538
No audio on board.
400mA max power
Table at 0x20, strings=0x2020, 0x2020, 0x2020
em28xx #0 em28xx_write_regs_req :req=00 reg=06: 40
em28xx #0 em28xx_write_regs_req :req=00 reg=11: 51
em28xx #0 em28xx_read_reg_req :req=00, reg=0f:07
em28xx #0 em28xx_write_regs_req :req=00 reg=0f: 07
em28xx #0 em28xx_write_regs_req :req=00 reg=40: 00 80
em28xx #0 em28xx_write_regs_req :req=00 reg=42: 02
em28xx #0 em28xx_read_reg_req :req=00, reg=43:00
em28xx #0 em28xx_write_regs_req :req=00 reg=40: 08 08
em28xx #0 em28xx_write_regs_req :req=00 reg=42: 14
em28xx #0 em28xx_read_reg_req :req=00, reg=43:00
em28xx #0 em28xx_write_regs_req :req=00 reg=27: 34
em28xx #0 em28xx_write_regs_req :req=00 reg=10: 10
em28xx #0 em28xx_write_regs_req :req=00 reg=11: 11
em28xx #0 em28xx_write_regs_req :req=00 reg=20: 10
em28xx #0 em28xx_write_regs_req :req=00 reg=21: 00
em28xx #0 em28xx_write_regs_req :req=00 reg=22: 10
em28xx #0 em28xx_write_regs_req :req=00 reg=23: 00
em28xx #0 em28xx_write_regs_req :req=00 reg=24: 00
em28xx #0 em28xx_write_regs_req :req=00 reg=25: 00
em28xx #0 em28xx_write_regs_req :req=00 reg=14: 20
em28xx #0 em28xx_write_regs_req :req=00 reg=15: 20
em28xx #0 em28xx_write_regs_req :req=00 reg=16: 20
em28xx #0 em28xx_write_regs_req :req=00 reg=17: 20
em28xx #0 em28xx_write_regs_req :req=00 reg=18: 00
em28xx #0 em28xx_write_regs_req :req=00 reg=19: 00
em28xx #0 em28xx_write_regs_req :req=00 reg=1a: 00
em28xx #0 em28xx_write_regs_req :req=00 reg=26: 00
registered VBI
em28xx #0 video_mux :Setting input index=0, vmux=4, amux=0
em28xx #0 em28xx_read_reg_req :req=00, reg=0e:c0
em28xx #0 em28xx_write_regs_req :req=00 reg=0e: c0
em28xx #0: V4L2 device registered as /dev/video0 and /dev/vbi0
em28xx #0: Found MSI VOX USB 2.0
usbcore: registered new driver em28xx
em28xx #0 em28xx_v4l2_open :open minor=0 type=video-cap users=0
em28xx #0 em28xx_set_alternate :setting alternate 7 with
wMaxPacketSize=1020
em28xx #0 em28xx_read_reg_req :req=00, reg=0c:21
em28xx #0 em28xx_write_regs_req :req=00 reg=0c: 31
em28xx #0 em28xx_write_regs_req :req=00 reg=12: 67
em28xx #0 em28xx_write_regs_req :req=00 reg=27: 34
em28xx #0 em28xx_write_regs_req :req=00 reg=10: 10
em28xx #0 em28xx_write_regs_req :req=00 reg=11: 11
em28xx #0 em28xx_accumulator_set :em28xx Scale: (1,1)-(159,59)
em28xx #0 em28xx_write_regs_req :req=00 reg=28: 01
em28xx #0 em28xx_write_regs_req :req=00 reg=29: 9f
em28xx #0 em28xx_write_regs_req :req=00 reg=2a: 01
em28xx #0 em28xx_write_regs_req :req=00 reg=2b: 3b
em28xx #0 em28xx_capture_area_set :em28xx Area Set: (160,60)
em28xx #0 em28xx_write_regs_req :req=00 reg=1c: 00
em28xx #0 em28xx_write_regs_req :req=00 reg=1d: 00
em28xx #0 em28xx_write_regs_req :req=00 reg=1e: a0
em28xx #0 em28xx_write_regs_req :req=00 reg=1f: 3c
em28xx #0 em28xx_write_regs_req :req=00 reg=1b: 00
em28xx #0 em28xx_write_regs_req :req=00 reg=30: 00 00
em28xx #0 em28xx_write_regs_req :req=00 reg=32: 00 00
em28xx #0 em28xx_read_reg_req :req=00, reg=26:00
em28xx #0 em28xx_write_regs_req :req=00 reg=26: 00
em28xx #0 video_mux :Setting input index=0, vmux=4, amux=0
em28xx #0 em28xx_read_reg_req :req=00, reg=0e:c7
em28xx #0 em28xx_write_regs_req :req=00 reg=0e: c7
a.out: page allocation failure. order:4, mode:0x0
Mem-info:
DMA per-cpu:
cpu 0 hot: high 18, batch 3 used:16
cpu 0 cold: high 6, batch 1 used:0
DMA32 per-cpu: empty
Normal per-cpu: empty
HighMem per-cpu: empty
Free pages: 31184kB (0kB HighMem)
Active:4150 inactive:932 dirty:15 writeback:0 unstable:0 free:7796
slab:1235 mapped:2369 pagetables:111
DMA free:31184kB min:1024kB low:1280kB high:1536kB active:16600kB
inactive:3728kB present:65536kB pages_scanned:0 all_unreclaimable? no
lowmem_reserve[]: 0 0 0 0
DMA32 free:0kB min:0kB low:0kB high:0kB active:0kB inactive:0kB
present:0kB pages_scanned:0 all_unreclaimable? no
lowmem_reserve[]: 0 0 0 0
Normal free:0kB min:0kB low:0kB high:0kB active:0kB inactive:0kB
present:0kB pages_scanned:0 all_unreclaimable? no
lowmem_reserve[]: 0 0 0 0
HighMem free:0kB min:128kB low:128kB high:128kB active:0kB inactive:
0kB present:0kB pages_scanned:0 all_unreclaimable? no
lowmem_reserve[]: 0 0 0 0
DMA: 1378*4kB 1653*8kB 588*16kB 93*32kB 1*64kB 0*128kB 0*256kB
0*512kB 0*1024kB 0*2048kB 0*4096kB = 31184kB
DMA32: empty
Normal: empty
HighMem: empty
Swap cache: add 9764, delete 9636, find 4246/4734, race 0+0
Free swap = 4761904kB
Total swap = 4763264kB
Free swap: 4761904kB
16384 pages of RAM
7906 free pages
1133 reserved pages
1235 slab pages
3459 pages shared
128 pages swap cached
em28xx #0: unable to allocate 40800 bytes for transfer buffer 2
em28xx #0 em28xx_read_reg_req :req=00, reg=0c:31
em28xx #0 em28xx_write_regs_req :req=00 reg=0c: 21
em28xx #0 em28xx_write_regs_req :req=00 reg=12: 27
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