Uwe Hermann | 1 Apr 03:45
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[PATCH] flashrom: README / manpage fixes

See patch.

Uwe.
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Attachment (flashrom_doc_fixes.patch): text/x-diff, 4861 bytes
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Joseph Smith | 1 Apr 04:22

Re: Dell latitude c610


On Wed, 1 Apr 2009 01:29:30 +0200, Michal Janke <m.yankee <at> gmail.com> wrote:
> 2009/3/31 Joseph Smith <joe <at> settoplinux.org>:
>>
>> Hello, Looks like an i830 chipset laptop. I would love to see coreboot
>> running on an i830 chipset laptop. I wrote the i830 code (with lots of
> help
>> from everyone here:-) ) and would be glad to help in any way that I can.
>> Looks like the first thing is to get your SMSC LPC47N252 SuperIO
> working.
>> Most of the SMSC LPC47* are closely related from a programming stand
> point.
>> I think everything else is supported by coreboot. The only concerns I
> have
>> is with the graphics (LCD) and battery charging. See:
>> http://www.coreboot.org/Laptop
>> If your willing to give it a go, I woud be glad to support you any way I
>> can. If you want some base code to start with you can use the RCA RM4100
>> (i830 based set-top-box). Hope that helps.
>>
> 
> Thanks for your reply, Joseph. Sounds quite encouraging. Could you
> suggest, what I can start with? Qemu maybe? 
> 
If you want to start with Qemu, to get familiar with coreboot, that would
be good.
But if your really serious about this and want to dive right into real
hardware the first thing you need to do is get your SMSC LPC47N252 running,
I suggest downloading the datasheet and a few other LPC47* datasheets that
are supported to find the closest matching one. If your serious about this
(Continue reading)

Bao, Zheng | 1 Apr 04:50
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Micro code for 1022h 01000095h

This patch applies for DR-B2 and B3.

The patch file is for RFC requirement. Just copy the header file to
src/cpu/amd/model_10xxx/

Signed-off-by: Zheng Bao <zheng.bao <at> amd.com>

Attachment (mc_patch_01000095.patch): application/octet-stream, 10 KiB
Attachment (mc_patch_01000095.h): application/octet-stream, 10 KiB
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Michal Janke | 1 Apr 01:29
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Re: Dell latitude c610

2009/3/31 Joseph Smith <joe <at> settoplinux.org>:
>
> Hello, Looks like an i830 chipset laptop. I would love to see coreboot
> running on an i830 chipset laptop. I wrote the i830 code (with lots of help
> from everyone here:-) ) and would be glad to help in any way that I can.
> Looks like the first thing is to get your SMSC LPC47N252 SuperIO working.
> Most of the SMSC LPC47* are closely related from a programming stand point.
> I think everything else is supported by coreboot. The only concerns I have
> is with the graphics (LCD) and battery charging. See:
> http://www.coreboot.org/Laptop
> If your willing to give it a go, I woud be glad to support you any way I
> can. If you want some base code to start with you can use the RCA RM4100
> (i830 based set-top-box). Hope that helps.
>

Thanks for your reply, Joseph. Sounds quite encouraging. Could you
suggest, what I can start with? Qemu maybe? Do you think there would
be a need for a lot of programming?
I hope I would be able to handle this. Any I will surely need quite
some help... It's been quite a while since I last wrote any
significant portion of code.

What did you mean I should look for at http://www.coreboot.org/Laptop?
I didn't notice anything much related to my hardware there. Probably I
do not yet associate the therms with each other too well.

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(Continue reading)

Mondrian Nuessle | 1 Apr 09:13
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Re: [PATCH] First support for HP DL145 G3

>> thank you very much for your patch. Do you happen to know if the component's name is HT2100 or HT21000? Just
to make sure we have it in the repository correctly.
> The naming in the patch looks right. Broadcom refers to it as HT-2100
> and as both HT-2100 and BCM21000 in the datasheet (often as "BCM21000
> (HT-2100)" ).
that's my understanding, too.
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vinuxes gmail | 1 Apr 12:27
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Re: flashrom fails to write/erase on VIA VT8237

Hello Peter,
Is there something that i can look into? or any pointers?
Please help!

Rgds,
Vinod

On Tue, Mar 31, 2009 at 10:31 AM, vinuxesgmail <vinuxes <at> gmail.com> wrote:
Peter,
  I am stuck with the same error even after applying the new patch. Here's the command output:
{-------------------
stress:/tmp # ./flashrom -m "portwell:ppap-2020vl" -E          Calibrating delay loop... OK.

No coreboot table found.
Found chipset "VIA VT8237", enabling flash write... OK.
Found board "Portwell PPAP-2020VL", enabling flash write... OK.

Found chip "SST SST49LF004A/B" (512 KB) at physical address 0xfff80000.
Erasing flash chip... ERASE FAILED!
FAILED!
ERROR at 0x00000000: Expected=0xff, Read=0x49
-------------------
stress:/tmp # ./flashrom -m "portwell:ppap-2020vl" -w backup.bin

Calibrating delay loop... OK.
No coreboot table found.
Found chipset "VIA VT8237", enabling flash write... OK.
Found board "Portwell PPAP-2020VL", enabling flash write... OK.

Found chip "SST SST49LF004A/B" (512 KB) at physical address 0xfff80000.
Flash image seems to be a legacy BIOS. Disabling checks.
ERASE FAILED!
-------------------}

Please guide me further.

Regards,
Vinod

Peter Stuge wrote:
Gah! Sorry. Here it is.


//Peter
 


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coreboot v4.1

[Distribution to news outlets is encouraged.]

I'm happy to announce that today coreboot v4.1 has been released.

Besides being totally redesigned, it is super-fast, handles almost every
existing chipset, opens our codebase to contributors without lowlevel C
skills and is generally something to be celebrated. Not to mention the
environmental friendliness and promotion of world peace.

Features include, but are not limited to:

- LARROMFS-NG, allowing code and configuration storage in the ROM
without risking accidental reflashes. With its clean and simple design,
you can store hundreds of different file types easily in the ROM, each
of them being handled by a different plugin.

- SQL-based chipset programming. Gone are the days where you had to
differentiate between accessing PCI regs via struct device, u32 or
device_t variants. Now you can use statements like:
SELECT val_32bit FROM pci WHERE buslocation="badc:0f:fe.e" AND
configbytenumber=00;
or the even simpler
SELECT val_32bit FROM pci NATURAL JOIN configbytes WHERE
buslocation="badc:0f:fe.e" AND configbytename="Vendor ID";
Changing PCI config space follows similar rules.

- A SQL interpreter in coreboot which handles all chipset code. This SQL
interpreter combines the clarity of obfuscated FORTH with the speed of
unoptimized SQL.

- Self-modifying code! As we all know, self-modifying code has less bugs
because any given bug disappears after the code has been modified often
enough. Plus, this is a good way to exercise CPUs to detect hardware
problems more easily.

- Fancy linker scripts. LARROMFS-NG is the next generation archiving
solution for all our needs because it does not rely on inherently
bug-prone C code. LARROMFS-NG is implemented as a really big and
all-encompassing set of linker scripts which can even link new linkers
together which reinterpret these linker scripts.

- New plugin architecture. Coreboot v4.1 will faithfully execute any and
all code presented on any device attached to the board. Due to that,
trojanizing computers becomes a piece of cake, freeing up the precious
time of the intelligence community for more pressing problems like world
peace.

- Multi-language error messages. Although chinese error messages were a
bit difficult to store in 7-bit ASCII, we created a lossy compression
scheme which will hardly ever insult users by accident.

- An animated splash screen with sound. This was one of the most wanted
features in the past, but coreboot was too fast for anyone to notice the
splash screen. Now we have a mandatory delay of 20 seconds, enough for
short movies and even some tacked on ads.

- Ultra-secure Suspend-to-RAM (S3) for people worried of RAM readout
(the "cold boot attacks" with frozen RAM). During every suspend cycle,
coreboot completely wipes the RAM and will resume to a data-free system.

- WORN technology. This is shorthand for Write Once, Read Never. Others
practice that coding tradition by accident, but we have perfected it as
an art.

- Double use technology. Most people think of weapons when they hear
this, but it's more simple and a lot more environmentally friendly. Your
CPU will not only calculate stuff, coreboot can also switch off the fans
on demand to make sure the CPU will fry your omelette exactly right.

- Less-than-zero boot times. Ever had the problem that your boot took
too long? We have the simple solution: Once coreboot is finished with
initializing the hardware, it will set back your clock by 30 seconds.
Even with the mandatory 20 second delay for splash movies, you can
finish booting 9-10 seconds before you switched the machine on.

- Real life impact. With a less-than-zero boot time, time goes
effectively backward. If you assemble a big enough cluster of coreboot
machines, you can undo the worst decisions of your life.

As you can see, coreboot v4.1 is the best thing since the invention of
sliced bread. It even makes firmware veterans spin in their graves to
act as human-powered electricity generators (a nice environmental plus).

To limit the impact on the real world (especially due to the time
machine properties), this coreboot version will only be available for
download this April 1st.

Sincerely,
the coreboot team

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Patrick Georgi | 1 Apr 12:47
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Re: patch: add code for romfs booting to v2

Am 31.03.2009 21:09, schrieb Uwe Hermann:
Index: src/boot/selfboot.c =================================================================== --- src/boot/selfboot.c (revision 0) +++ src/boot/selfboot.c (revision 0) <at> <at> -0,0 +1,497 <at> <at> +#include <console/console.h>
Missing copyright owner, year, and license.
I asked Eric, and he states that elfboot is his. I'll prepare a patch for both files, but will commit this patch as-is.
Thanks Uwe for spotting this!

For the patch
Acked-by: Patrick Georgi <patrick.georgi <at> coresystems.de>


Patrick
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svn | 1 Apr 12:48
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[v2] r4039 - in trunk/coreboot-v2/src: boot lib

Author: oxygene
Date: 2009-04-01 12:48:39 +0200 (Wed, 01 Apr 2009)
New Revision: 4039

Added:
   trunk/coreboot-v2/src/boot/selfboot.c
   trunk/coreboot-v2/src/lib/romfs.c
Modified:
   trunk/coreboot-v2/src/boot/Config.lb
   trunk/coreboot-v2/src/boot/hardwaremain.c
   trunk/coreboot-v2/src/lib/Config.lb
Log:
This code adds support for coreboot images that use ROMFS. 

It also removes the call to FILO from hardwaremain -- that 
has needed removal for a long time. 

abuild tested.
Note that this code has been tested and works on 
both qemu and kontron. The changes to use it are coming 
next.

Signed-off-by: Ronald G. Minnich <rminnich <at> gmail.com>
Acked-by: Patrick Georgi <patrick.georgi <at> coresystems.de>

Modified: trunk/coreboot-v2/src/boot/Config.lb
===================================================================
--- trunk/coreboot-v2/src/boot/Config.lb	2009-03-31 17:17:30 UTC (rev 4038)
+++ trunk/coreboot-v2/src/boot/Config.lb	2009-04-01 10:48:39 UTC (rev 4039)
@@ -1,5 +1,8 @@
 object elfboot.o
 object hardwaremain.o
+if CONFIG_ROMFS
+	object selfboot.o
+end
 if CONFIG_FS_PAYLOAD
 	object filo.o
 end

Modified: trunk/coreboot-v2/src/boot/hardwaremain.c
===================================================================
--- trunk/coreboot-v2/src/boot/hardwaremain.c	2009-03-31 17:17:30 UTC (rev 4038)
+++ trunk/coreboot-v2/src/boot/hardwaremain.c	2009-04-01 10:48:39 UTC (rev 4039)
@@ -88,10 +88,21 @@
 	 */
 	lb_mem = write_tables();

-#if CONFIG_FS_PAYLOAD == 1
-	filo(lb_mem);
+#if CONFIG_ROMFS == 1
+	printk_err("=================================================\n");
+#if USE_FALLBACK_IMAGE == 1
+	void (*pl)(void) = romfs_load_payload(lb_mem, "fallback/payload");
 #else
+	void (*pl)(void) = romfs_load_payload(lb_mem, "normal/payload");
+#endif
+#endif
+
+#warning elfboot will soon be deprecated
+
+	printk_err("Trying elfboot, but that will be gone soon!\n");
 	elfboot(lb_mem);
-#endif
+
+	printk_err("NO BOOT METHOD succeeded\n");
+
 }

Added: trunk/coreboot-v2/src/boot/selfboot.c
===================================================================
--- trunk/coreboot-v2/src/boot/selfboot.c	                        (rev 0)
+++ trunk/coreboot-v2/src/boot/selfboot.c	2009-04-01 10:48:39 UTC (rev 4039)
@@ -0,0 +1,497 @@
+#include <console/console.h>
+#include <part/fallback_boot.h>
+#include <boot/elf.h>
+#include <boot/elf_boot.h>
+#include <boot/coreboot_tables.h>
+#include <ip_checksum.h>
+#include <stream/read_bytes.h>
+#include <stdint.h>
+#include <stdlib.h>
+#include <string.h>
+#include <romfs.h>
+
+#ifndef CONFIG_BIG_ENDIAN
+#define ntohl(x) ( ((x&0xff)<<24) | ((x&0xff00)<<8) | \
+		((x&0xff0000) >> 8) | ((x&0xff000000) >> 24) )
+#else
+#define ntohl(x) (x)
+#endif
+
+/* Maximum physical address we can use for the coreboot bounce buffer.
+ */
+#ifndef MAX_ADDR
+#define MAX_ADDR -1UL
+#endif
+
+extern unsigned char _ram_seg;
+extern unsigned char _eram_seg;
+
+struct segment {
+	struct segment *next;
+	struct segment *prev;
+	struct segment *phdr_next;
+	struct segment *phdr_prev;
+	unsigned long s_dstaddr;
+	unsigned long s_srcaddr;
+	unsigned long s_memsz;
+	unsigned long s_filesz;
+};
+
+struct verify_callback {
+	struct verify_callback *next;
+	int (*callback)(struct verify_callback *vcb, 
+		Elf_ehdr *ehdr, Elf_phdr *phdr, struct segment *head);
+	unsigned long desc_offset;
+	unsigned long desc_addr;
+};
+
+struct ip_checksum_vcb {
+	struct verify_callback data;
+	unsigned short ip_checksum;
+};
+
+int romfs_self_decompress(int algo, void *src,struct segment *new)
+{
+	u8 *dst;
+
+	/* for uncompressed, it's easy: just point at the area in ROM */
+	if (algo ==  ROMFS_COMPRESS_NONE) {
+		new->s_srcaddr = (u32) src;
+		new->s_filesz =  new->s_memsz;
+		return 0;
+	}
+
+	/* for compression, let's keep it simple. We'll malloc the destination 
+	 * area and decompress to there. The compression overhead far outweighs
+	 * any overhead for an extra copy. 
+	 */
+	dst = malloc(new->s_memsz);
+	if (! dst)
+		return -1;
+
+	switch(algo) {
+#ifdef CONFIG_COMPRESSION_LZMA
+	case ROMFS_COMPRESS_LZMA: {
+		unsigned long ulzma(unsigned char *src, unsigned char *dst);		
+		ulzma(src, dst);
+	}
+#endif
+
+#ifdef CONFIG_COMPRESSION_NRV2B
+	case ROMFS_COMPRESS_NRV2B: {
+		unsigned long unrv2b(u8 *src, u8 *dst, unsigned long *ilen_p);
+		unsigned long tmp;
+		unrv2b(src, dst, &tmp);
+	}
+#endif
+	default:
+		printk_info( "ROMFS:  Unknown compression type %d\n",
+		       algo);
+		return -1;
+	}
+
+	new->s_srcaddr = (u32) dst;
+	new->s_filesz =  new->s_memsz;
+	return 0;
+	
+}
+
+/* The problem:  
+ * Static executables all want to share the same addresses
+ * in memory because only a few addresses are reliably present on
+ * a machine, and implementing general relocation is hard.
+ *
+ * The solution:
+ * - Allocate a buffer twice the size of the coreboot image.
+ * - Anything that would overwrite coreboot copy into the lower half of
+ *   the buffer. 
+ * - After loading an ELF image copy coreboot to the upper half of the
+ *   buffer.
+ * - Then jump to the loaded image.
+ * 
+ * Benefits:
+ * - Nearly arbitrary standalone executables can be loaded.
+ * - Coreboot is preserved, so it can be returned to.
+ * - The implementation is still relatively simple,
+ *   and much simpler then the general case implemented in kexec.
+ * 
+ */
+
+static unsigned long get_bounce_buffer(struct lb_memory *mem)
+{
+	unsigned long lb_size;
+	unsigned long mem_entries;
+	unsigned long buffer;
+	int i;
+	lb_size = (unsigned long)(&_eram_seg - &_ram_seg);
+	/* Double coreboot size so I have somewhere to place a copy to return to */
+	lb_size = lb_size + lb_size;
+	mem_entries = (mem->size - sizeof(*mem))/sizeof(mem->map[0]);
+	buffer = 0;
+	for(i = 0; i < mem_entries; i++) {
+		unsigned long mstart, mend;
+		unsigned long msize;
+		unsigned long tbuffer;
+		if (mem->map[i].type != LB_MEM_RAM)
+			continue;
+		if (unpack_lb64(mem->map[i].start) > MAX_ADDR)
+			continue;
+		if (unpack_lb64(mem->map[i].size) < lb_size)
+			continue;
+		mstart = unpack_lb64(mem->map[i].start);
+		msize = MAX_ADDR - mstart +1;
+		if (msize > unpack_lb64(mem->map[i].size))
+			msize = unpack_lb64(mem->map[i].size);
+		mend = mstart + msize;
+		tbuffer = mend - lb_size;
+		if (tbuffer < buffer) 
+			continue;
+		buffer = tbuffer;
+	}
+	return buffer;
+}
+
+static int valid_area(struct lb_memory *mem, unsigned long buffer,
+	unsigned long start, unsigned long len)
+{
+	/* Check through all of the memory segments and ensure
+	 * the segment that was passed in is completely contained
+	 * in RAM.
+	 */
+	int i;
+	unsigned long end = start + len;
+	unsigned long mem_entries = (mem->size - sizeof(*mem))/sizeof(mem->map[0]);
+
+	/* See if I conflict with the bounce buffer */
+	if (end >= buffer) {
+		return 0;
+	}
+
+	/* Walk through the table of valid memory ranges and see if I
+	 * have a match.
+	 */
+	for(i = 0; i < mem_entries; i++) {
+		uint64_t mstart, mend;
+		uint32_t mtype;
+		mtype = mem->map[i].type;
+		mstart = unpack_lb64(mem->map[i].start);
+		mend = mstart + unpack_lb64(mem->map[i].size);
+		if ((mtype == LB_MEM_RAM) && (start < mend) && (end > mstart)) {
+			break;
+		}
+		if ((mtype == LB_MEM_TABLE) && (start < mend) && (end > mstart)) {
+			printk_err("Payload is overwriting Coreboot tables.\n");
+			break;
+		}
+	}
+	if (i == mem_entries) {
+		printk_err("No matching ram area found for range:\n");
+		printk_err("  [0x%016lx, 0x%016lx)\n", start, end);
+		printk_err("Ram areas\n");
+		for(i = 0; i < mem_entries; i++) {
+			uint64_t mstart, mend;
+			uint32_t mtype;
+			mtype = mem->map[i].type;
+			mstart = unpack_lb64(mem->map[i].start);
+			mend = mstart + unpack_lb64(mem->map[i].size);
+			printk_err("  [0x%016lx, 0x%016lx) %s\n",
+				(unsigned long)mstart, 
+				(unsigned long)mend, 
+				(mtype == LB_MEM_RAM)?"RAM":"Reserved");
+			
+		}
+		return 0;
+	}
+	return 1;
+}
+
+static void relocate_segment(unsigned long buffer, struct segment *seg)
+{
+	/* Modify all segments that want to load onto coreboot
+	 * to load onto the bounce buffer instead.
+	 */
+	unsigned long lb_start = (unsigned long)&_ram_seg;
+	unsigned long lb_end = (unsigned long)&_eram_seg;
+	unsigned long start, middle, end;
+
+	printk_spew("lb: [0x%016lx, 0x%016lx)\n", 
+		lb_start, lb_end);
+
+	start = seg->s_dstaddr;
+	middle = start + seg->s_filesz;
+	end = start + seg->s_memsz;
+	/* I don't conflict with coreboot so get out of here */
+	if ((end <= lb_start) || (start >= lb_end))
+		return;
+
+	printk_spew("segment: [0x%016lx, 0x%016lx, 0x%016lx)\n", 
+		start, middle, end);
+
+	/* Slice off a piece at the beginning
+	 * that doesn't conflict with coreboot.
+	 */
+	if (start < lb_start) {
+		struct segment *new;
+		unsigned long len = lb_start - start;
+		new = malloc(sizeof(*new));
+		*new = *seg;
+		new->s_memsz = len;
+		seg->s_memsz -= len;
+		seg->s_dstaddr += len;
+		seg->s_srcaddr += len;
+		if (seg->s_filesz > len) {
+			new->s_filesz = len;
+			seg->s_filesz -= len;
+		} else {
+			seg->s_filesz = 0;
+		}
+
+		/* Order by stream offset */
+		new->next = seg;
+		new->prev = seg->prev;
+		seg->prev->next = new;
+		seg->prev = new;
+		/* Order by original program header order */
+		new->phdr_next = seg;
+		new->phdr_prev = seg->phdr_prev;
+		seg->phdr_prev->phdr_next = new;
+		seg->phdr_prev = new;
+
+		/* compute the new value of start */
+		start = seg->s_dstaddr;
+		
+		printk_spew("   early: [0x%016lx, 0x%016lx, 0x%016lx)\n", 
+			new->s_dstaddr, 
+			new->s_dstaddr + new->s_filesz,
+			new->s_dstaddr + new->s_memsz);
+	}
+	
+	/* Slice off a piece at the end 
+	 * that doesn't conflict with coreboot 
+	 */
+	if (end > lb_end) {
+		unsigned long len = lb_end - start;
+		struct segment *new;
+		new = malloc(sizeof(*new));
+		*new = *seg;
+		seg->s_memsz = len;
+		new->s_memsz -= len;
+		new->s_dstaddr += len;
+		new->s_srcaddr += len;
+		if (seg->s_filesz > len) {
+			seg->s_filesz = len;
+			new->s_filesz -= len;
+		} else {
+			new->s_filesz = 0;
+		}
+		/* Order by stream offset */
+		new->next = seg->next;
+		new->prev = seg;
+		seg->next->prev = new;
+		seg->next = new;
+		/* Order by original program header order */
+		new->phdr_next = seg->phdr_next;
+		new->phdr_prev = seg;
+		seg->phdr_next->phdr_prev = new;
+		seg->phdr_next = new;
+
+		/* compute the new value of end */
+		end = start + len;
+		
+		printk_spew("   late: [0x%016lx, 0x%016lx, 0x%016lx)\n", 
+			new->s_dstaddr, 
+			new->s_dstaddr + new->s_filesz,
+			new->s_dstaddr + new->s_memsz);
+		
+	}
+	/* Now retarget this segment onto the bounce buffer */
+	/* sort of explanation: the buffer is a 1:1 mapping to coreboot. 
+	 * so you will make the dstaddr be this buffer, and it will get copied
+	 * later to where coreboot lives.
+	 */
+	seg->s_dstaddr = buffer + (seg->s_dstaddr - lb_start);
+
+	printk_spew(" bounce: [0x%016lx, 0x%016lx, 0x%016lx)\n", 
+		seg->s_dstaddr, 
+		seg->s_dstaddr + seg->s_filesz, 
+		seg->s_dstaddr + seg->s_memsz);
+}
+
+
+static int build_self_segment_list(
+	struct segment *head, 
+	unsigned long bounce_buffer, struct lb_memory *mem,
+	struct romfs_payload *payload, u32 *entry)
+{
+	struct segment *new;
+	struct segment *ptr;
+	u8 *data;
+	int datasize;
+	struct romfs_payload_segment *segment, *first_segment;
+	memset(head, 0, sizeof(*head));
+	head->phdr_next = head->phdr_prev = head;
+	head->next = head->prev = head;
+	first_segment = segment = &payload->segments;
+
+	while(1) {
+		printk_debug("Segment %p\n", segment);
+		switch(segment->type) {
+		default: printk_emerg("Bad segment type %x\n", segment->type);
+			return -1;
+		case PAYLOAD_SEGMENT_PARAMS:
+			printk_info("found param section\n");
+			segment++;
+			continue;
+		case PAYLOAD_SEGMENT_CODE:
+		case PAYLOAD_SEGMENT_DATA:
+			printk_info( "%s: ", segment->type == PAYLOAD_SEGMENT_CODE ? 
+				"code" : "data");
+		new = malloc(sizeof(*new));
+		new->s_dstaddr = ntohl((u32) segment->load_addr);
+		new->s_memsz = ntohl(segment->mem_len);
+
+		datasize = ntohl(segment->len);
+		/* figure out decompression, do it, get pointer to the area */
+		if (romfs_self_decompress(ntohl(segment->compression),
+					     ((unsigned char *) first_segment) +
+					     ntohl(segment->offset), new)) {
+			printk_emerg("romfs_self_decompress failed\n");
+			return;
+		}
+		printk_debug("New segment dstaddr 0x%lx memsize 0x%lx srcaddr 0x%lx filesize 0x%lx\n",
+			new->s_dstaddr, new->s_memsz, new->s_srcaddr, new->s_filesz);
+		/* Clean up the values */
+		if (new->s_filesz > new->s_memsz)  {
+			new->s_filesz = new->s_memsz;
+		}
+		printk_debug("(cleaned up) New segment addr 0x%lx size 0x%lx offset 0x%lx filesize 0x%lx\n",
+			new->s_dstaddr, new->s_memsz, new->s_srcaddr, new->s_filesz);
+		break;
+		case PAYLOAD_SEGMENT_BSS:
+			printk_info("BSS %p/%d\n", (void *) ntohl((u32) segment->load_addr),
+				 ntohl(segment->mem_len));
+			new = malloc(sizeof(*new));
+			new->s_filesz = 0;
+			new->s_dstaddr = ntohl((u32) segment->load_addr);
+			new->s_memsz = ntohl(segment->mem_len);
+
+			break;
+
+		case PAYLOAD_SEGMENT_ENTRY:
+			printk_info("Entry %p\n", (void *) ntohl((u32) segment->load_addr));
+			*entry =  (void *) ntohl((u32) segment->load_addr);
+			return 1;
+		}
+		segment++;
+		for(ptr = head->next; ptr != head; ptr = ptr->next) {
+			if (new->s_srcaddr < ntohl((u32) segment->load_addr))
+				break;
+		}
+		/* Order by stream offset */
+		new->next = ptr;
+		new->prev = ptr->prev;
+		ptr->prev->next = new;
+		ptr->prev = new;
+		/* Order by original program header order */
+		new->phdr_next = head;
+		new->phdr_prev = head->phdr_prev;
+		head->phdr_prev->phdr_next  = new;
+		head->phdr_prev = new;
+
+		/* Verify the memory addresses in the segment are valid */
+		if (!valid_area(mem, bounce_buffer, new->s_dstaddr, new->s_memsz)) 
+			goto out;
+
+		/* Modify the segment to load onto the bounce_buffer if necessary.
+		 */
+		relocate_segment(bounce_buffer, new);
+	}
+	return 1;
+ out:
+	return 0;
+}
+
+static int load_self_segments(
+	struct segment *head, struct romfs_payload *payload)
+{
+	unsigned long offset;
+	struct segment *ptr;
+	
+	offset = 0;
+	for(ptr = head->next; ptr != head; ptr = ptr->next) {
+		unsigned long skip_bytes, read_bytes;
+		unsigned char *dest, *middle, *end, *src;
+		byte_offset_t result;
+		printk_debug("Loading Segment: addr: 0x%016lx memsz: 0x%016lx filesz: 0x%016lx\n",
+			ptr->s_dstaddr, ptr->s_memsz, ptr->s_filesz);
+		
+		/* Compute the boundaries of the segment */
+		dest = (unsigned char *)(ptr->s_dstaddr);
+		end = dest + ptr->s_memsz;
+		middle = dest + ptr->s_filesz;
+		src = ptr->s_srcaddr;
+		printk_spew("[ 0x%016lx, %016lx, 0x%016lx) <- %016lx\n",
+			(unsigned long)dest,
+			(unsigned long)middle,
+			(unsigned long)end,
+			(unsigned long)src);
+		
+		/* Copy data from the initial buffer */
+		if (ptr->s_filesz) {
+			size_t len;
+			len = ptr->s_filesz;
+			memcpy(dest, src, len);
+			dest += len;
+		}
+		
+		/* Zero the extra bytes between middle & end */
+		if (middle < end) {
+			printk_debug("Clearing Segment: addr: 0x%016lx memsz: 0x%016lx\n",
+				(unsigned long)middle, (unsigned long)(end - middle));
+			
+			/* Zero the extra bytes */
+			memset(middle, 0, end - middle);
+		}
+	}
+	return 1;
+ out:
+	return 0;
+}
+
+int selfboot(struct lb_memory *mem, struct romfs_payload *payload)
+{
+	void *entry;
+	struct segment head;
+	unsigned long bounce_buffer;
+
+	/* Find a bounce buffer so I can load to coreboot's current location */
+	bounce_buffer = get_bounce_buffer(mem);
+	if (!bounce_buffer) {
+		printk_err("Could not find a bounce buffer...\n");
+		goto out;
+	}
+
+	/* Preprocess the self segments */
+	if (!build_self_segment_list(&head, bounce_buffer, mem, payload, &entry))
+		goto out;
+
+	/* Load the segments */
+	if (!load_self_segments(&head, payload))
+		goto out;
+
+	printk_spew("Loaded segments\n");
+
+	/* Reset to booting from this image as late as possible */
+	boot_successful();
+
+	printk_debug("Jumping to boot code at %p\n", entry);
+	post_code(0xfe);
+
+	/* Jump to kernel */
+	jmp_to_elf_entry(entry, bounce_buffer);
+	return 1;
+
+ out:
+	return 0;
+}
+

Modified: trunk/coreboot-v2/src/lib/Config.lb
===================================================================
--- trunk/coreboot-v2/src/lib/Config.lb	2009-03-31 17:17:30 UTC (rev 4038)
+++ trunk/coreboot-v2/src/lib/Config.lb	2009-04-01 10:48:39 UTC (rev 4039)
@@ -27,3 +27,7 @@
 	initobject memcpy.o
 	initobject memcmp.o
 end
+
+if CONFIG_ROMFS
+	object romfs.o
+end

Added: trunk/coreboot-v2/src/lib/romfs.c
===================================================================
--- trunk/coreboot-v2/src/lib/romfs.c	                        (rev 0)
+++ trunk/coreboot-v2/src/lib/romfs.c	2009-04-01 10:48:39 UTC (rev 4039)
@@ -0,0 +1,234 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2008, Jordan Crouse <jordan <at> cosmicpenguin.net>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA, 02110-1301 USA
+ */
+
+#include <types.h>
+#include <string.h>
+#include <console/console.h>
+#include <boot/coreboot_tables.h>
+#include <romfs.h>
+
+#ifndef CONFIG_BIG_ENDIAN
+#define ntohl(x) ( ((x&0xff)<<24) | ((x&0xff00)<<8) | \
+		((x&0xff0000) >> 8) | ((x&0xff000000) >> 24) )
+#else
+#define ntohl(x) (x)
+#endif
+
+int run_address(void *f);
+
+int romfs_decompress(int algo, void *src, void *dst, int len)
+{
+	switch(algo) {
+	case ROMFS_COMPRESS_NONE:
+		memcpy(dst, src, len);
+		return 0;
+
+#ifdef CONFIG_COMPRESSION_LZMA
+
+	case ROMFS_COMPRESS_LZMA: {
+		unsigned long ulzma(unsigned char *src, unsigned char *dst);
+		ulzma(src, dst);
+	}
+		return 0;
+#endif
+
+#ifdef CONFIG_COMPRESSION_NRV2B
+	case ROMFS_COMPRESS_NRV2B: {
+		unsigned long unrv2b(u8 *src, u8 *dst, unsigned long *ilen_p);
+		unsigned long tmp;
+
+		unrv2b(src, dst, &tmp);
+	}
+		return 0;
+#endif
+	default:
+		printk_info( "ROMFS:  Unknown compression type %d\n",
+		       algo);
+		return -1;
+	}
+}
+
+int romfs_check_magic(struct romfs_file *file)
+{
+	return !strcmp(file->magic, ROMFS_FILE_MAGIC) ? 1 : 0;
+}
+
+struct romfs_header *romfs_master_header(void)
+{
+	struct romfs_header *header;
+
+	unsigned long ptr = *((unsigned long *) ROMFS_HEADPTR_ADDR);
+	printk_debug("Check ROMFS header at %p\n", ptr);
+	header = (struct romfs_header *) ptr;
+
+	printk_debug("magic is %08x\n", ntohl(header->magic));
+	if (ntohl(header->magic) != ROMFS_HEADER_MAGIC) {
+		printk_err("NO ROMFS HEADER\n");
+		return NULL;
+	}
+
+	printk_debug("Found ROMFS header at %p\n", ptr);
+	return header;
+}
+
+struct romfs_file *romfs_find(const char *name)
+{
+	struct romfs_header *header = romfs_master_header();
+	unsigned long offset;
+
+	if (header == NULL)
+		return NULL;
+	offset = 0 - ntohl(header->romsize) + ntohl(header->offset);
+
+	while(1) {
+		struct romfs_file *file = (struct romfs_file *) offset;
+		if (romfs_check_magic(file)) printk_info("Check %s\n", ROMFS_NAME(file));
+		if (romfs_check_magic(file) &&
+		    !strcmp(ROMFS_NAME(file), name))
+			return file;
+
+		offset += ntohl(header->align);
+
+		if (offset < 0xFFFFFFFF - ntohl(header->romsize))
+			return NULL;
+	}
+}
+
+struct romfs_stage *romfs_find_file(const char *name, int type)
+{
+	struct romfs_file *file = romfs_find(name);
+
+	if (file == NULL) {
+		printk_info( "ROMFS:  Could not find file %s\n",
+		       name);
+		return NULL;
+	}
+
+	if (ntohl(file->type) != type) {
+		printk_info( "ROMFS:  File %s is of type %x instead of"
+		       "type %x\n", name, file->type, type);
+
+		return NULL;
+	}
+
+	return (void *) ROMFS_SUBHEADER(file);
+}
+
+int romfs_load_optionrom(const char *name, u32 dest)
+{
+	struct romfs_optionrom *orom = (struct romfs_optionrom *)
+		romfs_find_file(name, ROMFS_TYPE_OPTIONROM);
+
+	if (orom == NULL)
+		return -1;
+
+	if (romfs_decompress(ntohl(orom->compression),
+			     ((unsigned char *) orom) +
+			     sizeof(struct romfs_optionrom),
+			     (void *) dest,
+			     ntohl(orom->len)))
+		return -1;
+
+	return 0;
+}
+
+void * romfs_load_payload(struct lb_memory *lb_mem, const char *name)
+{
+	int selfboot(struct lb_memory *mem, struct romfs_payload *payload);
+	struct romfs_payload *payload = (struct romfs_payload *)
+		romfs_find_file(name, ROMFS_TYPE_PAYLOAD);
+
+	struct romfs_payload_segment *segment, *first_segment;
+
+	if (payload == NULL)
+		return (void *) -1;
+	printk_debug("Got a payload\n");
+	first_segment = segment = &payload->segments;
+	selfboot(lb_mem, payload);
+	printk_emerg("SELFBOOT RETURNED!\n");
+
+	return (void *) -1;
+}
+
+void * romfs_load_stage(const char *name)
+{
+	struct romfs_stage *stage = (struct romfs_stage *)
+		romfs_find_file(name, ROMFS_TYPE_STAGE);
+	/* this is a mess. There is no ntohll. */
+	/* for now, assume compatible byte order until we solve this. */
+	u32 entry;
+
+	if (stage == NULL)
+		return (void *) -1;
+
+	printk_info("Stage: load @ %d/%d bytes, enter @ %llx\n", 
+			ntohl((u32) stage->load), ntohl(stage->memlen), 
+			stage->entry);
+	memset((void *) ntohl((u32) stage->load), 0, ntohl(stage->memlen));
+
+	if (romfs_decompress(ntohl(stage->compression),
+			     ((unsigned char *) stage) +
+			     sizeof(struct romfs_stage),
+			     (void *) ntohl((u32) stage->load),
+			     ntohl(stage->len)))
+		return (void *) -1;
+
+	entry = stage->entry;
+//	return (void *) ntohl((u32) stage->entry);
+	return (void *) entry;
+}
+
+void * romfs_get_file(const char *name)
+{
+	return romfs_find(name);
+}
+
+int romfs_execute_stage(const char *name)
+{
+	struct romfs_stage *stage = (struct romfs_stage *)
+		romfs_find_file(name, ROMFS_TYPE_STAGE);
+
+	if (stage == NULL)
+		return 1;
+
+	if (ntohl(stage->compression) != ROMFS_COMPRESS_NONE) {
+		printk_info( "ROMFS:  Unable to run %s:  Compressed file"
+		       "Not supported for in-place execution\n", name);
+		return 1;
+	}
+
+	/* FIXME: This isn't right */
+	printk_info( "ROMFS: run @ %p\n", (void *) ntohl((u32) stage->entry));
+	return run_address((void *) ntohl((u32) stage->entry));
+}
+
+/**
+ *  * run_address is passed the address of a function taking no parameters and
+ *   * jumps to it, returning the result. 
+ *    * @param f the address to call as a function. 
+ *     * returns value returned by the function. 
+ *      */
+
+int run_address(void *f)
+{
+        int (*v) (void);
+        v = f;
+        return v();
+}
+

--

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svn | 1 Apr 13:03
Favicon

[v2] r4040 - trunk/coreboot-v2/src/boot

Author: oxygene
Date: 2009-04-01 13:03:32 +0200 (Wed, 01 Apr 2009)
New Revision: 4040

Modified:
   trunk/coreboot-v2/src/boot/elfboot.c
   trunk/coreboot-v2/src/boot/selfboot.c
Log:
Add copyright notices to two files, src/boot/elfboot.c
and its derivative src/boot/selfboot.c.

The mail in which Eric asserts authorship on elfboot.c is
quoted below, selfboot.c was substantially edited by Ron.
With that information in mind the change is trivial.

Signed-off-by: Patrick Georgi <patrick.georgi <at> coresystems.de>
Acked-by: Patrick Georgi <patrick.georgi <at> coresystems.de>

From: ebiederm <at> xmission.com (Eric W. Biederman)
Date: Wed, 01 Apr 2009 03:31:15 -0700
To: Patrick Georgi <patrick <at> georgi-clan.de>

Patrick Georgi <patrick <at> georgi-clan.de> writes:

> Hi,
>
> We found some file in the coreboot tree that we suspect is yours.
> Unfortunately,
> both copyright notice and license are missing.
> Could you please take a look at it, and state whether it's yours,
> and if so,
> what license is to be attached?

Yes. GPLv2

> The file in question is
> http://tracker.coreboot.org/trac/coreboot/browser/trunk/coreboot-v2/src/boot/elfboot.c
> and its history goes back to
> http://tracker.coreboot.org/trac/coreboot/log/trunk/LinuxBIOSv2/src/boot/elfboot.c?rev=2890

Eric

Modified: trunk/coreboot-v2/src/boot/elfboot.c
===================================================================
--- trunk/coreboot-v2/src/boot/elfboot.c	2009-04-01 10:48:39 UTC (rev 4039)
+++ trunk/coreboot-v2/src/boot/elfboot.c	2009-04-01 11:03:32 UTC (rev 4040)
@@ -1,3 +1,22 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2003 Eric W. Biederman <ebiederm <at> xmission.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA, 02110-1301 USA
+ */
+
 #include <console/console.h>
 #include <part/fallback_boot.h>
 #include <boot/elf.h>

Modified: trunk/coreboot-v2/src/boot/selfboot.c
===================================================================
--- trunk/coreboot-v2/src/boot/selfboot.c	2009-04-01 10:48:39 UTC (rev 4039)
+++ trunk/coreboot-v2/src/boot/selfboot.c	2009-04-01 11:03:32 UTC (rev 4040)
@@ -1,3 +1,23 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2003 Eric W. Biederman <ebiederm <at> xmission.com>
+ * Copyright (C) 2009 Ron Minnich <rminnich <at> gmail.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA, 02110-1301 USA
+ */
+
 #include <console/console.h>
 #include <part/fallback_boot.h>
 #include <boot/elf.h>

--

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