Re: [PATCH 2/3] Add support for 4 bytes rdid

On 30.06.2008 23:19, Peter Stuge wrote:
> On Mon, Jun 30, 2008 at 10:47:23PM +0200, Rudolf Marek wrote:
>   
>> @@ -97,7 +97,8 @@
>>  		if (!oddparity(readarr[1]))
>>  			printf_debug("RDID byte 1 parity violation.\n");
>>  		manuf_id = (readarr[0] << 8) | readarr[1];
>> -		model_id = readarr[2];
>> +		model_id = (bytes == 3) ? readarr[2] :
>> +						((readarr[2] << 8) | readarr[3]);
>>     
>
> Please improve this a bit, I suggest:
>
> model_id=readarr[2];
> if(bytes>3) { /* or 4==bytes */
>   model_id<<=8;
>   model_id|=readarr[3];
> }
>
> With a fix (not neccessarily mine) for the above, this is:
>   

Technically, both variants will fail for some chips. There are at least
the following RDID responses:
1 byte manuf, 2 bytes model
2 bytes manuf, 1 byte model
2 bytes manuf, 2 bytes model
and all of the above with additional data appended.

r3401 - trunk/util/flashrom

Author: stepan
Date: 2008-07-01 01:45:22 +0200 (Tue, 01 Jul 2008)
New Revision: 3401

Modified:
   trunk/util/flashrom/chipset_enable.c
   trunk/util/flashrom/flash.h
   trunk/util/flashrom/ichspi.c
   trunk/util/flashrom/it87spi.c
   trunk/util/flashrom/spi.c
Log:
First attempt to clean up SPI probing and create a common
construct: the flash bus.

At some point the flash bus will be part of struct flashchip.

Pardon me for pushing this in, but I think it is important to beware of further
decay and it will improve things for other developers in the short run.

Carl-Daniel, I will consider your suggestions in another patch. I want to keep
things from getting too much for now. The patch includes Rudolf's VIA SPI
changes though.

Signed-off-by: Stefan Reinauer <stepan <at> coresystems.de>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 <at> gmx.net>

Modified: trunk/util/flashrom/chipset_enable.c
===================================================================
--- trunk/util/flashrom/chipset_enable.c	2008-06-30 21:48:54 UTC (rev 3400)
+++ trunk/util/flashrom/chipset_enable.c	2008-06-30 23:45:22 UTC (rev 3401)

Re: r3399 - trunk/util/flashrom

On 30.06.2008 23:45, svn <at> coreboot.org wrote:
> Author: ruik
> Date: 2008-06-30 23:45:17 +0200 (Mon, 30 Jun 2008)
> New Revision: 3399
>
> Modified:
>    trunk/util/flashrom/flash.h
>    trunk/util/flashrom/spi.c
> Log:
> Mine AMIC flash chip needs 4 bytes RDID. Following patch adds support for that.
>
> Signed-off-by: Rudolf Marek <r.marek <at> assembler.cz>
> Acked-by: Peter Stuge <peter <at> stuge.se>
>   

Very nice work! AFAICS it will work with all problematic cases I know.

Regards,
Carl-Daniel

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Re: [PATCH 2/3] Add support for 4 bytes rdid

Carl-Daniel Hailfinger wrote:
> On 30.06.2008 23:19, Peter Stuge wrote:
>   
>> On Mon, Jun 30, 2008 at 10:47:23PM +0200, Rudolf Marek wrote:
>>   
>>     
>>> @@ -97,7 +97,8 @@
>>>  		if (!oddparity(readarr[1]))
>>>  			printf_debug("RDID byte 1 parity violation.\n");
>>>  		manuf_id = (readarr[0] << 8) | readarr[1];
>>> -		model_id = readarr[2];
>>> +		model_id = (bytes == 3) ? readarr[2] :
>>> +						((readarr[2] << 8) | readarr[3]);
>>>     
>>>       
>> Please improve this a bit, I suggest:
>>
>> model_id=readarr[2];
>> if(bytes>3) { /* or 4==bytes */
>>   model_id<<=8;
>>   model_id|=readarr[3];
>> }
>>
>> With a fix (not neccessarily mine) for the above, this is:
>>   
>>     
>
> Technically, both variants will fail for some chips. There are at least
> the following RDID responses:
> 1 byte manuf, 2 bytes model

Re: help with win-xp and legacybios/coreboot

Hi,

On Sun, Jun 29, 2008 at 04:16:05PM +0200, Carl-Daniel Hailfinger wrote:
> On 28.06.2008 19:45, Kevin O'Connor wrote:
> > Unfortunately, when I try to install or boot
> > win-xp with coreboot-v2 and legacybios on my via epia-m the system
> > hangs.
> >   
> 
> Hm. Off the top of my head, I see a few things you could try in order of
> increasing difficulty:
[...]

Wow - great list.  I did try a number of these things, but you have
some useful additions.

I'll continue to play with it.  However, if someone can try on a known
working board that would also help a lot.

Thanks for the help.
-Kevin

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Re: [PATCH 2/3] Add support for 4 bytes rdid

On 01.07.2008 01:49, Stefan Reinauer wrote:
> Carl-Daniel Hailfinger wrote:
>> On 30.06.2008 23:19, Peter Stuge wrote:
>>  
>>> On Mon, Jun 30, 2008 at 10:47:23PM +0200, Rudolf Marek wrote:
>>>      
>>>> @@ -97,7 +97,8 @@
>>>>          if (!oddparity(readarr[1]))
>>>>              printf_debug("RDID byte 1 parity violation.\n");
>>>>          manuf_id = (readarr[0] << 8) | readarr[1];
>>>> -        model_id = readarr[2];
>>>> +        model_id = (bytes == 3) ? readarr[2] :
>>>> +                        ((readarr[2] << 8) | readarr[3]);
>>>>           
>>> Please improve this a bit, I suggest:
>>>
>>> model_id=readarr[2];
>>> if(bytes>3) { /* or 4==bytes */
>>>   model_id<<=8;
>>>   model_id|=readarr[3];
>>> }
>>>
>>> With a fix (not neccessarily mine) for the above, this is:
>>>       
>>
>> Technically, both variants will fail for some chips. There are at least
>> the following RDID responses:
>> 1 byte manuf, 2 bytes model
>> 2 bytes manuf, 1 byte model
>> 2 bytes manuf, 2 bytes model

Re: r3401 - trunk/util/flashrom

On 01.07.2008 01:45, svn <at> coreboot.org wrote:
> Author: stepan
> Date: 2008-07-01 01:45:22 +0200 (Tue, 01 Jul 2008)
> New Revision: 3401
>
> Modified:
>    trunk/util/flashrom/chipset_enable.c
>    trunk/util/flashrom/flash.h
>    trunk/util/flashrom/ichspi.c
>    trunk/util/flashrom/it87spi.c
>    trunk/util/flashrom/spi.c
> Log:
> First attempt to clean up SPI probing and create a common
> construct: the flash bus.
>
> At some point the flash bus will be part of struct flashchip.
>
> Pardon me for pushing this in, but I think it is important to beware of further
> decay and it will improve things for other developers in the short run.
>
> Carl-Daniel, I will consider your suggestions in another patch. I want to keep
> things from getting too much for now. The patch includes Rudolf's VIA SPI
> changes though.
>   

OK with me. I assume you have tested the code.

> Signed-off-by: Stefan Reinauer <stepan <at> coresystems.de>
> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 <at> gmx.net>
>   

Re: r3401 - trunk/util/flashrom

On Tue, Jul 01, 2008 at 01:45:23AM +0200, svn <at> coreboot.org wrote:
> New Revision: 3401
..
> Pardon me for pushing this in

Mostly good cleanups (thanks for removing temp16 et al) but
it87xx_probe_spi_flash() got a lot worse IMO. Patch attached.

The name is also rather unfortunate, since it is used for board
enable rather than chip probing, but that is for later.

//Peter

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Re: legacybios names

Hi,

On Fri, May 30, 2008 at 05:48:20AM -0600, Myles Watson wrote:
> Kevin,
> 
> Here are some other suggestions:
> 
> gccBIOS
> 
> C-BIOS
> 
> pcBIOS
> 
> BochsBIOS

Thanks for the suggestions Myles.  Quynh also suggested See-BIOS some
time back.

I think I'm going to use "SeaBIOS".

-Kevin

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Re: Intel rumers spreading??

Hello,

On Tue, Jul 01, 2008 at 08:00:15AM +0800, Star Liu wrote:
> Is the rumor me?

No. But because there have been many inquiries about support for
recent Intel hardware in a short time, maybe your message was
interpreted as indication of a starting trend.

> If it's me, I'd like the tell what the inside is.
> I'm a newbie in free software development, and I'd like to start my
> free software development from the coreboot project.

Great! You are very welcome. I hope you will like it as much as we
do. :) It is a lot of fun!

> In China, so many people(more than a half) use intel cpus, and most
> of them are above P4, including me.

I don't know the statistics for Sweden where I am, but Intel systems
are popular here too.

> So when i found coreboot only support intel cpu up to PIII, I'm
> very curious, and willing to make it support intel cpus above P4.
> That's why I asked so many questions about intel cpu.

I believe curiosity and desire to improve is the true spirit of open
source! But as Jordan wrote, it is far from trivial to add support
for new CPUs and chipsets, even when the documentation is available.