svn | 1 Feb 01:10

r2540 - in trunk/LinuxBIOSv2/src/southbridge/nvidia: . mcp55

Author: stepan
Date: 2007-02-01 01:10:05 +0100 (Thu, 01 Feb 2007)
New Revision: 2540

Added:
   trunk/LinuxBIOSv2/src/southbridge/nvidia/mcp55/
   trunk/LinuxBIOSv2/src/southbridge/nvidia/mcp55/Config.lb
   trunk/LinuxBIOSv2/src/southbridge/nvidia/mcp55/chip.h
   trunk/LinuxBIOSv2/src/southbridge/nvidia/mcp55/id.inc
   trunk/LinuxBIOSv2/src/southbridge/nvidia/mcp55/id.lds
   trunk/LinuxBIOSv2/src/southbridge/nvidia/mcp55/mcp55.c
   trunk/LinuxBIOSv2/src/southbridge/nvidia/mcp55/mcp55.h
   trunk/LinuxBIOSv2/src/southbridge/nvidia/mcp55/mcp55_aza.c
   trunk/LinuxBIOSv2/src/southbridge/nvidia/mcp55/mcp55_early_ctrl.c
   trunk/LinuxBIOSv2/src/southbridge/nvidia/mcp55/mcp55_early_setup_car.c
   trunk/LinuxBIOSv2/src/southbridge/nvidia/mcp55/mcp55_early_setup_ss.h
   trunk/LinuxBIOSv2/src/southbridge/nvidia/mcp55/mcp55_early_smbus.c
   trunk/LinuxBIOSv2/src/southbridge/nvidia/mcp55/mcp55_enable_rom.c
   trunk/LinuxBIOSv2/src/southbridge/nvidia/mcp55/mcp55_enable_usbdebug_direct.c
   trunk/LinuxBIOSv2/src/southbridge/nvidia/mcp55/mcp55_ht.c
   trunk/LinuxBIOSv2/src/southbridge/nvidia/mcp55/mcp55_ide.c
   trunk/LinuxBIOSv2/src/southbridge/nvidia/mcp55/mcp55_lpc.c
   trunk/LinuxBIOSv2/src/southbridge/nvidia/mcp55/mcp55_nic.c
   trunk/LinuxBIOSv2/src/southbridge/nvidia/mcp55/mcp55_pci.c
   trunk/LinuxBIOSv2/src/southbridge/nvidia/mcp55/mcp55_pcie.c
   trunk/LinuxBIOSv2/src/southbridge/nvidia/mcp55/mcp55_reset.c
   trunk/LinuxBIOSv2/src/southbridge/nvidia/mcp55/mcp55_sata.c
   trunk/LinuxBIOSv2/src/southbridge/nvidia/mcp55/mcp55_smbus.c
   trunk/LinuxBIOSv2/src/southbridge/nvidia/mcp55/mcp55_smbus.h
   trunk/LinuxBIOSv2/src/southbridge/nvidia/mcp55/mcp55_usb.c
(Continue reading)

bxshi | 1 Feb 01:10
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Re: [PATCH] cleaned up MCP55 chipset code


Ping? Can anybody point out problems with the patch or ACK it? I believe
it's ready to be committed now.
 
Except mcp55_send_byte may need a little change as yinghai pointed, the other is ok to me.
with yinghai's code ,MSI ms9282 works fine.
status is :
usb --- ok
sata--- ok
nic -----ok
broadcom nic----on pcie bridge ok
 
bxshi
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Stefan Reinauer | 1 Feb 01:11
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Re: [PATCH] cleaned up MCP55 chipset code

yhlu wrote:
> Good, Please apply at first. we may produce patch regarding with smbus
> for send/receive byte
> ( using CMD byte instead of DAT0)
> 

It's in. please go ahead.

Stefan

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Kaufman, Adam | 1 Feb 01:16

Re: LinuxBIOS Solaris Dev

Well, I had to do a bit of messing around, but I got both pciutils and
flashrom to compile on my Solaris 10 box. My biggest concern was the
/dev/mem wouldn't allow the same access we get on linux...  here's what
I get:

bash-3.00# ./flashrom
Calibrating delay loop... ok
Can not mmap /dev/mem at 00000000 errno(6):No such device or address

Ideas?

Thanks,
-ak

-----Original Message-----
From: ron minnich [mailto:rminnich <at> gmail.com] 
Sent: Wednesday, January 31, 2007 4:44 PM
To: Kaufman, Adam
Cc: linuxbios <at> linuxbios.org
Subject: Re: [LinuxBIOS] LinuxBIOS Solaris Dev

I don't see a solaris port as a huge problem. flashrom just uses mmap
and solaris has that.

If you want to try a make and see what happens, I'd like to hear how it
goes.

ron

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Roman Kononov | 1 Feb 01:30
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Re: [PATCH] VGA is used before it is initialized

On 01/31/2007 05:53 PM, Peter Stuge wrote:
> +#if CONFIG_PCI_ROM_RUN == 1 || CONFIG_CONSOLE_VGA=1  
> One or two = ? Which is it?

None.

Index: src/devices/pci_rom.c
===================================================================
--- src/devices/pci_rom.c	(revision 2539)
+++ src/devices/pci_rom.c	(working copy)
@@ -62,12 +62,9 @@ struct rom_header * pci_rom_probe(struct

 static void *pci_ram_image_start = (void *)PCI_RAM_IMAGE_START;

-#if CONFIG_CONSOLE_VGA == 1
-extern int vga_inited;		// defined in vga_console.c 
-#if CONFIG_CONSOLE_VGA_MULTI == 0
+#if CONFIG_CONSOLE_VGA == 1 && CONFIG_CONSOLE_VGA_MULTI == 0
 extern device_t vga_pri;	// the primary vga device, defined in device.c
 #endif
-#endif

 struct rom_header *pci_rom_load(struct device *dev, struct rom_header *rom_header)
 {
@@ -96,7 +93,6 @@ struct rom_header *pci_rom_load(struct d
 		printk_debug("copying VGA ROM Image from 0x%x to 0x%x, 0x%x bytes\n",
 			    rom_header, PCI_VGA_RAM_IMAGE_START, rom_size);
 		memcpy(PCI_VGA_RAM_IMAGE_START, rom_header, rom_size);
-		vga_inited = 1;
 		return (struct rom_header *) (PCI_VGA_RAM_IMAGE_START);
 #endif
 	} else {
Index: src/devices/pci_device.c
===================================================================
--- src/devices/pci_device.c	(revision 2539)
+++ src/devices/pci_device.c	(working copy)
@@ -644,6 +644,22 @@ void pci_dev_init(struct device *dev)
 		return;

 	run_bios(dev, ram);
+#if CONFIG_CONSOLE_VGA==1
+	{
+		extern int vga_inited;		// defined in vga_console.c 
+		vga_inited|=dev->class==PCI_CLASS_DISPLAY_VGA;
+	}
+#endif
+#elif CONFIG_CONSOLE_VGA==1
+	extern int vga_inited;		// defined in vga_console.c 
+	struct rom_header* header;
+	if (dev->class!=PCI_CLASS_DISPLAY_VGA) return;
+	header=pci_rom_probe(dev);
+	if (header==NULL) return;
+	header=pci_rom_load(dev,header);
+	if (header==NULL) return;
+	run_bios(dev,header);
+	vga_inited=1;
 #endif
 }

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Peter Stuge | 1 Feb 01:33

Re: LinuxBIOS Solaris Dev

On Wed, Jan 31, 2007 at 07:16:32PM -0500, Kaufman,  Adam wrote:
> Well, I had to do a bit of messing around, but I got both pciutils and
> flashrom to compile on my Solaris 10 box. My biggest concern was the
> /dev/mem wouldn't allow the same access we get on linux...  here's what
> I get:
> 
> bash-3.00# ./flashrom
> Calibrating delay loop... ok
> Can not mmap /dev/mem at 00000000 errno(6):No such device or address
> 
> Ideas?

Dunno about userspace IO in Solaris.

Here are some semi-useful links about device drivers at least:

Writing Device Drivers
http://docs.sun.com/app/docs/doc/816-4854?q=816-4854
(Grab the PDF, I find docs.sun.com to be terribly slow.)

Writing 64-bit Clean Device Drivers for Solaris 10 for x64 Platforms:
A 32-bit and 64-bit Compatible Guide
http://partneradvantage.sun.com/protected/solaris10/adoptionkit/x86/Porting_wp.pdf

//Peter

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svn | 1 Feb 01:40

r2541 - trunk/LinuxBIOSv2/src/include/cpu/amd

Author: uwe
Date: 2007-02-01 01:40:51 +0100 (Thu, 01 Feb 2007)
New Revision: 2541

Modified:
   trunk/LinuxBIOSv2/src/include/cpu/amd/amdk8_sysconf.h
Log:
This fixes a small typo.

Signed-off-by: Roman Kononov <kononov195-lbl <at> yahoo.com>
Acked-by: Uwe Hermann <uwe <at> hermann-uwe.de>

Modified: trunk/LinuxBIOSv2/src/include/cpu/amd/amdk8_sysconf.h
===================================================================
--- trunk/LinuxBIOSv2/src/include/cpu/amd/amdk8_sysconf.h	2007-02-01 00:10:05 UTC (rev 2540)
+++ trunk/LinuxBIOSv2/src/include/cpu/amd/amdk8_sysconf.h	2007-02-01 00:40:51 UTC (rev 2541)
@@ -1,7 +1,6 @@
 #ifndef AMDK8_SYSCONF_H
+#define AMDK8_SYSCONF_H

-#define AMDK8_SYSINFO_H
-
 #define HC_POSSIBLE_NUM 8

 struct amdk8_sysconf_t {

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svn | 1 Feb 01:44

r2542 - trunk/LinuxBIOSv2/src/arch/i386/boot

Author: stepan
Date: 2007-02-01 01:44:27 +0100 (Thu, 01 Feb 2007)
New Revision: 2542

Modified:
   trunk/LinuxBIOSv2/src/arch/i386/boot/linuxbios_table.c
Log:
great check-in message:

Linuxbios boots an Opteron motherboard with 1GB memory.

Linuxbios directly loads a recent linux kernel.
The memory layout is like this:

BIOS-provided physical RAM map:
   BIOS-e820: 0000000000000000 - 0000000000000e18 (reserved)
   BIOS-e820: 0000000000000e18 - 00000000000a0000 (usable)
   BIOS-e820: 00000000000c0000 - 00000000000f0000 (usable)
   BIOS-e820: 00000000000f0000 - 00000000000f0400 (reserved)
   BIOS-e820: 00000000000f0400 - 0000000040000000 (usable)

The f0000-f0400 region contains IRQ and ACPI tables.

At some point the kernel builds a resource table containing
all physical address ranges and type of hardware the addresses
are mapped to. The table is accessible via /proc/iomem:

# cat /proc/iomem
00000000-00000e17 : reserved
00000e18-0009ffff : System RAM
000a0000-000bffff : Video RAM area
000c0000-000cbfff : Video ROM
000f0000-000fffff : System ROM
e0000000-efffffff : PCI Bus #03
    e0000000-efffffff : 0000:03:00.0
f0000000-f3ffffff : GART
f4000000-f60fffff : PCI Bus #03
    f4000000-f4ffffff : 0000:03:00.0
    f5000000-f5ffffff : 0000:03:00.0
    f6000000-f601ffff : 0000:03:00.0
f6100000-f6100fff : 0000:00:01.0
f6101000-f6101fff : 0000:00:02.0
    f6101000-f6101fff : ohci_hcd
f6102000-f6102fff : 0000:00:04.0
f6103000-f6103fff : 0000:00:07.0
    f6103000-f6103fff : sata_nv
f6104000-f6104fff : 0000:00:08.0
    f6104000-f6104fff : sata_nv
f6105000-f6105fff : 0000:00:0a.0
f6106000-f61060ff : 0000:00:02.1
f6200000-f620ffff : 0000:40:01.0

As you can see, the 00000000000f0400-0000000040000000
region is not listed.

It is not listed because the kernel unconditionally adds
"000f0000-000fffff : System ROM" first (look for
"request_resource(&iomem_resource, &system_rom_resource)"),
and then the attempt to add f0400-40000000 range fails
because of overlapping.

The kernel does not care that the range is not listed there.
Kexec does. It uses the /proc/iomem file to instruct the
kexec system call how to place the segments of a new kernel
in the physical memory. Kexec fails to start a new kernel
because it cannot locate enough physical memory.

This must be fixed either in linux or linuxbios.

Assuming that linuxbios is to be fixed, I cooked a patch
which provides this memory layout:

BIOS-provided physical RAM map:
   BIOS-e820: 0000000000000000 - 0000000000000e18 (reserved)
   BIOS-e820: 0000000000000e18 - 00000000000a0000 (usable)
   BIOS-e820: 00000000000c0000 - 00000000000f0000 (usable)
   BIOS-e820: 00000000000f0000 - 0000000000100000 (reserved)
   BIOS-e820: 0000000000100000 - 0000000040000000 (usable)

The /proc/iomem contains:

# cat /proc/iomem 
00000000-00000e17 : reserved
00000e18-0009ffff : System RAM
000a0000-000bffff : Video RAM area
000c0000-000cbfff : Video ROM
000f0000-000fffff : System ROM
00100000-3fffffff : System RAM
    00100000-00203c61 : Kernel code
    00203c62-00248c3f : Kernel data
e0000000-efffffff : PCI Bus #03
    e0000000-efffffff : 0000:03:00.0
f0000000-f3ffffff : GART
f4000000-f60fffff : PCI Bus #03
    f4000000-f4ffffff : 0000:03:00.0
    f5000000-f5ffffff : 0000:03:00.0
    f6000000-f601ffff : 0000:03:00.0
f6100000-f6100fff : 0000:00:01.0
f6101000-f6101fff : 0000:00:02.0
    f6101000-f6101fff : ohci_hcd
f6102000-f6102fff : 0000:00:04.0
f6103000-f6103fff : 0000:00:07.0
    f6103000-f6103fff : sata_nv
f6104000-f6104fff : 0000:00:08.0
    f6104000-f6104fff : sata_nv
f6105000-f6105fff : 0000:00:0a.0
f6106000-f61060ff : 0000:00:02.1
f6200000-f620ffff : 0000:40:01.0

Kexec is happier with the patch.

Regards,

Signed-off-by: Roman Kononov <kononov195-lbl <at> yahoo.com> 
Acked-by: Stefan Reinauer <stepan <at> coresystems.de>

Modified: trunk/LinuxBIOSv2/src/arch/i386/boot/linuxbios_table.c
===================================================================
--- trunk/LinuxBIOSv2/src/arch/i386/boot/linuxbios_table.c	2007-02-01 00:40:51 UTC (rev 2541)
+++ trunk/LinuxBIOSv2/src/arch/i386/boot/linuxbios_table.c	2007-02-01 00:44:27 UTC (rev 2542)
@@ -382,8 +382,9 @@
 		low_table_start, low_table_end - low_table_start);

 	/* Record the pirq table, acpi tables, and maybe the mptable */
+	table_size=rom_table_end-rom_table_start;
 	lb_add_memory_range(mem, LB_MEM_TABLE, 
-		rom_table_start, rom_table_end - rom_table_start);
+		rom_table_start, table_size<0x10000?0x10000:table_size);

 	/* Note:
 	 * I assume that there is always memory at immediately after

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Ed Swierk | 1 Feb 01:53
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Re: [PATCH] cleaned up MCP55 chipset code

On 1/31/07, Stefan Reinauer <stefan.reinauer <at> coresystems.de> wrote:
> It's in. please go ahead.

Cool. Can you apply this patch next? It adds the MCP55 PCI IDs
(without which the southbridge code won't compile), and breaks an
unnecessary dependency on the usbdebug code.

Acked-by: Ed Swierk <eswierk <at> arastra.com>

--Ed
Index: LinuxBIOSv2-2539/src/include/device/pci_ids.h
===================================================================
--- LinuxBIOSv2-2539.orig/src/include/device/pci_ids.h
+++ LinuxBIOSv2-2539/src/include/device/pci_ids.h
@@ -945,6 +945,33 @@
 #define PCI_DEVICE_ID_NVIDIA_CK8S_PCI          0x00ed
 #define PCI_DEVICE_ID_NVIDIA_CK8S_PCI_AGP      0x00e2

+#define PCI_DEVICE_ID_NVIDIA_MCP55_LPC          0x0360
+#define PCI_DEVICE_ID_NVIDIA_MCP55_SLAVE        0x0361
+#define PCI_DEVICE_ID_NVIDIA_MCP55_LPC_2        0x0362
+#define PCI_DEVICE_ID_NVIDIA_MCP55_LPC_3        0x0363
+#define PCI_DEVICE_ID_NVIDIA_MCP55_LPC_4        0x0364
+#define PCI_DEVICE_ID_NVIDIA_MCP55_LPC_5        0x0365
+#define PCI_DEVICE_ID_NVIDIA_MCP55_LPC_6        0x0366
+#define PCI_DEVICE_ID_NVIDIA_MCP55_PRO          0x0367
+#define PCI_DEVICE_ID_NVIDIA_MCP55_SM2          0x0368
+#define PCI_DEVICE_ID_NVIDIA_MCP55_IDE          0x036E
+#define PCI_DEVICE_ID_NVIDIA_MCP55_SATA0        0x037E
+#define PCI_DEVICE_ID_NVIDIA_MCP55_SATA1        0x037F
+#define PCI_DEVICE_ID_NVIDIA_MCP55_NIC          0x0372
+#define PCI_DEVICE_ID_NVIDIA_MCP55_NIC_BRIDGE   0x0373
+#define PCI_DEVICE_ID_NVIDIA_MCP55_AZA          0x0371
+#define PCI_DEVICE_ID_NVIDIA_MCP55_USB          0x036C
+#define PCI_DEVICE_ID_NVIDIA_MCP55_USB2         0x036D
+#define PCI_DEVICE_ID_NVIDIA_MCP55_PCI          0x0370
+#define PCI_DEVICE_ID_NVIDIA_MCP55_PCIE_B_C     0x0374
+#define PCI_DEVICE_ID_NVIDIA_MCP55_PCIE_E       0x0375
+#define PCI_DEVICE_ID_NVIDIA_MCP55_PCIE_A       0x0376
+#define PCI_DEVICE_ID_NVIDIA_MCP55_PCIE_F       0x0377
+#define PCI_DEVICE_ID_NVIDIA_MCP55_PCIE_D       0x0378
+#define PCI_DEVICE_ID_NVIDIA_MCP55_HT           0x0369
+#define PCI_DEVICE_ID_NVIDIA_MCP55_TRIM         0x036A
+#define PCI_DEVICE_ID_NVIDIA_MCP55_PMU          0x036B
+
 #define PCI_VENDOR_ID_NVIDIA			0x10de
 #define PCI_DEVICE_ID_NVIDIA_TNT		0x0020
 #define PCI_DEVICE_ID_NVIDIA_TNT2		0x0028
Index: LinuxBIOSv2-2539/src/southbridge/nvidia/mcp55/mcp55_usb2.c
===================================================================
--- LinuxBIOSv2-2539.orig/src/southbridge/nvidia/mcp55/mcp55_usb2.c
+++ LinuxBIOSv2-2539/src/southbridge/nvidia/mcp55/mcp55_usb2.c
@@ -27,7 +27,9 @@
 #include <device/pci_ids.h>
 #include <device/pci_ops.h>
 #include "mcp55.h"
+#if CONFIG_USBDEBUG_DIRECT
 #include <usbdebug_direct.h>
+#endif

 extern struct ehci_debug_info dbg_info;

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Uwe Hermann | 1 Feb 02:26
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Re: LinuxBIOS Solaris Dev

On Wed, Jan 31, 2007 at 11:42:43PM +0100, Stefan Reinauer wrote:
> Uwe Hermann wrote:
> > On Wed, Jan 31, 2007 at 02:44:05PM -0700, ron minnich wrote:
> >> I don't see a solaris port as a huge problem. flashrom just uses mmap
> >> and solaris has that.
> >>
> >> If you want to try a make and see what happens, I'd like to hear how it goes.
> > 
> > Just a short note: if you build flashrom without having the whole
> > LinuxBIOS source tree around, you'll need to copy the file
> > src/include/boot/linuxbios_tables.h into the flashrom source directory
> > and apply the attached patch to make it use the file.
> > 
> > 
> > Btw, should we apply this in svn anyways? flashrom cannot be used
> > indepently otherwise...
> 
> Yes. Should we have a "make update_includes" target or something
> similar, or mention this in the README at least?

Hm, why not just put a copy of the file in util/flashrom? Will there be
(backwards-)compatibility problems when the file changes in LinuxBIOS?
I don't think so, but maybe I'm wrong.

Patch attached.

Uwe.
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