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Richard Smith | 1 Oct 2004 18:47

PCI guru consultant needed

Bitworks needs help.

We currently Intel Celeron 440bx design that has ATI M1 video chips on 
board.  Off and on for the past 6 months or so I've been working to make 
them work under Linuxbios, ADLO, or testbios, etc.

I've have finally managed to show that the problem is hardware related 
to our design.  As I can make a PCI eval card from ATI work on a Asus 
P2B motherboard and linuxbios using X to softboot the card.  The same 
setup on our board fails to work.

Somehow the SDRAM inside the M1 chip is failing to initialize properly. 
  The video output has all the right VSYNC and HSYNC for the 800x600 
mode I setup but a black screen and a large square block for the cursor. 
  If I exit X and try to write/read a value into video ram I get garbage 
back.  This works on the Ausu P2B.

Things with our customer have gone critical. I've got to have something 
working by the end of October.

So I'm in search of people who really understand PCI and video stuff and 
are available for consulting either on site here or I can come to thier 
site.

Also any one have on know of place I can go to get a PCI complience test 
done?  Or hardware I can rent?  We reciently borrowed a HP 16500B logic 
analyzer with a Future+Systems passive PCI hookup but it dosn't do 
complience testing.  We need an additional card for that.

--

--
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Bari Ari | 1 Oct 2004 19:53

Re: PCI guru consultant needed

Richard Smith wrote:
> Somehow the SDRAM inside the M1 chip is failing to initialize properly. 
>  The video output has all the right VSYNC and HSYNC for the 800x600 mode 
> I setup but a black screen and a large square block for the cursor.  If 
> I exit X and try to write/read a value into video ram I get garbage 
> back.  This works on the Ausu P2B.

Are you testing this on more than one proto?

Can you repeatedly read and write successfully to registers in the M1? 
Is sounds like you are having some success, since you have some display 
output.

Is there a PCI slot on the board or at least PCI test headers for all 
signals?

How do you know that the SDRAM is good inside the M1? I don't have the 
M1 data sheet, but I bet the SDRAM and the GPU are separate die mounted 
in the same package.

-Bari
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Stefan Reinauer | 1 Oct 2004 19:59
Gravatar

Re: PCI guru consultant needed

* Richard Smith <rsmith <at> bitworks.com> [041001 18:47]:
> Somehow the SDRAM inside the M1 chip is failing to initialize properly. 
>  The video output has all the right VSYNC and HSYNC for the 800x600 
> mode I setup but a black screen and a large square block for the cursor. 
>  If I exit X and try to write/read a value into video ram I get garbage 
> back.  This works on the Ausu P2B.

Wild guess: 
 - Timing issues?
 - missing bridge initialization?

Stefan

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YhLu | 1 Oct 2004 20:18

RE: changes today.

Please respond. Otherwise I will commit it today.

-----Original Message-----
From: YhLu 
Sent: Thursday, September 30, 2004 12:01 PM
To: Ronald G. Minnich; ebiederman <at> lnxi.com; Stefan Reinauer; Li-Ta Lo
Cc: linuxbios <at> clustermatic.org
Subject: RE: changes today. 

Ron/Eric/Stephan/Ollie,

Please check the patch.

1. some tyan volatile messing because of ROMCC changes.
2. S2882 interrupt line assignment in mptable.c
3. exclude range for flash_rom.
4. better ht_setup_chainx() in incoherent_ht.c ---> change share bus 0 to
different bus for different incoherent HT link.
5. fix one bug about io and mem allocation for multi ht links. --- in
northbridge.c
	Mark it if used before assign final value.
6. enable amd/quartet to init multi incoherent HT link in auto.c --- not
test, no MB on hand.
7. enable S2885 to init multi incoherent HT link in auto.c

Regards

YH

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YhLu | 1 Oct 2004 20:36

RE: PCI guru consultant needed

On board and add-on card, there is some difference.

I just noticed
Ati ragexl init in LinuxBIOS only support Onboard device. And does not
support addon card.

But the ragexl init in Kernel can support both.

Regards

YH

-----Original Message-----
From: Stefan Reinauer [mailto:stepan <at> openbios.org] 
Sent: Friday, October 01, 2004 10:59 AM
To: Richard Smith
Cc: linuxbios <at> clustermatic.org
Subject: Re: PCI guru consultant needed

* Richard Smith <rsmith <at> bitworks.com> [041001 18:47]:
> Somehow the SDRAM inside the M1 chip is failing to initialize properly. 
>  The video output has all the right VSYNC and HSYNC for the 800x600 
> mode I setup but a black screen and a large square block for the cursor. 
>  If I exit X and try to write/read a value into video ram I get garbage 
> back.  This works on the Ausu P2B.

Wild guess: 
 - Timing issues?
 - missing bridge initialization?
(Continue reading)

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Richard Smith | 1 Oct 2004 21:42

Re: PCI guru consultant needed

Bari Ari wrote:

> 
> Are you testing this on more than one proto?
> 

No. Unfortunaly I don't have but one proto.

> Can you repeatedly read and write successfully to registers in the M1? 
> Is sounds like you are having some success, since you have some display 
> output.

Yes.  From a software point.  Things appear to be ok.  I've also enabled 
all the IO output from testbios.  I can take testbios and run it on a 
different motherboard and with the PCI eval card I have and get a signon 
screen.  If I then duplicate this test on our board I get almost an 
identical log up until the point it starts testing 0xA0000 which fails 
and the logs then take different paths.

I've looked at the differences betwen the logs and they seem proper.

I've can also boot general software's bios on this board and the ATI 
card eval card does not work.  BUT I have other PCI video cards that DO 
work. Except they come up in monochrome mode.

I have an assiliant, nvidia, S3, matrox and a no name, PCI video cards 
that boot using general software's bios. Although they come up in 
monochrome mode.

But I also have 2 ATI (M1 and Rage pro), and a different S3 card that do
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Stefan Reinauer | 2 Oct 2004 00:52
Gravatar

Re: changes today.

Hi Yinghai,

> 2. S2882 interrupt line assignment in mptable.c
> 3. exclude range for flash_rom.
> 4. better ht_setup_chainx() in incoherent_ht.c ---> change share bus 0 to
> different bus for different incoherent HT link.
> 5. fix one bug about io and mem allocation for multi ht links. --- in
> northbridge.c
> 	Mark it if used before assign final value.
> 6. enable amd/quartet to init multi incoherent HT link in auto.c --- not
> test, no MB on hand.
> 7. enable S2885 to init multi incoherent HT link in auto.c

> diff -uNr ./freebios2/src/mainboard/amd/quartet/auto.c ../freebios2/src/mainboard/amd/quartet/auto.c
> --- ./freebios2/src/mainboard/amd/quartet/auto.c	2004-04-28 01:08:06.000000000 -0700
> +++ ../freebios2/src/mainboard/amd/quartet/auto.c	2004-09-29 09:30:57.000000000 -0700
>  <at>  <at>  -100,11 +100,12  <at>  <at> 
>  	 */
>  
>  	uint32_t ret = 0x00010101;	/* default row entry */
> -
> +/*
>  	static const unsigned int rows_2p[2][2] = {
>  		{0x00030101, 0x00010202},
>  		{0x00010202, 0x00030101}
>  	};
> +*/
>  
>  	static const unsigned int rows_4p[4][4] = {
>  		{0x00070101, 0x00010202, 0x00030404, 0x00010204},
(Continue reading)

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Adam Sulmicki | 2 Oct 2004 01:25
Picon

Re: PCI guru consultant needed


have you tried    pci-sig <at> znyx.com ? It has people who works on designing
PCI buses as their day to day job.

I think you send email to pci-sig-request <at> znyx.com with subject
'subscribe'.

On Fri, 1 Oct 2004, Richard Smith wrote:

> Bitworks needs help.
>
> We currently Intel Celeron 440bx design that has ATI M1 video chips on
> board.  Off and on for the past 6 months or so I've been working to make
> them work under Linuxbios, ADLO, or testbios, etc.
>
> I've have finally managed to show that the problem is hardware related
> to our design.  As I can make a PCI eval card from ATI work on a Asus
> P2B motherboard and linuxbios using X to softboot the card.  The same
> setup on our board fails to work.
>
> Somehow the SDRAM inside the M1 chip is failing to initialize properly.
>   The video output has all the right VSYNC and HSYNC for the 800x600
> mode I setup but a black screen and a large square block for the cursor.
>   If I exit X and try to write/read a value into video ram I get garbage
> back.  This works on the Ausu P2B.
>
> Things with our customer have gone critical. I've got to have something
> working by the end of October.
>
> So I'm in search of people who really understand PCI and video stuff and
(Continue reading)

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Eric W. Biederman | 2 Oct 2004 01:45

Re: [BULK] Re: changes today.


Right now I feel like taffy, stretched thin and pulled in all directions.
My apologies for not responding sooner.

Stefan Reinauer <stepan <at> openbios.org> writes:

> Hi Yinghai,
> 
> > 2. S2882 interrupt line assignment in mptable.c
> > 3. exclude range for flash_rom.
> > 4. better ht_setup_chainx() in incoherent_ht.c ---> change share bus 0 to
> > different bus for different incoherent HT link.
> > 5. fix one bug about io and mem allocation for multi ht links. --- in
> > northbridge.c
> > 	Mark it if used before assign final value.
> > 6. enable amd/quartet to init multi incoherent HT link in auto.c --- not
> > test, no MB on hand.
> > 7. enable S2885 to init multi incoherent HT link in auto.c
> 
> > diff -uNr ./freebios2/src/mainboard/amd/quartet/auto.c
> ../freebios2/src/mainboard/amd/quartet/auto.c
> 
> > --- ./freebios2/src/mainboard/amd/quartet/auto.c 2004-04-28 01:08:06.000000000
> -0700
> 
> > +++ ../freebios2/src/mainboard/amd/quartet/auto.c 2004-09-29
> 09:30:57.000000000 -0700
> 
> >  <at>  <at>  -100,11 +100,12  <at>  <at> 
> >  	 */
(Continue reading)

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Ronald G. Minnich | 1 Oct 2004 23:49

RE: changes today.


On Fri, 1 Oct 2004, YhLu wrote:

> Please respond. Otherwise I will commit it today.

I will try to look at it but can you hold off until monday. I've been in 
too many meetings. 

ron
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