Eric W. Biederman | 1 Jun 01:37 2002

Re: LinuxBIOS help me! (fwd)

Clark Rawlins <clark <at> bit63.org> writes:

> I am relitively new to all of this but it looks to me like you
> are compiling the DoC driver into the kernel and it is getting
> loaded before calling flash_on.  At least on my MB flash_on needs
> to get called prior to attempting to init the driver.
> 
> Is it posible to recompile the kernel with the DoC driver as a 
> module and calling flash_on or equivalant before loading the driver?

In which case someone needs to fix the doc code so it works with map
drivers.  Which can do the flash_on equivalent before running the driver.

Eric

Oelschlaegel, Jan | 3 Jun 11:01 2002
Picon

zfx86 and linuxbios

Hi there,

we´re running a system with a ZFx86 (former MachZ) single chip from
ZFLinuxDevices. We wanted
to boot up the system into linux from flash. Because of problems with the
original BIOS (Phoenix)
we were driven to find alternatives. We tried out linuxbios, but we could
not bring it up. 
The chip is a 486+ CPU with a PC87550 based northbridge and a CS5530 based
southbridge. Do 
you see any possibility to get this setup run? I think, it´s a lot of work
to write an own 87550 driver
for linuxbios, so it would be great, if there were at least code fragments
available.
So if You have any suggestions, I would appreciate them.

With best regards,
Jan Oelschlägel.

Ronald G Minnich | 3 Jun 17:23 2002

Re: zfx86 and linuxbios

Well, can  you point us to northbridge docs. We support the southbridge.

I would love to see this work. We can help you.

ron

Bari Ari | 3 Jun 19:39 2002

Re: zfx86 and linuxbios

Ronald G Minnich wrote:

>Well, can  you point us to northbridge docs. We support the southbridge.
>
>  
>
The ZFx86 comes standard with the BIOS embedded into its on chip boot ROM.

The specs are all here:  http://www.zflinux.com/zfx86.html

Is uses a port of a Phoenix Rev 4.0 Standard PC BIOS.

Bari

Ronald G Minnich | 4 Jun 22:17 2002

more notes on the advantech PCM-5823 and Plan 9

we now have 9load (plan 9 booter) in flash. We can configure a Plan 9 cpu
server kernel to be 375K, so will look at putting the kernel in flash if
the -5823 supports 512K flash parts. If this works, we have a CPU server
that comes up in a few seconds, with full authentication via the new 4e
mechanisms.

ron

Andrew Ip | 5 Jun 20:16 2002

[PATCH] PCCHIPS m758lmr+ support

Hi,

	Basically this patch just setups pcchips m758lmr+ directory, it uses the
same code as winfast 6300.  I have verified the patch and it should work with
the lastest cvs.  For those who don't familar with m758lmr+, it supports Intel's
latest Tualatin Celeron/PIII processors, eg.Celeron/PIII 1.0GA, 1.1GA, 1.2G,...;
on the other hand, Winfast 6300 doesn't supports all these chips.  Please let me
know if there is any problem.  Thanks.

-Andrew

--

-- 
Andrew Ip
Email:  aip <at> cwlinux.com
Tel:    (852) 2542 2046
Fax:    (852) 2542 2046
Mobile: (852) 9201 9866

Cwlinux Limited
18B Tower 1 Tern Centre,
237 Queen's Road Central,
Hong Kong.

For my public pgp key, please obtain it from http://www.keyserver.net/en.
Eric W. Biederman | 6 Jun 00:00 2002

["Chris Haidinyak" <chrish <at> alpha.techspecs.com>] LinuxBIOS question(s) . ..

From: Chris Haidinyak <chrish <at> alpha.techspecs.com>
Subject: LinuxBIOS question(s) . ..
Date: 2002-06-05 04:58:05 GMT
Hi,

   I am getting my feet wet in LinuxBIOS. I have purchased a K7SEM
motherboard and a Needham's EMP-10 flash programmer so that I can
concentrate on learning the rules. My question is whether you know if I can
put higher capacity flash devices into the ROM socket such as 512K flash or
1M flash as opposed to a DOC device? Please advise; thanks.

--
  Chris Haidinyak

Andrew Ip | 6 Jun 03:36 2002

Re: [PATCH] PCCHIPS m758lmr+ support

> 	Basically this patch just setups pcchips m758lmr+ directory, it uses the
> same code as winfast 6300.  I have verified the patch and it should work with
> the lastest cvs.  For those who don't familar with m758lmr+, it supports Intel's
> latest Tualatin Celeron/PIII processors, eg.Celeron/PIII 1.0GA, 1.1GA, 1.2G,...;
> on the other hand, Winfast 6300 doesn't supports all these chips.  Please let me
> know if there is any problem.  Thanks.
Oops.  Forgot my attachment.

-- 
Andrew Ip
Email:  aip <at> cwlinux.com
Tel:    (852) 2542 2046
Fax:    (852) 2542 2046
Mobile: (852) 9201 9866

Cwlinux Limited
18B Tower 1 Tern Centre,
237 Queen's Road Central,
Hong Kong.

For my public pgp key, please obtain it from http://www.keyserver.net/en.
diff -Nur freebios/src/mainboard/pcchips/m758lmr+/Config freebios.m758lmr+/src/mainboard/pcchips/m758lmr+/Config
--- freebios/src/mainboard/pcchips/m758lmr+/Config	Thu Jan  1 08:00:00 1970
+++ freebios.m758lmr+/src/mainboard/pcchips/m758lmr+/Config	Thu Jun  6 01:50:34 2002
 <at>  <at>  -0,0 +1,22  <at>  <at> 
+arch i386
+mainboardinit cpu/i386/entry16.inc
+mainboardinit cpu/i386/entry32.inc
+ldscript cpu/i386/entry16.lds
+ldscript cpu/i386/entry32.lds
+
+mainboardinit superio/sis/950/setup_serial.inc
+mainboardinit pc80/serial.inc
+mainboardinit arch/i386/lib/console.inc
+mainboardinit cpu/p6/earlymtrr.inc
+
+northsouthbridge sis/630
+nsuperio sis/950 com1={1} floppy=1  lpt=1
+
+option ENABLE_FIXED_AND_VARIABLE_MTRRS
+option FINAL_MAINBOARD_FIXUP
+option HAVE_PIRQ_TABLE=1
+object mainboard.o
+object irq_tables.o
+keyboard pc80
+cpu p5
+cpu p6
diff -Nur freebios/src/mainboard/pcchips/m758lmr+/dll.inc freebios.m758lmr+/src/mainboard/pcchips/m758lmr+/dll.inc
--- freebios/src/mainboard/pcchips/m758lmr+/dll.inc	Thu Jan  1 08:00:00 1970
+++ freebios.m758lmr+/src/mainboard/pcchips/m758lmr+/dll.inc	Thu Jun  6 01:50:34 2002
 <at>  <at>  -0,0 +1,15  <at>  <at> 
+/* Table for DLL Clock Control Register (0x8c - 0x8f), these
+   register values are very Mainboard specific */
+
+#	High Byte -> Register	Low Byte -> Value
+#ifndef SIS630S
+	.word	0x8c66
+	.word	0x8d66
+	.word	0x8e03
+	.word	0x8f55
+#else /* SIS630S */
+        .word	0x8c27	# set Clock DLL control register
+        .word	0x8d77	# 0x8c ~ 0x8f,
+        .word	0x8e01	# these values are very M/B
+        .word	0x8f07	# specific
+#endif /* SIS630S */
\ No newline at end of file
diff -Nur freebios/src/mainboard/pcchips/m758lmr+/irq_tables.c freebios.m758lmr+/src/mainboard/pcchips/m758lmr+/irq_tables.c
--- freebios/src/mainboard/pcchips/m758lmr+/irq_tables.c	Thu Jan  1 08:00:00 1970
+++ freebios.m758lmr+/src/mainboard/pcchips/m758lmr+/irq_tables.c	Thu Jun  6 01:50:34 2002
 <at>  <at>  -0,0 +1,64  <at>  <at> 
+#include <arch/pirq_routing.h>
+
+#ifndef SIS630S
+#define CHECKSUM 0xe6
+const struct irq_routing_table intel_irq_routing_table = {
+	PIRQ_SIGNATURE,	/* u32 signature */
+	PIRQ_VERSION,	/* u16 version   */
+	32+16*5,	/* there can be total 5 devices on the bus */
+	0x00,		/* Bus 0 */
+	0x08,		/* Device 1, Function 0 */
+	0x0A20,		/* reserve IRQ 11, 9, 5, for PCI */
+	0x1039,		/* Silicon Integrated System */
+	0x0008,		/* SiS 85C503/5513 ISA Bridge */
+	0x00,		/*  u8 miniport_data  - "crap" */
+	{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* u8 rfu[11] */
+	CHECKSUM,	/*  u8 checksum       - mod 256 checksum must give zero */
+	{
+		/* bus, devfn, {link, bitmap}, {link, bitmap}, {link, bitmap}, {link, bitmap}, slot, rfu  */
+		{0x00, 0x58, {{0x43, 0xdef8}, {0x44, 0xdef8}, {0x41, 0xdef8}, {0x42, 0xdef8}},
+		 0x01, 0x00},
+		{0x00, 0x60, {{0x44, 0xdef8}, {0x41, 0xdef8}, {0x42, 0xdef8}, {0x43, 0xdef8}},
+		 0x02, 0x00},
+		{0x00, 0x01, {{0x61, 0xdef8}, {0x00, 0xdef8}, {0x00, 0xdef8}, {0x00, 0xdef8}},
+		 0x00, 0x00},
+		{0x00, 0x10, {{0x41, 0xdef8}, {0x42, 0xdef8}, {0x43, 0xdef8}, {0x44, 0xdef8}},
+		 0x00, 0x00},
+		{0x00, 0x0a, {{0x41, 0xdef8}, {0x42, 0xdef8}, {0x43, 0xdef8}, {0x44, 0xdef8}},
+		 0x00, 0x00},
+	}
+};
+
+#else /* SIS630S */
+#define CHECKSUM 0x21
+const struct irq_routing_table intel_irq_routing_table = {
+	PIRQ_SIGNATURE,	/* u32 signature */
+	PIRQ_VERSION,	/* u16 version   */
+	32+16*7,	/* there can be total 5 devices on the bus */
+	0x00,		/* Bus 0 */
+	0x08,		/* Device 1, Function 0 */
+	0x1c20,		/* reserve IRQ 12, 11, 9, 5, for PCI */
+	0x1039,		/* Silicon Integrated System */
+	0x0008,		/* SiS 85C503/5513 ISA Bridge */
+	0x00,		/*  u8 miniport_data  - "crap" */
+	{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* u8 rfu[11] */
+	CHECKSUM,	/*  u8 checksum       - mod 256 checksum must give zero */
+	{
+		/* bus, devfn, {link, bitmap}, {link, bitmap}, {link, bitmap}, {link, bitmap}, slot, rfu  */
+		{0x00, 0x48, {{0x42, 0xdef8}, {0x43, 0xdef8}, {0x44, 0xdef8}, {0x41, 0xdef8}},
+		 0x01, 0x00},
+		{0x00, 0x58, {{0x43, 0xdef8}, {0x44, 0xdef8}, {0x41, 0xdef8}, {0x42, 0xdef8}},
+		 0x02, 0x00},
+		{0x00, 0x68, {{0x44, 0xdef8}, {0x41, 0xdef8}, {0x42, 0xdef8}, {0x43, 0xdef8}},
+		 0x03, 0x00},
+		{0x00, 0x78, {{0x41, 0xdef8}, {0x42, 0xdef8}, {0x43, 0xdef8}, {0x44, 0xdef8}},
+		 0x04, 0x00},
+		{0x00, 0x01, {{0x61, 0xdef8}, {0x00, 0xdef8}, {0x00, 0xdef8}, {0x00, 0xdef8}},
+		 0x00, 0x00},
+		{0x00, 0x10, {{0x41, 0xdef8}, {0x42, 0xdef8}, {0x43, 0xdef8}, {0x44, 0xdef8}},
+		 0x00, 0x00},
+		{0x00, 0x0a, {{0x41, 0xdef8}, {0x42, 0xdef8}, {0x43, 0xdef8}, {0x44, 0xdef8}},
+		 0x00, 0x00},
+	}
+};
+#endif /* SIS630S */
diff -Nur freebios/src/mainboard/pcchips/m758lmr+/mainboard.c freebios.m758lmr+/src/mainboard/pcchips/m758lmr+/mainboard.c
--- freebios/src/mainboard/pcchips/m758lmr+/mainboard.c	Thu Jan  1 08:00:00 1970
+++ freebios.m758lmr+/src/mainboard/pcchips/m758lmr+/mainboard.c	Thu Jun  6 01:54:03 2002
 <at>  <at>  -0,0 +1,20  <at>  <at> 
+#include <printk.h>
+
+void
+mainboard_fixup(void)
+{
+}
+
+void
+final_mainboard_fixup(void)
+{
+	void final_southbridge_fixup(void);
+	void final_superio_fixup(void);
+
+	printk_info("PCCHIPS m758lmr+ (and similar)...");
+
+	final_southbridge_fixup();
+#ifndef USE_NEW_SUPERIO_INTERFACE
+	final_superio_fixup();
+#endif
+}
diff -Nur freebios/src/mainboard/pcchips/m758lmr+/mainboard.c~ freebios.m758lmr+/src/mainboard/pcchips/m758lmr+/mainboard.c~
--- freebios/src/mainboard/pcchips/m758lmr+/mainboard.c~	Thu Jan  1 08:00:00 1970
+++ freebios.m758lmr+/src/mainboard/pcchips/m758lmr+/mainboard.c~	Thu Jun  6 01:51:12 2002
 <at>  <at>  -0,0 +1,20  <at>  <at> 
+#include <printk.h>
+
+void
+mainboard_fixup(void)
+{
+}
+
+void
+final_mainboard_fixup(void)
+{
+	void final_southbridge_fixup(void);
+	void final_superio_fixup(void);
+
+	printk_info("PCCHIPS m758+lmr (and similar)...");
+
+	final_southbridge_fixup();
+#ifndef USE_NEW_SUPERIO_INTERFACE
+	final_superio_fixup();
+#endif
+}
diff -Nur freebios/util/config/m758lmr+.config freebios.m758lmr+/util/config/m758lmr+.config
--- freebios/util/config/m758lmr+.config	Thu Jan  1 08:00:00 1970
+++ freebios.m758lmr+/util/config/m758lmr+.config	Thu Jun  6 02:06:03 2002
 <at>  <at>  -0,0 +1,58  <at>  <at> 
+# Sample config file for PCCHIPS m758lmr+ with DoC Millennium (as root)
+
+# This will make a target directory of m758lmr+
+target /usr/src/linuxbios/buildrom/m758lmr+
+
+# PCCHIPS m758lmr+
+mainboard pcchips/m758lmr+
+
+# Enable Serial Console for debugging
+option SERIAL_CONSOLE=1
+
+# enable debugging support
+option DEBUG=1
+
+# enable serial post for debugging
+option SERIAL_POST=1
+
+# set default consol loglevel
+option DEFAULT_CONSOLE_LOGLEVEL=9
+
+# enable floppy support
+# option MUST_ENABLE_FLOPPY
+
+# enable keyboard support
+# option NO_KEYBOARD
+
+# use ELF boot
+# option USE_ELF_BOOT=1
+
+# enable RAM test
+# option RAMTEST
+
+# PIRQ tables
+# option HAVE_PIRQ_TABLE=1
+
+# don't use old kernel hack
+# option OLD_KERNEL_HACK
+
+# Enable MicroCode update and L2 Cache init for PII and PIII
+option UPDATE_MICROCODE=1
+option CONFIGURE_L2_CACHE=1
+option ENABLE_FIXED_AND_VARIABLE_MTRRS=1
+
+
+# Use the internal VGA frame buffer device
+option HAVE_FRAMEBUFFER=1
+
+# Path to your kernel (vmlinux)
+linux /usr/src/linuxbios/linux
+
+# Kernel command line parameters
+# enable serial console
+ commandline root=/dev/nftla1 console=ttyS0,115200 console=tty0 video=sisfb:640x480-8 <at> 60,font:VGA8x16
+# disable serial console
+# commandline root=/dev/nftla1 console=/dev/tty5 CONSOLE=/dev/tty5 video=sisfb:640x480-8 <at> 60,font:VGA8x16
+
+docipl northsouthbridge/sis/630/ipl.S
+option USE_DOC_MIL=1
hcyun | 7 Jun 07:48 2002
Picon
Picon

About VGABIOS support

Can you tell me about the vga card you have succeed with your VGABIOS support?.

You said that Matrox card will works. but it failed in my case. In fact, I tried with four
 VGA cards (Matrox G450 AGP, Nvidia Geforece 2 MX AGP, Matrox Millennium 1 PCI,
 ATI 3D Rage II PCI ), but all failed..

First of all. it fail to detect ROM image for all AGP.
output for both AGP cards look like below and as you know this means that
mapped address doen't contain proper VGABIOS image.
---------------
found VGA: vid=xxx, did=xxx
rom base, size : 0xf0000000
BAD SIGNATURE 0xff 0xff
---------------

For all PCI vga cards, it detect proper rom image but it fail to execute with
endless output of below message.
---------------
Unsupport int #0x6
---------------

As for my test environment,
I used latest linuxbios cvs tree and I attached following lines to my config file.

dir /src/bioscall
option CONFIG_VGABIOS=1
option CONFIG_REALMODE_IDT=1
option CONFIG_PCIBIOS=1


-
HeeChul Yun,         
Embedded S/W Team at ETRI
e-mail: hcyun <at> etri.re.kr
phone: +82-42-860-1673



> -----Original Message-----
> From: Ronald G Minnich [mailto:rminnich <at> lanl.gov]
> Sent: Saturday, March 30, 2002 6:51 AM
> To: linuxbios <at> lanl.gov
> Subject: first boot with VGA support
>
>
>
> OK, as of today, we have booted to multi-user on the ASUS CUA
> using the
> brand-new VGA BIOS support. The Matrox comes up with its little BIOS
> splash message just fine. So LinuxBIOS is starting to be able
> to call VGA
> bios and set it up.
>
> Current problem on the ASUS is that if you move the mouse -- keyboard
> stops working. HELP!
>
> To date I've had to implement functions for the PCI bios that read and
> write config registers and search for devices. This all works. It adds
> a couple K to linuxbios but since we get general VGA
> capability I think it
> well worth the cost. Anyway it is optional so if you don't use it you
> don't pay the price.
>
> There is a new directory: src/bioscalls. This is all C code. All
> arch-dependent stuff is in src/arch/i386/lib, consisting of 2
> files: idt.c
> and vgabios.c
>
> Page 0 will now be reserved for use by the (OPTIONAL) bios support.
>
> There is currently one bug: I don't correctly set the Carry
> Flag on return
> from an interrupt. None of the BIOSes have yet seemed to care -- they
> check AX for real status. But I will try to fix this.
>
> ron
>
>
>
>

David Woodhouse | 7 Jun 14:09 2002

Re: elfBIOS...


ebiederman <at> lnxi.com said:
>  We've looked and RedBoot isn't a bad fit but it isn't an especially
> good fit either.

> First it already compiles as an ELF image and detects the memory size
> under LinuxBIOS just fine.  And the size seems to be in a reasonable
> neighborhood.

> Second the license makes code sharing extremely awkward.  And as it's
> drivers and infrastructure aren't good enough to just work, an awkward
> licesne is a significant hurdle.

http://sources.redhat.com/ml/ecos-discuss/2002-05/msg00191.html

	A key thing to make people aware of is that the licence for eCos
	is changing. We stated before that we wanted to make eCos v2.0 
	GPL compatible and that's what we have done. 

--
dwmw2


Gmane