Eric Anholt | 9 Feb 01:19 2016
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[PATCH 0/3] vc4: Runtime PM and GPU reset.

Here's a series to re-add GPU reset, which I cut out of the driver in
8483d152db61c5baf5452b844ef65b96ee9a6cfb to deal with a build
regression.  Along the way, I found a bug in hang detection that
seemed to be exacerbated by runtime PM.

My preference would be to get this in -fixes, since without GPU reset
we can end up with a totally wedged desktop (and we do still have some
known GPU hangs).  If not, I'm fine with the first patch to -fixes and
the other two to -next.

Eric Anholt (3):
  drm/vc4: Fix spurious GPU resets due to BO reuse.
  drm/vc4: Enable runtime PM.
  drm/vc4: Use runtime PM to power cycle the device when the GPU hangs.

 drivers/gpu/drm/vc4/vc4_drv.h | 13 +++++++++--
 drivers/gpu/drm/vc4/vc4_gem.c | 51 ++++++++++++++++++++++++++++++++++++-------
 drivers/gpu/drm/vc4/vc4_v3d.c | 48 ++++++++++++++++++++++++++++++----------
 3 files changed, 90 insertions(+), 22 deletions(-)

--

-- 
2.7.0

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Stefan Agner | 8 Feb 22:57 2016
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[PATCH v2 0/3] drm: introduce bus_flags for pixel clock polarity

Hi,

This is a new & split out version of the last patch of my
"drm/fsl-dcu: fixes and enhancements" patchset:
https://lkml.org/lkml/2015/11/18/949

Instead of using struct drm_display_mode to convey the pixel clock
polarity information, this patchset introduces a new field called
bus_flags stored in struct drm_display_info.

--
Stefan

Changes since v1:
- Introduce bus_flags to convey the pixel clock polarity from
  panel-simple.c to the driver.

Stefan Agner (3):
  drm/fsl-dcu: use mode flags for hsync/vsync polarity
  drm: introduce bus_flags in drm_display_info
  drm/fsl-dcu: use bus_flags for pixel clock polarity

 drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_crtc.c | 16 +++++++++++++---
 drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.h  |  4 ++--
 drivers/gpu/drm/panel/panel-simple.c       |  6 +++++-
 include/drm/drm_crtc.h                     |  9 +++++++++
 4 files changed, 29 insertions(+), 6 deletions(-)

--

-- 
2.7.1
(Continue reading)

bugzilla-daemon | 8 Feb 16:18 2016

[Bug 94043] Distorted graphics when running Battle.net app under Wine with Radeon driver

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bugzilla-daemon | 8 Feb 16:17 2016

[Bug 94043] Distorted graphics when running Battle.net app under Wine with Radeon driver

Comment # 4 on bug 94043 from Created attachment 121594 [details] Output of glxinfo
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bugzilla-daemon | 8 Feb 16:17 2016

[Bug 94043] Distorted graphics when running Battle.net app under Wine with Radeon driver

Comment # 3 on bug 94043 from Created attachment 121593 [details] Xorg.0.log from a session where the problem occurred
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bugzilla-daemon | 8 Feb 16:16 2016

[Bug 94043] Distorted graphics when running Battle.net app under Wine with Radeon driver

Comment # 2 on bug 94043 from Created attachment 121592 [details] Screenshot of the distortion The graphics in the problematic window flicker while the problem occurs. The graphics in the window alternate between completely blank (i.e. black) and distorted graphics as in the screenshot.
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bugzilla-daemon | 8 Feb 15:41 2016

[Bug 94043] Distorted graphics when running Battle.net app under Wine with Radeon driver

Comment # 1 on bug 94043 from Please attach your xorg log, glxinfo output, and dmesg output. Can you attach a picture of the distortion?
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bugzilla-daemon | 8 Feb 15:40 2016

[Bug 94043] Distorted graphics when running Battle.net app under Wine with Radeon driver

changed bug 94043
What Removed Added
Component Driver/Radeon Drivers/Gallium/r300
QA Contact xorg-team <at> lists.x.org dri-devel <at> lists.freedesktop.org
Assignee xorg-driver-ati <at> lists.x.org dri-devel <at> lists.freedesktop.org
Product xorg Mesa

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Daniel Vetter | 8 Feb 10:26 2016
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[PULL] drm-intel-next

Hi Dave,

Back from lca, time to start the 4.6 release train! I'll follow up with
some drm-misc pull, too.

drm-intel-next-2016-01-24:
- support for v3 vbt dsi blocks (Jani)
- improve mmio debug checks (Mika Kuoppala)
- reorg the ddi port translation table entries and related code (Ville)
- reorg gen8 interrupt handling for future platforms (Tvrtko)
- refactor tile width/height computations for framebuffers (Ville)
- kerneldoc integration for intel_pm.c (Jani)
- move default context from engines to device-global dev_priv (Dave Gordon)
- make seqno/irq ordering coherent with execlist (Chris)
- decouple internal engine number from UABI (Chris&Tvrtko)
- tons of small fixes all over, as usual
drm-intel-next-2016-01-11:
- GuC ADS support (Alex Dai)
- support for v3 of the vbt mipi/dsi panel sequence (Jani Nikula)
- more prep work for atomic watermarks (Matt Roper)
- clean up cursor handling and align more with other planes (Maarten)
- improvements to the unclaimed mmio debug code (Mika Kuoppalla)
- various improvements, w/a, updated translation tables, ...

Cheers, Daniel

The following changes since commit 1df59b8497f47495e873c23abd6d3d290c730505:

  Merge tag 'drm-intel-next-fixes-2016-01-14' of git://anongit.freedesktop.org/drm-intel into
drm-next (2016-01-18 07:02:19 +1000)

are available in the git repository at:

  git://anongit.freedesktop.org/drm-intel tags/drm-intel-next-2016-01-24

for you to fetch changes up to 947eaebc318d63ada82901cea86c586ac3d854f0:

  drm/i915: Update DRIVER_DATE to 20160124 (2016-01-24 22:49:17 +0100)

----------------------------------------------------------------
- support for v3 vbt dsi blocks (Jani)
- improve mmio debug checks (Mika Kuoppala)
- reorg the ddi port translation table entries and related code (Ville)
- reorg gen8 interrupt handling for future platforms (Tvrtko)
- refactor tile width/height computations for framebuffers (Ville)
- kerneldoc integration for intel_pm.c (Jani)
- move default context from engines to device-global dev_priv (Dave Gordon)
- make seqno/irq ordering coherent with execlist (Chris)
- decouple internal engine number from UABI (Chris&Tvrtko)
- tons of small fixes all over, as usual

----------------------------------------------------------------
Alex Dai (6):
      drm/i915/guc: Move GuC wq_check_space to alloc_request_extras
      drm/i915/guc: Add GuC ADS (Addition Data Structure) - allocation
      drm/i915/guc: Add GuC ADS - scheduler policies
      drm/i915/guc: Add GuC ADS - MMIO reg state
      drm/i915/guc: Add GuC ADS - enabling ADS
      drm/i915/guc: Fix a memory leak where guc->execbuf_client is not freed

Ankitprasad Sharma (1):
      drm/i915: Allow use of get_dma_address for stolen backed objects

Arun Siluvery (1):
      drm/i915/gen9: Correct max save/restore register count during gpu reset with GuC

Ben Widawsky (5):
      drm/i915: Limit VF cache invalidate workaround usage to gen9
      drm/i915: Fix whitespace (trivial)
      drm/i915: Cleanup some of the CSB handling
      drm/i915: Change WARN to ERROR in CSB count
      drm/i915: Extract CSB status read

Boyer, Wayne (1):
      drm/i915: Don't warn if the workaround list is empty part 2.

Chris Wilson (7):
      drm/i915: Move Braswell stop_machine GGTT insertion workaround
      mm: Export nr_swap_pages
      drm/i915: Disable shrinker for non-swapped backed objects
      drm/i915: Restore inhibiting the load of the default context
      drm/i915: Demote user facing DMC firmware load failure message
      drm/i915: Use ordered seqno write interrupt generation on gen8+ execlists
      drm/i915: Seal busy-ioctl uABI and prevent leaking of internal ids

Daniel Vetter (5):
      drm/i915: Tune down rpm wakelock debug checks
      drm/i915: Update DRIVER_DATE to 20160111
      Merge remote-tracking branch 'airlied/drm-next' into drm-intel-next-queued
      drm/i915: Tune down "GT register while GT waking disabled" message
      drm/i915: Update DRIVER_DATE to 20160124

Dave Gordon (5):
      drm/i915/guc: Expose (intel)_lr_context_size()
      drm/i915: add kerneldoc for intel_lr_context_size()
      drm/i915: simplify allocation of driver-internal requests
      drm/i915: abolish separate per-ring default_context pointers
      drm/i915: tidy up a few leftovers

Francisco Jerez (1):
      drm/i915: Make sure DC writes are coherent on flush.

Gary Wang (2):
      drm/i915: Correct max delay for HDMI hotplug live status checking
      drm/i915: increase the tries for HDMI hotplug live status checking

Geliang Tang (2):
      drm/i915: use kobj_to_dev()
      drm/i915: use hlist_for_each_entry

Insu Yun (1):
      i915: correctly handling failed allocation

Jani Nikula (25):
      drm/i915/bios: add proper documentation for the Video BIOS Table (VBT)
      drm/i915/bios: fix header define name for intel_bios.h
      drm/i915/bios: split the MIPI DSI VBT block parsing to two
      drm/i915/bios: have get_blocksize() support MIPI sequence block v3+
      drm/i915/bios: abstract finding the panel sequence block
      drm/i915/bios: rewrite sequence block parsing
      drm/i915/dsi: be defensive about out of bounds sequence id
      drm/i915/dsi: be defensive about out of bounds operation byte
      drm/i915: shut up gen8+ SDE irq dmesg noise, again
      drm/i915/dsi: abstract get pclk platform differences
      drm/i915/dsi: remove unused dsi_rr_formula()
      drm/i915/bios: interpret the i2c element
      drm/i915/bios: add sequences for MIPI sequence block v2
      drm/i915: skip the i2c element in the generic VBT DSI driver
      drm/i915/bios: add defines for v3 sequence block
      drm/i915/bios: add support for MIPI sequence block v3
      drm/i915/dsi: skip unknown elements for sequence block v3+
      drm/i915/dsi: reduce tedious repetition
      drm/i915/dsi: add debug printing of the new sequence block names
      drm/i915: add onoff utility function
      drm/i915/bios: Fix the sequence size calculations for MIPI seq v3
      drm/i915/dp: fall back to 18 bpp when sink capability is unknown
      drm/i915/sdvo: revert bogus kernel-doc comments to normal comments
      drm/i915: turn some bogus kernel-doc comments to normal comments
      drm/i915: add DOC: headline to RC6 kernel-doc

Joonas Lahtinen (4):
      drm/i915: Decouple struct i915_params i915 into i915_params.h
      drm/i915: Reorder i915_params struct.
      drm/i915: Simplify _STATE_ debug macros
      drm/i915: Compile-time concatenate WARN_ON macro strings

Lukas Wunner (1):
      drm/i915: Remove obsolete code from intelfb_alloc()

Lyude (1):
      drm/i915: intel_hpd_init(): Fix suspend/resume reprobing

Maarten Lankhorst (13):
      drm/i915/skl: Do not allow scaling when crtc is disabled.
      drm/i915: Do not acquire crtc state to check clock during modeset, v4.
      drm/i915: Keep track of the cdclk as if all crtc's were active.
      drm/i915: Calculate visibility in check_plane correctly regardless of dpms.
      drm/i915: Allow fuzzy matching in intel_compare_link_m_n
      drm/i915: Use passed plane state for sprite planes, v4.
      drm/i915: Do not use commit_plane for sprite planes.
      drm/i915: Remove some visibility checks from intel_crtc_update_cursor.
      drm/i915: Make disable_cursor_plane similar to commit_cursor_plane.
      drm/i915: Use the plane state for cursor updates.
      drm/i915: Use plane state for primary plane updates.
      drm/i915: Remove commit_plane function pointer.
      drm/i915: Widen return value for reservation_object_wait_timeout_rcu to long.

Matt Roper (7):
      drm/i915: Setup clipped src/dest coordinates during FB reconstruction (v2)
      drm/i915: Convert hsw_compute_linetime_wm to use in-flight state
      drm/i915: Add extra paranoia to ILK watermark calculations
      drm/i915: Sanitize watermarks after hardware state readout (v4)
      drm/i915: Add two-stage ILK-style watermark programming (v10)
      drm/i915: Handle error paths during watermark sanitization properly (v3)
      Revert "drm/i915: Add two-stage ILK-style watermark programming (v10)"

Michał Winiarski (1):
      drm/i915: Avoid writing relocs with addresses in non-canonical form

Michel Thierry (2):
      drm/i915/kbl: Enable PW1 and Misc I/O power wells
      drm/i915/gen9: Set PIN_ZONE_4G end to 4GB - 1 page

Mika Kuoppala (11):
      drm/i915: Apply broader WaRsDisableCoarsePowerGating for guc also
      drm/i915: Inspect subunit states on hangcheck
      drm/i915: Consolidate unclaimed mmio detection
      drm/i915: Introduce intel_uncore_unclaimed_mmio
      drm/i915: Detect and clear unclaimed access on resume
      drm/i915: Do one shot unclaimed mmio detection less frequently
      drm/i915: Streamline unclaimed reg debug trace
      drm/i915: Add non claimed mmio checking for vlv/chv
      drm/i915: Enable mmio_debug for vlv/chv
      drm/i915: Arm the unclaimed mmio debugs on suspend path
      drm/i915: Limit the auto arming of mmio debugs on vlv/chv

Rodrigo Vivi (4):
      drm/i915: Update Skylake DDI translation table for HDMI.
      drm/i915: Update Skylake DDI translation table for DP.
      drm/i915: Cleaning up DDI translation tables
      drm/i915/kbl: Adding missing IS_KABYLAKE checks.

Tvrtko Ursulin (12):
      drm/i915/bdw+: Replace list_del+list_add_tail with list_move_tail
      drm/i915/gen8: Tidy display interrupt processing
      drm/i915/gen8: Factor out display interrupt handling
      drm/i915: Extract vfunc setup from logical ring initializers
      drm/i915: Compact logical ring interrupt initialization
      drm/i915: Fix bsd2 ring name
      drm/i915: Only grab timestamps when needed
      drm/i915: Do not call API requiring struct_mutex where it is not available
      drm/i915: Cache ringbuffer GTT VMA
      drm/i915: Cache LRC state page in the context
      drm/i915: Do not put big intel_crtc_state on the stack
      drm/i915: Decouple execbuf uAPI from internal implementation

Ville Syrjälä (31):
      drm/i915: Workaround CHV pipe C cursor fail
      drm/i915: Unbreak check_digital_port_conflicts()
      drm/i915: Pass the correct encoder to intel_ddi_clk_select() with MST
      drm/i915: Check max number of lanes when registering DDI ports
      drm/i915: Store max lane count in intel_digital_port
      drm/i915: Remove pointless 'ddi_translations' local variable
      drm/i915: Eliminate duplicated skl_get_buf_trans_dp()
      drm/i915: Pass around dev_priv for ddi buffer programming
      drm/i915: Reject >9 ddi translation entried if port != A/E on SKL
      drm/i915: Kill intel_prepare_ddi()
      drm/i915: Cleanup phys status page too
      drm/i915: Wait for pipe to start before sampling vblank timestamps on gen2
      drm/i915: Allow 27 bytes child_dev for VBT <109
      drm/i915: Expect child dev size of 22 bytes for VBT < 106
      drm/i915: Use MI_BATCH_BUFFER_START on 830/845
      drm/i915: Only complain about n_edp_entries with eDP ports
      drm/i915: Pass modifier instead of tiling_mode to gen4_compute_page_offset()
      drm/i915: Factor out intel_tile_width()
      drm/i915: Redo intel_tile_height() as intel_tile_size() / intel_tile_width()
      drm/i915: change intel_fill_fb_ggtt_view() to use the real tile size
      drm/i915: Use intel_tile_{size,width,height}() in intel_gen4_compute_page_offset()
      drm/i915: s/intel_gen4_compute_page_offset/intel_compute_tile_offset/
      drm/i915: Refactor intel_surf_alignment()
      drm/i915: Start WM computation from scratch on ILK-BDW
      drm/i915: Use the active wm config for merging on ILK-BDW
      drm/i915: Don't leak framebuffer_references if drm_framebuffer_init() fails
      drm/i915: Set i915_ggtt_view_normal type explicitly
      drm/i915: Pass the dma_addr_t array as const to rotate_pages()
      drm/i915: Don't reject primary plane windowing with color keying enabled on SKL+
      drm/i915: skl_update_scaler() wants a rotation bitmask instead of bit number
      drm/i915: Fix NULL plane->fb oops on SKL

 Documentation/DocBook/gpu.tmpl             |    6 +
 drivers/gpu/drm/i915/i915_debugfs.c        |   56 +-
 drivers/gpu/drm/i915/i915_drv.c            |   15 +-
 drivers/gpu/drm/i915/i915_drv.h            |  108 ++-
 drivers/gpu/drm/i915/i915_gem.c            |   95 ++-
 drivers/gpu/drm/i915/i915_gem_context.c    |   29 +-
 drivers/gpu/drm/i915/i915_gem_execbuffer.c |  163 +++--
 drivers/gpu/drm/i915/i915_gem_gtt.c        |    8 +-
 drivers/gpu/drm/i915/i915_gem_gtt.h        |    1 -
 drivers/gpu/drm/i915/i915_gem_shrinker.c   |   60 +-
 drivers/gpu/drm/i915/i915_gem_stolen.c     |    3 +
 drivers/gpu/drm/i915/i915_gpu_error.c      |    2 +-
 drivers/gpu/drm/i915/i915_guc_reg.h        |    1 +
 drivers/gpu/drm/i915/i915_guc_submission.c |  146 +++-
 drivers/gpu/drm/i915/i915_irq.c            |  254 ++++---
 drivers/gpu/drm/i915/i915_params.c         |    1 +
 drivers/gpu/drm/i915/i915_params.h         |   68 ++
 drivers/gpu/drm/i915/i915_reg.h            |    5 +
 drivers/gpu/drm/i915/i915_sysfs.c          |    8 +-
 drivers/gpu/drm/i915/intel_atomic.c        |    2 +-
 drivers/gpu/drm/i915/intel_atomic_plane.c  |   14 +-
 drivers/gpu/drm/i915/intel_bios.c          |  412 ++++++-----
 drivers/gpu/drm/i915/intel_bios.h          |   60 +-
 drivers/gpu/drm/i915/intel_csr.c           |   14 +-
 drivers/gpu/drm/i915/intel_ddi.c           |  291 ++++----
 drivers/gpu/drm/i915/intel_display.c       | 1090 ++++++++++++++++------------
 drivers/gpu/drm/i915/intel_dp.c            |   30 +-
 drivers/gpu/drm/i915/intel_dp_mst.c        |    4 +-
 drivers/gpu/drm/i915/intel_drv.h           |   51 +-
 drivers/gpu/drm/i915/intel_dsi.c           |    9 +-
 drivers/gpu/drm/i915/intel_dsi.h           |    3 +-
 drivers/gpu/drm/i915/intel_dsi_panel_vbt.c |  153 ++--
 drivers/gpu/drm/i915/intel_dsi_pll.c       |   93 +--
 drivers/gpu/drm/i915/intel_fbdev.c         |    4 +-
 drivers/gpu/drm/i915/intel_guc.h           |    4 +
 drivers/gpu/drm/i915/intel_guc_fwif.h      |  113 ++-
 drivers/gpu/drm/i915/intel_guc_loader.c    |   13 +-
 drivers/gpu/drm/i915/intel_hdmi.c          |    8 +-
 drivers/gpu/drm/i915/intel_lrc.c           |  563 +++++++-------
 drivers/gpu/drm/i915/intel_lrc.h           |   23 +-
 drivers/gpu/drm/i915/intel_overlay.c       |   24 +-
 drivers/gpu/drm/i915/intel_pm.c            |   93 ++-
 drivers/gpu/drm/i915/intel_ringbuffer.c    |   40 +-
 drivers/gpu/drm/i915/intel_ringbuffer.h    |   19 +-
 drivers/gpu/drm/i915/intel_runtime_pm.c    |   31 +-
 drivers/gpu/drm/i915/intel_sdvo_regs.h     |   76 +-
 drivers/gpu/drm/i915/intel_sprite.c        |  161 ++--
 drivers/gpu/drm/i915/intel_uncore.c        |  139 ++--
 include/uapi/drm/i915_drm.h                |   33 +-
 mm/swapfile.c                              |    6 +
 50 files changed, 2738 insertions(+), 1867 deletions(-)
 create mode 100644 drivers/gpu/drm/i915/i915_params.h
 mode change 100644 => 100755 drivers/gpu/drm/i915/intel_hdmi.c

--

-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
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bugzilla-daemon | 8 Feb 08:18 2016

[Bug 93663] Stuck on screen blanking/dmps/monitor turned off/on

Comment # 5 on bug 93663 from As of 4.4.1 I can turn on and off the monitor properly. I'll test blanking and dpms now.
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Mike Lothian | 8 Feb 03:45 2016
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[PATCH] drm/radeon Make CIK support optional

This will allow us to disable CIK support in the radeon driver, so both 
radeon and amdgpu can be around at the same time without conflicting

Signed-of-by: Mike Lothian <mike <at> fireburn.co.uk>
---

I've tested this on my Kabini system radeon doesn't initalise when compiled in but
I do get these messages in my dmesg:

[drm] radeon kernel modesetting enabled.
[drm] initializing kernel modesetting (KABINI 0x1002:0x9832 0x1025:0x0800).
radeon 0000:00:01.0: Fatal error during GPU init
radeon: probe of 0000:00:01.0 failed with error -22

Am I going down the right route with this?

 drivers/gpu/drm/amd/amdgpu/Kconfig         |  1 +
 drivers/gpu/drm/radeon/Kconfig             | 11 +++++++++++
 drivers/gpu/drm/radeon/Makefile            | 11 +++++++----
 drivers/gpu/drm/radeon/atombios_encoders.c |  5 +++++
 drivers/gpu/drm/radeon/evergreen.c         | 24 ++++++++++++++++++++++++
 drivers/gpu/drm/radeon/radeon_asic.c       | 13 +++++++++++++
 6 files changed, 61 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/Kconfig b/drivers/gpu/drm/amd/amdgpu/Kconfig
index b30fcfa..bb58f17 100644
--- a/drivers/gpu/drm/amd/amdgpu/Kconfig
+++ b/drivers/gpu/drm/amd/amdgpu/Kconfig
 <at>  <at>  -1,6 +1,7  <at>  <at> 
 config DRM_AMDGPU_CIK
 	bool "Enable amdgpu support for CIK parts"
 	depends on DRM_AMDGPU
+	depends on !DRM_RADEON_CIK
 	help
 	  Choose this option if you want to enable experimental support
 	  for CIK asics.
diff --git a/drivers/gpu/drm/radeon/Kconfig b/drivers/gpu/drm/radeon/Kconfig
index 9909f5c..32bc77e 100644
--- a/drivers/gpu/drm/radeon/Kconfig
+++ b/drivers/gpu/drm/radeon/Kconfig
 <at>  <at>  -1,3 +1,14  <at>  <at> 
+config DRM_RADEON_CIK
+	bool "Enable radeon support for CIK parts"
+	depends on DRM_RADEON
+	default y
+	help
+	  Choose this option if you want to enable support for CIK
+	  asics.
+
+	  Consider disabling this option if you wish to enable CIK
+	  in the amdgpu driver.
+
 config DRM_RADEON_USERPTR
 	bool "Always enable userptr support"
 	depends on DRM_RADEON
diff --git a/drivers/gpu/drm/radeon/Makefile b/drivers/gpu/drm/radeon/Makefile
index 08bd17d..6c43901 100644
--- a/drivers/gpu/drm/radeon/Makefile
+++ b/drivers/gpu/drm/radeon/Makefile
 <at>  <at>  -72,13 +72,15  <at>  <at>  radeon-y += radeon_device.o radeon_asic.o radeon_kms.o \
 	evergreen.o evergreen_cs.o evergreen_blit_shaders.o \
 	evergreen_hdmi.o radeon_trace_points.o ni.o cayman_blit_shaders.o \
 	atombios_encoders.o radeon_semaphore.o radeon_sa.o atombios_i2c.o si.o \
-	si_blit_shaders.o radeon_prime.o cik.o cik_blit_shaders.o \
+	si_blit_shaders.o radeon_prime.o \
 	r600_dpm.o rs780_dpm.o rv6xx_dpm.o rv770_dpm.o rv730_dpm.o rv740_dpm.o \
 	rv770_smc.o cypress_dpm.o btc_dpm.o sumo_dpm.o sumo_smc.o trinity_dpm.o \
-	trinity_smc.o ni_dpm.o si_smc.o si_dpm.o kv_smc.o kv_dpm.o ci_smc.o \
-	ci_dpm.o dce6_afmt.o radeon_vm.o radeon_ucode.o radeon_ib.o \
+	trinity_smc.o ni_dpm.o si_smc.o si_dpm.o \
+	dce6_afmt.o radeon_vm.o radeon_ucode.o radeon_ib.o \
 	radeon_sync.o radeon_audio.o radeon_dp_auxch.o radeon_dp_mst.o

+radeon-$(CONFIG_DRM_RADEON_CIK) += cik.o cik_blit_shaders.o kv_smc.o kv_dpm.o ci_smc.o ci_dpm.o
+
 radeon-$(CONFIG_MMU_NOTIFIER) += radeon_mn.o

 # add async DMA block
 <at>  <at>  -88,7 +90,8  <at>  <at>  radeon-y += \
 	evergreen_dma.o \
 	ni_dma.o \
 	si_dma.o \
-	cik_sdma.o \
+
+radeon-$(CONFIG_DRM_RADEON_CIK) += cik_sdma.o

 # add UVD block
 radeon-y += \
diff --git a/drivers/gpu/drm/radeon/atombios_encoders.c b/drivers/gpu/drm/radeon/atombios_encoders.c
index 01b20e1..2bb81d2 100644
--- a/drivers/gpu/drm/radeon/atombios_encoders.c
+++ b/drivers/gpu/drm/radeon/atombios_encoders.c
 <at>  <at>  -2506,10 +2506,15  <at>  <at>  static void radeon_atom_encoder_prepare(struct drm_encoder *encoder)
 	/* this is needed for the pll/ss setup to work correctly in some cases */
 	atombios_set_encoder_crtc_source(encoder);
 	/* set up the FMT blocks */
+#ifdef CONFIG_DRM_RADEON_CIK
 	if (ASIC_IS_DCE8(rdev))
 		dce8_program_fmt(encoder);
 	else if (ASIC_IS_DCE4(rdev))
 		dce4_program_fmt(encoder);
+#else
+	if (ASIC_IS_DCE4(rdev))
+		dce4_program_fmt(encoder);
+#endif
 	else if (ASIC_IS_DCE3(rdev))
 		dce3_program_fmt(encoder);
 	else if (ASIC_IS_AVIVO(rdev))
diff --git a/drivers/gpu/drm/radeon/evergreen.c b/drivers/gpu/drm/radeon/evergreen.c
index 2ad4628..f431946 100644
--- a/drivers/gpu/drm/radeon/evergreen.c
+++ b/drivers/gpu/drm/radeon/evergreen.c
 <at>  <at>  -209,12 +209,19  <at>  <at>  extern void cayman_cp_int_cntl_setup(struct radeon_device *rdev,
 				     int ring, u32 cp_int_cntl);
 extern void cayman_vm_decode_fault(struct radeon_device *rdev,
 				   u32 status, u32 addr);
+
+#ifdef CONFIG_DRM_RADEON_CIK
 void cik_init_cp_pg_table(struct radeon_device *rdev);
+#endif

 extern u32 si_get_csb_size(struct radeon_device *rdev);
 extern void si_get_csb_buffer(struct radeon_device *rdev, volatile u32 *buffer);
+
+#ifdef CONFIG_DRM_RADEON_CIK
 extern u32 cik_get_csb_size(struct radeon_device *rdev);
 extern void cik_get_csb_buffer(struct radeon_device *rdev, volatile u32 *buffer);
+#endif
+
 extern void rv770_set_clk_bypass_mode(struct radeon_device *rdev);

 static const u32 evergreen_golden_registers[] =
 <at>  <at>  -4160,11 +4167,17  <at>  <at>  int sumo_rlc_init(struct radeon_device *rdev)

 	if (cs_data) {
 		/* clear state block */
+#ifdef CONFIG_DRM_RADEON_CIK
 		if (rdev->family >= CHIP_BONAIRE) {
 			rdev->rlc.clear_state_size = dws = cik_get_csb_size(rdev);
 		} else if (rdev->family >= CHIP_TAHITI) {
 			rdev->rlc.clear_state_size = si_get_csb_size(rdev);
 			dws = rdev->rlc.clear_state_size + (256 / 4);
+#else
+		if (rdev->family >= CHIP_TAHITI) {
+			rdev->rlc.clear_state_size = si_get_csb_size(rdev);
+			dws = rdev->rlc.clear_state_size + (256 / 4);
+#endif
 		} else {
 			reg_list_num = 0;
 			dws = 0;
 <at>  <at>  -4211,6 +4224,7  <at>  <at>  int sumo_rlc_init(struct radeon_device *rdev)
 		}
 		/* set up the cs buffer */
 		dst_ptr = rdev->rlc.cs_ptr;
+#ifdef CONFIG_DRM_RADEON_CIK
 		if (rdev->family >= CHIP_BONAIRE) {
 			cik_get_csb_buffer(rdev, dst_ptr);
 		} else if (rdev->family >= CHIP_TAHITI) {
 <at>  <at>  -4219,6 +4233,14  <at>  <at>  int sumo_rlc_init(struct radeon_device *rdev)
 			dst_ptr[1] = cpu_to_le32(lower_32_bits(reg_list_mc_addr));
 			dst_ptr[2] = cpu_to_le32(rdev->rlc.clear_state_size);
 			si_get_csb_buffer(rdev, &dst_ptr[(256/4)]);
+#else
+		if (rdev->family >= CHIP_TAHITI) {
+		        reg_list_mc_addr = rdev->rlc.clear_state_gpu_addr + 256;
+			dst_ptr[0] = cpu_to_le32(upper_32_bits(reg_list_mc_addr));
+			dst_ptr[1] = cpu_to_le32(lower_32_bits(reg_list_mc_addr));
+			dst_ptr[2] = cpu_to_le32(rdev->rlc.clear_state_size);
+			si_get_csb_buffer(rdev, &dst_ptr[(256/4)]);
+#endif
 		} else {
 			reg_list_hdr_blk_index = 0;
 			reg_list_mc_addr = rdev->rlc.clear_state_gpu_addr + (reg_list_blk_index * 4);
 <at>  <at>  -4288,7 +4310,9  <at>  <at>  int sumo_rlc_init(struct radeon_device *rdev)
 			return r;
 		}

+#ifdef CONFIG_DRM_RADEON_CIK
 		cik_init_cp_pg_table(rdev);
+#endif

 		radeon_bo_kunmap(rdev->rlc.cp_table_obj);
 		radeon_bo_unreserve(rdev->rlc.cp_table_obj);
diff --git a/drivers/gpu/drm/radeon/radeon_asic.c b/drivers/gpu/drm/radeon/radeon_asic.c
index 7d5a36d..2f4beff 100644
--- a/drivers/gpu/drm/radeon/radeon_asic.c
+++ b/drivers/gpu/drm/radeon/radeon_asic.c
 <at>  <at>  -126,6 +126,7  <at>  <at>  static void radeon_register_accessor_init(struct radeon_device *rdev)
 		rdev->mc_wreg = &rs780_mc_wreg;
 	}

+#ifdef CONFIG_DRM_RADEON_CIK
 	if (rdev->family >= CHIP_BONAIRE) {
 		rdev->pciep_rreg = &cik_pciep_rreg;
 		rdev->pciep_wreg = &cik_pciep_wreg;
 <at>  <at>  -133,6 +134,12  <at>  <at>  static void radeon_register_accessor_init(struct radeon_device *rdev)
 		rdev->pciep_rreg = &r600_pciep_rreg;
 		rdev->pciep_wreg = &r600_pciep_wreg;
 	}
+#else
+	if (rdev->family >= CHIP_R600) {
+		rdev->pciep_rreg = &r600_pciep_rreg;
+		rdev->pciep_wreg = &r600_pciep_wreg;
+	}
+#endif
 }

 static int radeon_invalid_get_allowed_info_register(struct radeon_device *rdev,
 <at>  <at>  -2023,6 +2030,8  <at>  <at>  static struct radeon_asic si_asic = {
 	},
 };

+#ifdef CONFIG_DRM_RADEON_CIK
+
 static const struct radeon_asic_ring ci_gfx_ring = {
 	.ib_execute = &cik_ring_ib_execute,
 	.ib_parse = &cik_ib_parse,
 <at>  <at>  -2303,6 +2312,8  <at>  <at>  static struct radeon_asic kv_asic = {
 	},
 };

+#endif
+
 /**
  * radeon_asic_init - register asic specific callbacks
  *
 <at>  <at>  -2573,6 +2584,7  <at>  <at>  int radeon_asic_init(struct radeon_device *rdev)
 			break;
 		}
 		break;
+#ifdef CONFIG_DRM_RADEON_CIK
 	case CHIP_BONAIRE:
 	case CHIP_HAWAII:
 		rdev->asic = &ci_asic;
 <at>  <at>  -2679,6 +2691,7  <at>  <at>  int radeon_asic_init(struct radeon_device *rdev)
 		}
 		rdev->has_uvd = true;
 		break;
+#endif
 	default:
 		/* FIXME: not supported yet */
 		return -EINVAL;
--

-- 
2.7.1

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