Tobias Jakobi | 20 Apr 21:50 2015
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[PATCH v2] modetest: initialize handles/pitches in set_plane()

Only the 'offsets' array was initialized to zero.
Since bo_create only sets the handles which are
necessary, were we passing garbage data to the
kernel when calling drmModeAddFB2 later.

The issue only seems to appear when passing e.g.
NV12 data to the kernel, a case where not only
handles[0] is used. I therefore also removed the
corresponding comment.

v2: Do the same for set_mode(), set_cursors()
    and test_page_flip().

Signed-off-by: Tobias Jakobi <tjakobi <at> math.uni-bielefeld.de>
---
 tests/modetest/modetest.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/tests/modetest/modetest.c b/tests/modetest/modetest.c
index 5f46efd..27ce380 100644
--- a/tests/modetest/modetest.c
+++ b/tests/modetest/modetest.c
 <at>  <at>  -964,7 +964,7  <at>  <at>  page_flip_handler(int fd, unsigned int frame,
 static int set_plane(struct device *dev, struct plane_arg *p)
 {
 	drmModePlane *ovr;
-	uint32_t handles[4], pitches[4], offsets[4] = {0}; /* we only use [0] */
+	uint32_t handles[4] = {0}, pitches[4] = {0}, offsets[4] = {0};
 	uint32_t plane_id = 0;
 	struct bo *plane_bo;
(Continue reading)

Tobias Jakobi | 20 Apr 20:46 2015
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[PATCH] modetest: initialize handles/pitches in set_plane()

Only the 'offsets' array was initialized to zero.
Since bo_create only sets the handles which are
necessary, were we passing garbage data to the
kernel when calling drmModeAddFB2 later.

The issue only seems to appear when passing e.g.
NV12 data to the kernel, a case where not only
handles[0] is used. I therefore also removed the
corresponding comment.

Signed-off-by: Tobias Jakobi <tjakobi <at> math.uni-bielefeld.de>
---
 tests/modetest/modetest.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/tests/modetest/modetest.c b/tests/modetest/modetest.c
index 53dfe05..34d86d0 100644
--- a/tests/modetest/modetest.c
+++ b/tests/modetest/modetest.c
 <at>  <at>  -969,7 +969,7  <at>  <at>  page_flip_handler(int fd, unsigned int frame,
 static int set_plane(struct device *dev, struct plane_arg *p)
 {
 	drmModePlane *ovr;
-	uint32_t handles[4], pitches[4], offsets[4] = {0}; /* we only use [0] */
+	uint32_t handles[4] = {0}, pitches[4] = {0}, offsets[4] = {0};
 	uint32_t plane_id = 0;
 	struct bo *plane_bo;
 	uint32_t plane_flags = 0;
--

-- 
1.9.1
(Continue reading)

Daniel Stone | 20 Apr 20:24 2015

[PATCH 0/2] User-created blob properties

This is the userspace counterpart to:
http://lists.freedesktop.org/archives/dri-devel/2015-April/081488.html

Cheers,
Daniel

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Daniel Stone | 20 Apr 20:22 2015

[PATCH 0/7] User-created blob properties

Hi,
This is the spritual successor to the modes-as-blob-properties patchset.

There are some fairly drastic differences though, namely:
  - the referenced object in this case is the blob property - being just
    a dumb chunk of data - rather than attempting to refcount modes;
    meaning that ...
  - userspace doesn't see blob mode IDs from the connector list, only
    from the current mode, so it really needs to create the mdoes again
    from the drm_mode_modeinfo it gets
  - the mode-constness series has been split out and will be sent
    separately

Actually exposing the mode property does largely seem to work, but
need to fix i915 to not copy CRTC states by value before it does.

This series still retains the concept of a type within the create blob
ioctl, on the grounds that otherwise we could allow userspace to create
unbounded allocations in the kernel with no attribution. Other than
matching size, the type has no meaning per se.

Cheers,
Daniel

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Dave Airlie | 20 Apr 05:32 2015
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git pull] drm for v4.1-rc1


Hi Linus,

First up, this tree contains a backmerge of your tree, as it merges cleanly
but then fails to build on ARM due to an API change, I've included the
fixed up patch in the merge commit.

The unmerged, unfixed tree is in my drm-next branch if you want to confirm
things. The fixup is 3 trivial ^regulator_set_optimum_mode^regulator_set_load
in drivers/gpu/drm/msm/dsi/dsi_host.c.

I've also been delayed waiting for Grant's tree to merge, but that is in
now so I'm not dragging in stuff from that any longer.

Highlights:

Core:
	Virtual GEM layer merged, this has been around for a long time,
        and it provides a software backed device that allows userspace to
        use it as a GEM shared memory handler. This makes it a lot easier
        to do certain things when you have no GPU but still have to deal with
        DRI expectations.

	atomic helper updates.
	framebuffer modifier interface added.
	i2c over auxch displayport fixes.
	fb width/height confusion fixes.

	new driver for ps8622/ps8625 bridge chips
	lots of new panels
(Continue reading)

Mark yao | 20 Apr 03:30 2015

[GIT PULL] drm/rockchip: fixes and be rockchip/drm maintainer

Hi Dave
     I'm interesting to maintain the rockchip drm, so add entry for 
Rockchip drm.
     and some fixes.

     Can you land them?

The following changes since commit aa219a0dd7774e2454a5687e7d38e947a131cdee:

   Merge tag 'drm-intel-next-fixes-2015-04-15' of 
git://anongit.freedesktop.org/drm-intel into drm-next (2015-04-16 
08:34:51 +1000)

are available in the git repository at:

   https://github.com/markyzq/kernel-drm-rockchip.git drm-next0420

for you to fetch changes up to 3ea68922fc4148abc97557df43d4ba9a136b1c8d:

   drm/rockchip: fix error check when getting irq (2015-04-20 09:02:31 
+0800)

----------------------------------------------------------------
Heiko Stuebner (2):
       MAINTAINERS: add entry for Rockchip drm drivers
       drm/rockchip: fix error check when getting irq

  MAINTAINERS                                 |    7 +++++++
  drivers/gpu/drm/rockchip/rockchip_drm_vop.c |    9 +++++----
  2 files changed, 12 insertions(+), 4 deletions(-)
(Continue reading)

Marc Ludwig | 18 Apr 18:04 2015
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access "Display Port Helper Functions" trough userspace

Hi, Folks!
 
I'am looking for an opportunity to access the I2C-Interface which is attached to my displayport link.
Can anyone give me a hint aubout an minimal working example for this?
 
I tried to figure aut how this could be solved using the linux userspace, but for me it looks like i have to implement my own driver
according to https://www.kernel.org/doc/htmldocs/drm/ch02s05.html#idp10812112 this should be done by describing an
drm_dp_aux_msg structure, which is passed into a driver's .transfer implementation.
 
Furthermore i was looking into some packages (the working machine runs an ArchLinux-Distro) which where provided.
$ extra/libdrm 2.4.60-2 :Userspace interface to kernel DRM services
$ extra/libva-intel-driver 1.5.1-1 : VA-API implementation for Intel G45 and HD Graphics family (the working machine has an Intel HD4000 GPU)
But none of them does provide such helper functions.
 
Thank you for your time, with kind Regards,
 
 
Marc
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Heiko Stübner | 20 Apr 00:59 2015
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[PATCH v2 1/2] MAINTAINERS: add entry for Rockchip drm drivers

Mark Yao looks after the Rockchip drm drivers and should thus also get
patches touching these.

Signed-off-by: Heiko Stuebner <heiko <at> sntech.de>
---
 MAINTAINERS | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/MAINTAINERS b/MAINTAINERS
index 7687fc6..7e4d386 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
 <at>  <at>  -3410,6 +3410,13  <at>  <at>  F:	drivers/gpu/drm/rcar-du/
 F:	drivers/gpu/drm/shmobile/
 F:	include/linux/platform_data/shmob_drm.h

+DRM DRIVERS FOR ROCKCHIP
+M:	Mark Yao <mark.yao <at> rock-chips.com>
+L:	dri-devel <at> lists.freedesktop.org
+S:	Maintained
+F:	drivers/gpu/drm/rockchip/
+F:	Documentation/devicetree/bindings/video/rockchip*
+
 DSBR100 USB FM RADIO DRIVER
 M:	Alexey Klimov <klimov.linux <at> gmail.com>
 L:	linux-media <at> vger.kernel.org
--

-- 
2.1.4

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Rob Clark | 19 Apr 16:31 2015
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[PATCH] drm/msm/adreno: dump scratch regs and other info on hang

Dump a bit more info when the GPU hangs, without having hang_debug
enabled (which dumps a *lot* of registers).  Also dump the scratch
registers, as they are useful for determining where in the cmdstream
the GPU hung (and they seem always safe to read when GPU has hung).

Note that the freedreno gallium driver emits increasing counter values
to SCRATCH6 (to identify tile #) and SCRATCH7 (to identify draw #), so
these two in particular can be used to "triangulate" where in the
cmdstream the GPU hung.

Signed-off-by: Rob Clark <robdclark <at> gmail.com>
---
 drivers/gpu/drm/msm/adreno/a3xx_gpu.c   |  3 +++
 drivers/gpu/drm/msm/adreno/a4xx_gpu.c   |  3 ++-
 drivers/gpu/drm/msm/adreno/adreno_gpu.c | 21 +++++++++++++++++++--
 drivers/gpu/drm/msm/adreno/adreno_gpu.h |  1 +
 4 files changed, 25 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/msm/adreno/a3xx_gpu.c b/drivers/gpu/drm/msm/adreno/a3xx_gpu.c
index b66c53b..0f0c456 100644
--- a/drivers/gpu/drm/msm/adreno/a3xx_gpu.c
+++ b/drivers/gpu/drm/msm/adreno/a3xx_gpu.c
 <at>  <at>  -295,9 +295,12  <at>  <at>  static int a3xx_hw_init(struct msm_gpu *gpu)

 static void a3xx_recover(struct msm_gpu *gpu)
 {
+	adreno_dump_info(gpu);
+
 	/* dump registers before resetting gpu, if enabled: */
 	if (hang_debug)
 		a3xx_dump(gpu);
+
 	gpu_write(gpu, REG_A3XX_RBBM_SW_RESET_CMD, 1);
 	gpu_read(gpu, REG_A3XX_RBBM_SW_RESET_CMD);
 	gpu_write(gpu, REG_A3XX_RBBM_SW_RESET_CMD, 0);
diff --git a/drivers/gpu/drm/msm/adreno/a4xx_gpu.c b/drivers/gpu/drm/msm/adreno/a4xx_gpu.c
index 5997517..2dc98518 100644
--- a/drivers/gpu/drm/msm/adreno/a4xx_gpu.c
+++ b/drivers/gpu/drm/msm/adreno/a4xx_gpu.c
 <at>  <at>  -268,6 +268,8  <at>  <at>  static int a4xx_hw_init(struct msm_gpu *gpu)

 static void a4xx_recover(struct msm_gpu *gpu)
 {
+	adreno_dump_info(gpu);
+
 	/* dump registers before resetting gpu, if enabled: */
 	if (hang_debug)
 		a4xx_dump(gpu);
 <at>  <at>  -505,7 +507,6  <at>  <at>  static const unsigned int a4xx_register_offsets[REG_ADRENO_REGISTER_MAX] = {

 static void a4xx_dump(struct msm_gpu *gpu)
 {
-	adreno_dump(gpu);
 	printk("status:   %08x\n",
 			gpu_read(gpu, REG_A4XX_RBBM_STATUS));
 	adreno_dump(gpu);
diff --git a/drivers/gpu/drm/msm/adreno/adreno_gpu.c b/drivers/gpu/drm/msm/adreno/adreno_gpu.c
index 94a5bee..80c4b6c 100644
--- a/drivers/gpu/drm/msm/adreno/adreno_gpu.c
+++ b/drivers/gpu/drm/msm/adreno/adreno_gpu.c
 <at>  <at>  -249,8 +249,13  <at>  <at>  void adreno_show(struct msm_gpu *gpu, struct seq_file *m)
 }
 #endif

-/* would be nice to not have to duplicate the _show() stuff with printk(): */
-void adreno_dump(struct msm_gpu *gpu)
+/* Dump common gpu status and scratch registers on any hang, to make
+ * the hangcheck logs more useful.  The scratch registers seem always
+ * safe to read when GPU has hung (unlike some other regs, depending
+ * on how the GPU hung), and they are useful to match up to cmdstream
+ * dumps when debugging hangs:
+ */
+void adreno_dump_info(struct msm_gpu *gpu)
 {
 	struct adreno_gpu *adreno_gpu = to_adreno_gpu(gpu);
 	int i;
 <at>  <at>  -266,6 +271,18  <at>  <at>  void adreno_dump(struct msm_gpu *gpu)
 	printk("wptr:     %d\n", adreno_gpu->memptrs->wptr);
 	printk("rb wptr:  %d\n", get_wptr(gpu->rb));

+	for (i = 0; i < 8; i++) {
+		printk("CP_SCRATCH_REG%d: %u\n", i,
+			gpu_read(gpu, REG_AXXX_CP_SCRATCH_REG0 + i));
+	}
+}
+
+/* would be nice to not have to duplicate the _show() stuff with printk(): */
+void adreno_dump(struct msm_gpu *gpu)
+{
+	struct adreno_gpu *adreno_gpu = to_adreno_gpu(gpu);
+	int i;
+
 	/* dump these out in a form that can be parsed by demsm: */
 	printk("IO:region %s 00000000 00020000\n", gpu->name);
 	for (i = 0; adreno_gpu->registers[i] != ~0; i += 2) {
diff --git a/drivers/gpu/drm/msm/adreno/adreno_gpu.h b/drivers/gpu/drm/msm/adreno/adreno_gpu.h
index a0cc309..2b6b57b 100644
--- a/drivers/gpu/drm/msm/adreno/adreno_gpu.h
+++ b/drivers/gpu/drm/msm/adreno/adreno_gpu.h
 <at>  <at>  -233,6 +233,7  <at>  <at>  void adreno_idle(struct msm_gpu *gpu);
 #ifdef CONFIG_DEBUG_FS
 void adreno_show(struct msm_gpu *gpu, struct seq_file *m);
 #endif
+void adreno_dump_info(struct msm_gpu *gpu);
 void adreno_dump(struct msm_gpu *gpu);
 void adreno_wait_ring(struct msm_gpu *gpu, uint32_t ndwords);

--

-- 
2.1.0

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Heiko Stübner | 18 Apr 18:29 2015
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[PATCH 1/2] MAINTAINERS: add entry for Rockchip drm drivers

Mark Yao looks after the Rockchip drm drivers and should thus also get
patches touching these.

Signed-off-by: Heiko Stuebner <heiko <at> sntech.de>
---
 MAINTAINERS | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/MAINTAINERS b/MAINTAINERS
index 7687fc6..7e4d386 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
 <at>  <at>  -3410,6 +3410,13  <at>  <at>  F:	drivers/gpu/drm/rcar-du/
 F:	drivers/gpu/drm/shmobile/
 F:	include/linux/platform_data/shmob_drm.h

+DRM DRIVERS FOR ROCKCHIP
+M:	Mark Yao <mark.yao <at> rock-chips.com>
+L:	dri-devel <at> lists.freedesktop.org
+S:	Maintained
+F:	drivers/gpu/drm/rockchip/
+F:	Documentation/devicetree/bindings/video/rockchip*
+
 DSBR100 USB FM RADIO DRIVER
 M:	Alexey Klimov <klimov.linux <at> gmail.com>
 L:	linux-media <at> vger.kernel.org
--

-- 
2.1.4

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Todd Previte | 18 Apr 08:41 2015
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[PATCH 4/5] drm: Fix for DP CTS test 4.2.2.5 - I2C DEFER handling

For test 4.2.2.5 to pass per the Link CTS Core 1.2 rev1.1 spec, the source
device must attempt at least 7 times to read the EDID when it receives an
I2C defer. The normal DRM code makes only 7 retries, regardless of whether
or not the response is a native defer or an I2C defer. Test 4.2.2.5 fails
since there are native defers interspersed with the I2C defers which
results in less than 7 EDID read attempts.

The solution is to add the numer of defers to the retry counter when an I2C
DEFER is returned such that another read attempt will be made. This situation
should normally only occur in compliance testing, however, as a worse case
real-world scenario, it would result in 13 attempts ( 6 native defers, 7 I2C
defers) for a single transaction to complete. The net result is a slightly
slower response to an EDID read that shouldn't significantly impact overall
performance.

V2:
- Added a check on the number of I2C Defers to limit the number
  of times that the retries variable will be decremented. This
  is to address review feedback regarding possible infinite loops
  from misbehaving sink devices.
V3:
- Fixed the limit value to 7 instead of 8 to get the correct retry
  count.
- Combined the increment of the defer count into the if-statement
V4:
- Removed i915 tag from subject as the patch is not i915-specific
V5:
- Updated the for-loop to add the number of i2c defers to the retry
  counter such that the correct number of retry attempts will be
  made

Signed-off-by: Todd Previte <tprevite <at> gmail.com>
Cc: dri-devel <at> lists.freedesktop.org
Reviewed-by: Paulo Zanoni <paulo.r.zanoni <at> intel.com>
---
 drivers/gpu/drm/drm_dp_helper.c | 10 ++++++++--
 1 file changed, 8 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/drm_dp_helper.c b/drivers/gpu/drm/drm_dp_helper.c
index 575172e..80a02a4 100644
--- a/drivers/gpu/drm/drm_dp_helper.c
+++ b/drivers/gpu/drm/drm_dp_helper.c
 <at>  <at>  -432,7 +432,7  <at>  <at>  static u32 drm_dp_i2c_functionality(struct i2c_adapter *adapter)
  */
 static int drm_dp_i2c_do_msg(struct drm_dp_aux *aux, struct drm_dp_aux_msg *msg)
 {
-	unsigned int retry;
+	unsigned int retry, defer_i2c;
 	int ret;

 	/*
 <at>  <at>  -440,7 +440,7  <at>  <at>  static int drm_dp_i2c_do_msg(struct drm_dp_aux *aux, struct drm_dp_aux_msg *msg)
 	 * is required to retry at least seven times upon receiving AUX_DEFER
 	 * before giving up the AUX transaction.
 	 */
-	for (retry = 0; retry < 7; retry++) {
+	for (retry = 0, defer_i2c = 0; retry < (7 + defer_i2c); retry++) {
 		mutex_lock(&aux->hw_mutex);
 		ret = aux->transfer(aux, msg);
 		mutex_unlock(&aux->hw_mutex);
 <at>  <at>  -499,7 +499,13  <at>  <at>  static int drm_dp_i2c_do_msg(struct drm_dp_aux *aux, struct drm_dp_aux_msg *msg)

 		case DP_AUX_I2C_REPLY_DEFER:
 			DRM_DEBUG_KMS("I2C defer\n");
+			/* DP Compliance Test 4.2.2.5 Requirement:
+			 * Must have at least 7 retries for I2C defers on the
+			 * transaction to pass this test
+			 */
 			aux->i2c_defer_count++;
+			if (defer_i2c < 7)
+				defer_i2c++;
 			usleep_range(400, 500);
 			continue;

--

-- 
1.9.1

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