new cgen snapshot available

A new automated cgen source snapshot is available
ftp://sources.redhat.com/pub/cgen/snapshots/cgen-20100801.tar.bz2
1597768 bytes, cgen-snapshot-20100801 tag
See also ftp://sources.redhat.com/pub/cgen/snapshots/

dni format description

Hello,
My name is Petronela, i would like to get more info about the format
field from pmacros. For example the following insn is used in
m32r.cpu:
(dni addx "addx"

     ((PIPE OS) (IDOC ALU))
     "addx $dr,$sr"
     (+ OP1_0 OP2_9 dr sr)
     (parallel ()
               (set dr (addc dr sr condbit))
               (set condbit (add-cflag dr sr condbit)))
     ()

)
What (+ OP1_0 OP2_9 dr sr) means ? OP1_* and OP2_* are defined in the
following way:
(define-normal-insn-enum insn-op1 "insn format enums" () OP1_ f-op1

  ("0" "1" "2" "3" "4" "5" "6" "7"
   "8" "9" "10" "11" "12" "13" "14" "15")

)
(define-normal-insn-enum insn-op2 "op2 enums" () OP2_ f-op2

  ("0" "1" "2" "3" "4" "5" "6" "7"
   "8" "9" "10" "11" "12" "13" "14" "15")

)
My understanding is that destination register is always R0 and source

Re: dni format description

Hi Petronela,

Please post to only one instance of the cgen list, thank you.

On 08/05/2010 10:23 AM, Petronela Agache wrote:
> Hello,
> My name is Petronela, i would like to get more info about the format
> field from pmacros. For example the following insn is used in
> m32r.cpu:
> (dni addx "addx"
> 
>      ((PIPE OS) (IDOC ALU))
>      "addx $dr,$sr"
>      (+ OP1_0 OP2_9 dr sr)
>      (parallel ()
>                (set dr (addc dr sr condbit))
>                (set condbit (add-cflag dr sr condbit)))
>      ()
> 
> )
> What (+ OP1_0 OP2_9 dr sr) means ?

This is the format for this instruction.

It means that this particular instruction has 4 fields, of which 2
(OP1_0 and OP2_9) have a fixed value. It's only the layout of the
instruction, ie. which bits are constant (typically the instruction
opcode) and which are not (instruction operands).

Above the dni macro, you will find definitions for various instruction

-j6 build

So, I have a cgen port and am wondering, is there anyway to speed up the 6 minute build that uses 1 core, to being
a 1 minute build that uses 6 cores?  -j8 didn't seem to do it.

Re: -j6 build

On 08/24/2010 06:33 AM, Mike Stump wrote:
> So, I have a cgen port and am wondering, is there anyway to speed up the 6 minute build that uses 1 core, to
being a 1 minute build that uses 6 cores?  -j8 didn't seem to do it.
> 

FWIW setting CC="ccache gcc" and CFLAGS="-O0 -pipe" at configure time
did wonders for me (in addition to make -jN with N = 2 x number of
cores). Also I issue a single make command for all targets.

See attached makefile, which builds a complete toolchain (binutils, gcc,
newlib, and gcc for newlib).

Binutils (cgen, gas, ld, sim) now build in 36 seconds on my quad core
(44secs user, 34secs sys), with hot caches.

HTH,
JM

# Makefile for the whole bare-metal C toolchain (binutils, gcc, newlib)

# arch name
target ?= xxx
TARGET ?= $(target)-elf

# install dir
DESTDIR = /tmp/$(target)

# build dirs
BUILDROOT = $(HOME)/build/$(target)

[commit] fix nan handling

Hi.

I've committed this.

nan,qnan,snan return a BI mode value, thus using s-unop to generate
them is wrong.

2010-08-30  Doug Evans  <dje <at> sebabeach.org>

	* rtl-c.scm (s-float-predop): New function.
	(nan, qnan, snan): Call it.

Index: rtl-c.scm
===================================================================
RCS file: /cvs/src/src/cgen/rtl-c.scm,v
retrieving revision 1.31
diff -u -p -r1.31 rtl-c.scm
--- rtl-c.scm	25 Jan 2010 03:50:43 -0000	1.31
+++ rtl-c.scm	30 Aug 2010 16:47:24 -0000
 <at>  <at>  -828,6 +828,27  <at>  <at> 
 				"))"))))
 )

+;; Process fp predicates, e.g. nan, qnan, snan.
+;; SRC-MODE is the mode name of SRC.
+;; The result has mode BI.
+
+(define (s-float-predop estate name src-mode src)
+  (let* ((val (rtl-c-get estate src-mode src))
+	 (mode (cx:mode val))