Re: [M-Labs devel] Migen: RTL or Algorithmic?
Sébastien Bourdeauducq <sb@...
2014-04-08 13:52:28 GMT
please note the new mailing list address devel@...
On 04/08/2014 03:36 PM, Khobatha Setetemela wrote:
> Does this imply that the level of abstraction in Migen's FHDL formal
> modelling system is behavioural (algorithmic) and not RTL?
FHDL allows you to describe simple "algorithms", in the sense that you
can have arithmetic/logic operations and conditional structures that
operate on signals and trigger combinatorially or synchronously.
Those algorithms can be easily synthesized to gateware, but FHDL is a
very limited algorithmic language - for example there are no loops.
That's why FHDL can be called "RTL", though it's a slightly confusing name.
FHDL programs ("fragments") can be easily built using a much more
complete and powerful algorithmic language - Python - and that's what
makes the strength of FHDL.
> FHDL models hardware circuits using the notion of combinatorial and
> synchronous statements, and modules. I tend to view it as, in principle,
> still at RTL than algorithmic level.By algorithmic (behavioural)
> generation, C/C++-to-gates such as Xilinx's Vivado HLS and LegUp HLS
> come to mind, not Migen.
Indeed, FHDL is not implementing C/C++/Python/etc. algorithms into
gateware, contrary to those traditional HLS tools.
But Migen contains a module called Pytholite that does this and uses
FHDL as back-end. It's still very limited and far from doing as much as
traditional HLS tools do, but it's conceptually the same idea.