Julius Baxter | 13 Apr 2013 21:48
Picon

Project teleconference, Sunday April 14, 2013

Hi all

We're organising a teleconference tomorrow, Sunday April 14, at 6PM
BST (British summer time). All project users and developers are
invited to join in.

The aim of this is to get updates from people who've been busy
developing, as well hear from newcomers to the project. There's also
some topics for discussion left over from the last meeting, as well as
new ones.

The current plan is to host it on a Google hangout. If you'd like to
listen in, please check your inbox tomorrow for details on how to do
this, or poll this page on OpenCores:
http://opencores.org/or1k/OpenRISC_Project_Meeting#April_14_2013.2C_Teleconference

Most of us will also be in #openrisc on irc.freenode.net - so lurk in
there around the start time and we can support anyone who's having
issues joining up.

If you'd like to discuss something, feel free to go to that wiki page
on OpenCores and list it there.

Apologies for this all being a bit last-minute. This is also the first
time we've done this, so I'm not sure how smoothly it'll go, but
hopefully we can make it a useful exchange. I'm looking forward to
hearing from everyone.

Regarding the time - here's a page with the local start time for some
different time zones:
(Continue reading)

Olof Kindgren | 12 Apr 2013 13:05
Picon

[PATCH]mor1kx : Allow synthesis with synplify pro

From fffc028793250bd944390de599231d6d670e4326 Mon Sep 17 00:00:00 2001
From: Olof Kindgren <olof <at> opencores.org>
Date: Thu, 11 Apr 2013 14:10:11 +0200
Subject: [PATCH] Exclude gpr accessor functions from synthesis

Synplify pro fails when it encounters set_gpr.
---
 rtl/verilog/mor1kx_cpu_cappuccino.v     |    4 ++++
 rtl/verilog/mor1kx_cpu_espresso.v       |    4 ++++
 rtl/verilog/mor1kx_cpu_prontoespresso.v |    4 ++++
 3 files changed, 12 insertions(+), 0 deletions(-)

diff --git a/rtl/verilog/mor1kx_cpu_cappuccino.v b/rtl/verilog/mor1kx_cpu_cappuccino.v
index d5008d2..7c1e003 100644
--- a/rtl/verilog/mor1kx_cpu_cappuccino.v
+++ b/rtl/verilog/mor1kx_cpu_cappuccino.v
<at> <at> -677,6 +677,8 <at> <at> module mor1kx_cpu_cappuccino
       .pipeline_flush_i            (pipeline_flush_o));     // Templated
 
 
+`ifndef SYNTHESIS
+// synthesis translate_off
    /* Debug signals required for the debug monitor */
    function [OPTION_OPERAND_WIDTH-1:0] get_gpr;
       // verilator public
<at> <at> -707,6 +709,8 <at> <at> module mor1kx_cpu_cappuccino
      mor1kx_rf_cappuccino.rfb.ram[gpr_num] = gpr_value;
       end
    endtask
+// synthesis translate_on
+`endif
 
 
    /* mor1kx_execute_ctrl_cappuccino AUTO_TEMPLATE (
diff --git a/rtl/verilog/mor1kx_cpu_espresso.v b/rtl/verilog/mor1kx_cpu_espresso.v
index 149f3a1..f3754ed 100644
--- a/rtl/verilog/mor1kx_cpu_espresso.v
+++ b/rtl/verilog/mor1kx_cpu_espresso.v
<at> <at> -558,6 +558,8 <at> <at> module mor1kx_cpu_espresso
       end
    endfunction
   
+`ifndef SYNTHESIS
+// synthesis translate_off
    task set_gpr;
       // verilator public
       input [4:0] gpr_num;
<at> <at> -567,6 +569,8 <at> <at> module mor1kx_cpu_espresso
      mor1kx_rf_espresso.rfb.ram[gpr_num] = gpr_value;
       end
    endtask
+// synthesis translate_on
+`endif
 
    /* mor1kx_ctrl_espresso AUTO_TEMPLATE (  
     .ctrl_alu_result_i        (alu_result_o),
diff --git a/rtl/verilog/mor1kx_cpu_prontoespresso.v b/rtl/verilog/mor1kx_cpu_prontoespresso.v
index a6c4d97..7ab40f8 100644
--- a/rtl/verilog/mor1kx_cpu_prontoespresso.v
+++ b/rtl/verilog/mor1kx_cpu_prontoespresso.v
<at> <at> -635,6 +635,8 <at> <at> module mor1kx_cpu_prontoespresso
    endfunction //
   
   
+`ifndef SYNTHESIS
+// synthesis translate_off
    task set_gpr;
       // verilator public
       input [4:0] gpr_num;
<at> <at> -644,6 +646,8 <at> <at> module mor1kx_cpu_prontoespresso
      mor1kx_rf_espresso.rfb.ram[gpr_num] = gpr_value;
       end
    endtask
+// synthesis translate_on
+`endif
 
    /* mor1kx_ctrl_prontoespresso AUTO_TEMPLATE (  
     .ctrl_alu_result_i        (alu_result_o),
--
1.7.9


<div><div dir="ltr">From fffc028793250bd944390de599231d6d670e4326 Mon Sep 17 00:00:00 2001<br>From: Olof Kindgren &lt;<a href="mailto:olof <at> opencores.org">olof <at> opencores.org</a>&gt;<br>Date: Thu, 11 Apr 2013 14:10:11 +0200<br>Subject: [PATCH] Exclude gpr accessor functions from synthesis<br><br>Synplify pro fails when it encounters set_gpr.<br>---<br>&nbsp;rtl/verilog/mor1kx_cpu_cappuccino.v&nbsp;&nbsp;&nbsp;&nbsp; |&nbsp;&nbsp;&nbsp; 4 ++++<br>&nbsp;rtl/verilog/mor1kx_cpu_espresso.v&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; |&nbsp;&nbsp;&nbsp; 4 ++++<br>&nbsp;rtl/verilog/mor1kx_cpu_prontoespresso.v |&nbsp;&nbsp;&nbsp; 4 ++++<br>
&nbsp;3 files changed, 12 insertions(+), 0 deletions(-)<br><br>diff --git a/rtl/verilog/mor1kx_cpu_cappuccino.v b/rtl/verilog/mor1kx_cpu_cappuccino.v<br>index d5008d2..7c1e003 100644<br>--- a/rtl/verilog/mor1kx_cpu_cappuccino.v<br>
+++ b/rtl/verilog/mor1kx_cpu_cappuccino.v<br> <at>  <at>  -677,6 +677,8  <at>  <at>  module mor1kx_cpu_cappuccino<br>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; .pipeline_flush_i&nbsp;&nbsp;&nbsp; &nbsp;&nbsp;&nbsp; &nbsp;&nbsp;&nbsp; (pipeline_flush_o));&nbsp;&nbsp;&nbsp; &nbsp;// Templated<br>&nbsp;<br>&nbsp;<br>+`ifndef SYNTHESIS<br>+// synthesis translate_off<br>
&nbsp;&nbsp;&nbsp; /* Debug signals required for the debug monitor */<br>&nbsp;&nbsp;&nbsp; function [OPTION_OPERAND_WIDTH-1:0] get_gpr;<br>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; // verilator public<br> <at>  <at>  -707,6 +709,8  <at>  <at>  module mor1kx_cpu_cappuccino<br>&nbsp;&nbsp;&nbsp;&nbsp; &nbsp;mor1kx_rf_cappuccino.rfb.ram[gpr_num] = gpr_value;<br>
&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; end<br>&nbsp;&nbsp;&nbsp; endtask<br>+// synthesis translate_on<br>+`endif<br>&nbsp;<br>&nbsp;<br>&nbsp;&nbsp;&nbsp; /* mor1kx_execute_ctrl_cappuccino AUTO_TEMPLATE (<br>diff --git a/rtl/verilog/mor1kx_cpu_espresso.v b/rtl/verilog/mor1kx_cpu_espresso.v<br>
index 149f3a1..f3754ed 100644<br>--- a/rtl/verilog/mor1kx_cpu_espresso.v<br>+++ b/rtl/verilog/mor1kx_cpu_espresso.v<br> <at>  <at>  -558,6 +558,8  <at>  <at>  module mor1kx_cpu_espresso<br>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; end<br>&nbsp;&nbsp;&nbsp; endfunction<br>&nbsp;&nbsp;&nbsp; <br>+`ifndef SYNTHESIS<br>
+// synthesis translate_off<br>&nbsp;&nbsp;&nbsp; task set_gpr;<br>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; // verilator public<br>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; input [4:0] gpr_num;<br> <at>  <at>  -567,6 +569,8  <at>  <at>  module mor1kx_cpu_espresso<br>&nbsp;&nbsp;&nbsp;&nbsp; &nbsp;mor1kx_rf_espresso.rfb.ram[gpr_num] = gpr_value;<br>
&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; end<br>&nbsp;&nbsp;&nbsp; endtask<br>+// synthesis translate_on<br>+`endif<br>&nbsp;<br>&nbsp;&nbsp;&nbsp; /* mor1kx_ctrl_espresso AUTO_TEMPLATE (&nbsp;&nbsp; <br>&nbsp;&nbsp;&nbsp;&nbsp; .ctrl_alu_result_i&nbsp;&nbsp;&nbsp; &nbsp;&nbsp;&nbsp; (alu_result_o),<br>diff --git a/rtl/verilog/mor1kx_cpu_prontoespresso.v b/rtl/verilog/mor1kx_cpu_prontoespresso.v<br>
index a6c4d97..7ab40f8 100644<br>--- a/rtl/verilog/mor1kx_cpu_prontoespresso.v<br>+++ b/rtl/verilog/mor1kx_cpu_prontoespresso.v<br> <at>  <at>  -635,6 +635,8  <at>  <at>  module mor1kx_cpu_prontoespresso<br>&nbsp;&nbsp;&nbsp; endfunction //<br>&nbsp;&nbsp;&nbsp; <br>&nbsp;&nbsp;&nbsp; <br>
+`ifndef SYNTHESIS<br>+// synthesis translate_off<br>&nbsp;&nbsp;&nbsp; task set_gpr;<br>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; // verilator public<br>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; input [4:0] gpr_num;<br> <at>  <at>  -644,6 +646,8  <at>  <at>  module mor1kx_cpu_prontoespresso<br>&nbsp;&nbsp;&nbsp;&nbsp; &nbsp;mor1kx_rf_espresso.rfb.ram[gpr_num] = gpr_value;<br>
&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; end<br>&nbsp;&nbsp;&nbsp; endtask<br>+// synthesis translate_on<br>+`endif<br>&nbsp;<br>&nbsp;&nbsp;&nbsp; /* mor1kx_ctrl_prontoespresso AUTO_TEMPLATE (&nbsp;&nbsp; <br>&nbsp;&nbsp;&nbsp;&nbsp; .ctrl_alu_result_i&nbsp;&nbsp;&nbsp; &nbsp;&nbsp;&nbsp; (alu_result_o),<br>-- <br>1.7.9<br><br><br>
</div></div>
Peter Gavin | 4 Apr 2013 21:34
Picon

some patches to or1ksim

Hi guys,

I just pushed some patches to my repo that implement the AECR/AESR bits from the new architecture manual for the arithmetic instructions, as well as a few other small things.  I updated the testsuite to match, everything seems to be working correctly.

Please review :)


-Pete
<div><div dir="ltr">Hi guys,<div><br></div>
<div>I just pushed some patches to my repo that implement the AECR/AESR bits from the new architecture manual for the arithmetic instructions, as well as a few other small things. &nbsp;I updated the testsuite to match, everything seems to be working correctly.</div>
<div><br></div>
<div>Please review :)</div>
<div><br></div>
<div>
<a href="https://github.com/pgavin/or1ksim/commits/or1k-master">https://github.com/pgavin/or1ksim/commits/or1k-master</a><br>
</div>
<div>
<br>
</div>
<div>-Pete</div>
</div></div>
Stefan Kristiansson | 23 Mar 2013 23:54
Picon
Picon
Favicon

Some progress with mor1kx MMUs

Hi all,

Those of you that hang out in the #openrisc irc channel probably knows
that I've spent the last couple of months scratching my head while trying
to put a pair of MMUs into mor1kx-cappuccino and boot up Linux on it.
And now we've came to the point where we have done some progress that
is actually worth mentioning, mor1kx is now able to at least boot Linux
on the de0-nano board and the atlys board (those are the boards I possess).

"Pics or it didn't happen", you might say:
http://www.flickr.com/photos/92201104 <at> N06/8584298474/

This is naturally still very experimental and work in progress and
I'm certain there are more bugs to catch in there too, but everything
has been committed to the usual git repository:
at https://github.com/openrisc/mor1kx
if some experimental soul want to try it out.

Stefan
Stefan Kristiansson | 20 Mar 2013 14:53
Picon
Picon
Favicon

[PATCH] orpsoc/tests: Fix or1200-dsxinsn when caches are not present

This test would go into an endless loop when caches are not present.
---
 sw/tests/or1200/sim/or1200-dsxinsn.S |    7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/sw/tests/or1200/sim/or1200-dsxinsn.S b/sw/tests/or1200/sim/or1200-dsxinsn.S
index 7f36f91..dc3bb23 100644
--- a/sw/tests/or1200/sim/or1200-dsxinsn.S
+++ b/sw/tests/or1200/sim/or1200-dsxinsn.S
 <at>  <at>  -236,6 +236,13  <at>  <at>  _start:
 	/* TODO - track and check the number of TLB misses we should
 	have incurred */
 	
+	/* Check if IC present and skip enabling otherwise */
+	l.mfspr r3,r0,SPR_UPR
+	l.andi  r4,r3,SPR_UPR_ICP
+	l.sfeq  r4,r0
+	l.bf    test_ok
+	l.nop
+	
 	/* Now repeat the tests with caches enabled if they weren't */
 	l.mfspr	r1,r0,SPR_SR
 	l.andi	r1,r1,SPR_SR_ICE
--

-- 
1.7.9.5

Julius Baxter | 15 Mar 2013 12:04
Picon

Project teleconf Q1 2013

Hi all

Is anyone up for a project teleconference call at some point soon?

There's been some good work on the project over the winter, and I'd
like to have people give a summary of what they've been up to. I'd
also like to talk about what is coming up, as well as go to some of
the topics which came up during the project meeting last October about
improving the project organisationally.

I think 45-minutes to an hour would be best in terms of duration.
Regarding the agenda, if people have anything they would like to
mention during the call, please post to the list or email me directly.

What time would work best for people? My proposal is a morning call,
perhaps 7AM GMT (8AM in Sweden, 9AM Finland) or may even an hour
earlier so people can fit it in before heading off to their dayjobs?
We could do this next Friday (22nd of March), or maybe even next
Saturday?

What do we think?

Cheers

Julius
Jeremy Bennett | 13 Mar 2013 16:01
Favicon
Gravatar

ChipHack: Introduction to FPGA Programming, London, 20 & 21 April 2013

Hi all,

Embecosm is pleased to announce Chip Hack (chiphack.org), a two day
hands-on workshop on programming FPGAs aimed at complete beginners. 

Led by a team of experienced FPGA designers, and working with the
DE0-nano board, we'll start with simple hardware designs to control
LED's counters and push buttons and move on to a UART transmitter and
(for the more ambitious) receiver.

The event coincides with Hardware Freedom Day (http://www.hfday.org) and
we'll be using open source designs throughout the weekend. Our final
session will show how to bring up a complete ready-made OpenRISC
system-on-chip, and show where you can look under the hood to learn
more.

No HDL or FPGA programming experience is required, but you will need to
have some programming experience and an understanding of basic digital
electronics.

The workshop is sponsored by Embecosm, and will run at the Centre for
Creative Collaboration in Acton Street, London.

We are particularly keen to encourage school teachers to get involved,
so we giving away a DE0-nano kit to the first 5 who apply. If you are a
teacher and want to step up from Raspberry Pi, this is the workshop for
you.

Numbers are limited, so book early at chiphack.org

Look forward to seeing you there,

Jeremy 

--

-- 
Tel:      +44 (1590) 610184
Cell:     +44 (7970) 676050
SkypeID: jeremybennett
Email:   jeremy.bennett <at> embecosm.com
Web:     www.embecosm.com

Jack Thomasson | 27 Feb 2013 20:58

section memory type=file

i am using or1k-elf (newlib) and needed a way to inject lots of data into or1ksim for regression tests.  on
real but simple hardware i could program a flash memory from a file and test against it many times until my
code passes.  so i figured to emulate this behavior by providing another initialization method for memory
blocks.  the configuration syntax is simple:

section memory
  type = file
  name = "/tmp/FLASH"
  mc = 0
  ce = 3
  baseaddr = 0xe0000000
  size = 0x00400000 /* 4 MB */
  delayr = 1
  delayw = -1
end

enjoy the patch attached.

:{)}
Attachment (memory-file.patch): text/x-patch, 4166 bytes
i am using or1k-elf (newlib) and needed a way to inject lots of data into or1ksim for regression tests.  on
real but simple hardware i could program a flash memory from a file and test against it many times until my
code passes.  so i figured to emulate this behavior by providing another initialization method for memory
blocks.  the configuration syntax is simple:

section memory
  type = file
  name = "/tmp/FLASH"
  mc = 0
  ce = 3
  baseaddr = 0xe0000000
  size = 0x00400000 /* 4 MB */
  delayr = 1
  delayw = -1
end

enjoy the patch attached.

:{)}
Jeremy Bennett | 12 Feb 2013 20:38
Favicon
Gravatar

GCC bugs in bugzilla

There are a number of GCC bugs languishing in bugzilla, which seem by
default to be assigned to me.

I'm not the right person to be handling GCC bugs (I've never done any of
the GCC development - GDB is my speciality).

Anyone volunteer to be the default recipient of GCC bugs?

Thanks,

Jeremy

--

-- 
Tel:      +44 (1590) 610184
Cell:     +44 (7970) 676050
SkypeID: jeremybennett
Email:   jeremy.bennett <at> embecosm.com
Web:     www.embecosm.com

Christian Svensson | 11 Feb 2013 11:30
Picon

Patching config.sub / config.guess

Hello,

Arm64 are in the process of updating packages for their Debian port.
It would probably be a good idea to add or1k at this point to ride the
wave of autoconf updates that will follow.
We discussed this patch a bit on IRC with the following inputs:

1) openrisc-* is an alias for or32
Leave it since openrisc might be used somewhere, rip it out when or1k
is really released and merged upstream.

2) or32-*
Same as 1 although more probable that it's used.

3) or32-* defaults to -coff
Again, people might use this behavior somewhere and it's not important
to change right now.

My plan is to send this patch upstream tomorrow, if you have any
feedback or concerns please voice them! :-)

diff --git a/ChangeLog b/ChangeLog
index c4c558e..83e224c 100644
--- a/ChangeLog
+++ b/ChangeLog
 <at>  <at>  -1,3 +1,10  <at>  <at> 
+2013-02-11  Christian Svensson  <blue <at> cmd.nu>
+
+       * config.guess (or1k:Linux:*:*): New.
+       * config.sub (or1k): Likewise.
+       * testsuite/config-guess.data: Test for or1k:Linux.
+       * testsuite/config-sub.data: Tests for or1k-linux, or1k-elf.
+
 2013-02-04  Ben Elliston  <bje <at> gnu.org>

        * config.guess: Contract the list of copyright years into the
diff --git a/config.guess b/config.guess
index 6ea3454..eb57916 100755
--- a/config.guess
+++ b/config.guess
 <at>  <at>  -956,6 +956,9  <at>  <at>  EOF
     or32:Linux:*:*)
        echo ${UNAME_MACHINE}-unknown-linux-gnu
        exit ;;
+    or1k:Linux:*:*)
+       echo ${UNAME_MACHINE}-unknown-linux-gnu
+       exit ;;
     padre:Linux:*:*)
        echo sparc-unknown-linux-gnu
        exit ;;
diff --git a/config.sub b/config.sub
index 80211d0..0d0d0ab 100755
--- a/config.sub
+++ b/config.sub
 <at>  <at>  -296,7 +296,7  <at>  <at>  case $basic_machine in
        | nios | nios2 | nios2eb | nios2el \
        | ns16k | ns32k \
        | open8 \
-       | or32 \
+       | or1k | or32 \
        | pdp10 | pdp11 | pj | pjl \
        | powerpc | powerpc64 | powerpc64le | powerpcle \
        | pyramid \
 <at>  <at>  -1589,6 +1589,9  <at>  <at>  case $basic_machine in
        mips*-*)
                os=-elf
                ;;
+       or1k-*)
+               os=-elf
+               ;;
        or32-*)
                os=-coff
                ;;
diff --git a/testsuite/config-guess.data b/testsuite/config-guess.data
index 0d18ea6..12c6fbf 100644
--- a/testsuite/config-guess.data
+++ b/testsuite/config-guess.data
 <at>  <at>  -37,6 +37,7  <at>  <at>  NSE-1 1.0                     NONSTOP_KERNEL
ignored nse-tandem-nsk1.0
 NSE-N  1.0                     NONSTOP_KERNEL  ignored nse-tandem-nsk1.0
 NSE-NN 1.0                     NONSTOP_KERNEL  ignored nse-tandem-nsk1.0
 or32   ignored                 Linux           ignored or32-unknown-linux-gnu
+or1k   ignored                 Linux           ignored or1k-unknown-linux-gnu
 padre  2.6.15                  Linux           ignored sparc-unknown-linux-gnu
 pc     1.0                     ignored         ignored i586-pc-msdosdjgpp
 PowerPC        4.2                     LynxOS          ignored
powerpc-unknown-lynxos4.2
diff --git a/testsuite/config-sub.data b/testsuite/config-sub.data
index 379cda6..ba1e9df 100644
--- a/testsuite/config-sub.data
+++ b/testsuite/config-sub.data
 <at>  <at>  -148,6 +148,8  <at>  <at>  open8-elf                   open8-unknown-elf
 open8                          open8-unknown-none
 openrisc-linux                 or32-unknown-linux-gnu
 or32-linux                     or32-unknown-linux-gnu
+or1k-linux                     or1k-unknown-linux-gnu
+or1k-elf                       or1k-unknown-elf
 os400                          powerpc-ibm-os400
 parisc                         hppa-unknown-linux-gnu
 pc98-freebsd                   i386-pc-freebsd

Regards,
Christian Svensson
Franck Jullien | 16 Jan 2013 08:18
Picon
Gravatar

Re: interesting problem with or1ksim

2012/5/11 Peter Gavin <pgavin <at> gmail.com>:
> On Fri, May 11, 2012 at 3:47 PM, Peter Gavin <pgavin <at> gmail.com> wrote:
>> Thanks.  Yeah, I didn't think of using a site.exp.  I was trying to do
>> it just by modifying the files in the gcc source tree.  I wanted it to
>> be automatically used without having to use manual configuration, do
>> you know if that's possible?
>
> Ok, so I figured something that is nearly what I wanted.
>
> I modified dejagnu, and added an or1k-sim.exp file to the baseboards
> directory, and or1k.exp to the config directory.
>
> Then I ran make check in the gcc directory with
> RUNTESTFLAGS=--target_board=or1k-sim and it used the simulator the way
> I wanted.
>
> -Pete
> _______________________________________________
> OpenRISC mailing list
> OpenRISC <at> lists.openrisc.net
> http://lists.openrisc.net/listinfo/openrisc

Hi Peter,

When I run make check in the gdb directory, I get a lot of "ERROR:
Couldn't set target for simulator." is it normal ?
This is what I have for now: http://pastebin.com/haU4ALsg

		=== gdb tests ===

Schedule of variations:
    or1k-sim

Running target or1k-sim
Using /usr/local/share/dejagnu/baseboards/or1k-sim.exp as board
description file for target.
Using /usr/local/share/dejagnu/config/sim.exp as generic interface
file for target.
Using /usr/local/share/dejagnu/baseboards/basic-sim.exp as board
description file for target.
Using ../../../or1k-src_Franck79/gdb/testsuite/config/sim.exp as
tool-and-target-specific interface file.
Running ../../../or1k-src_Franck79/gdb/testsuite/gdb.ada/aliased_array.exp ...
Running ../../../or1k-src_Franck79/gdb/testsuite/gdb.ada/array_bounds.exp ...
.....
Running ../../../or1k-src_Franck79/gdb/testsuite/gdb.ada/info_locals_renaming.exp
...
Running ../../../or1k-src_Franck79/gdb/testsuite/gdb.ada/info_types.exp ...
ERROR: Couldn't set target for simulator.
Running ../../../or1k-src_Franck79/gdb/testsuite/gdb.ada/int_deref.exp ...
Running ../../../or1k-src_Franck79/gdb/testsuite/gdb.ada/interface.exp ...
.......
Running ../../../or1k-src_Franck79/gdb/testsuite/gdb.mi/mi-breakpoint-changed.exp
...
Running ../../../or1k-src_Franck79/gdb/testsuite/gdb.mi/mi-cli.exp ...
ERROR: Unable to select sim target (timeout)
ERROR: Undefined command "-interpreter-exec console "set args foobar"".
FAIL: gdb.mi/mi-cli.exp: -interpreter-exec console "show args"
FAIL: gdb.mi/mi-cli.exp: continue to callee4 (MI error)
FAIL: gdb.mi/mi-cli.exp: continue to callee4 (timeout)
FAIL: gdb.mi/mi-cli.exp: -interpreter-exec console "up"
FAIL: gdb.mi/mi-cli.exp: -interpreter-exec console "down"
FAIL: gdb.mi/mi-cli.exp: -interpreter-exec console "frame 2"
FAIL: gdb.mi/mi-cli.exp: -stack-select-frame 0
FAIL: gdb.mi/mi-cli.exp: check *stopped from CLI command (MI error)
FAIL: gdb.mi/mi-cli.exp: check *stopped from CLI command (timeout)
FAIL: gdb.mi/mi-cli.exp: -exec-continue to line $line_main_hello (MI error)
FAIL: gdb.mi/mi-cli.exp: -exec-continue to line $line_main_hello (timeout)
FAIL: gdb.mi/mi-cli.exp: 34 next: run (the program is no longer running)
FAIL: gdb.mi/mi-cli.exp: 34 next: stop (timeout)
FAIL: gdb.mi/mi-cli.exp: -interpreter-exec console "list" at
basics.c:$line_main_return
FAIL: gdb.mi/mi-cli.exp: -interpreter-exec console "set $pc=0x0"
Running ../../../or1k-src_Franck79/gdb/testsuite/gdb.mi/mi-cmd-param-changed.exp
...
ERROR: Unable to select sim target (timeout)
ERROR: Undefined command "set scheduler-locking on".
FAIL: gdb.mi/mi-cmd-param-changed.exp: cmd param: "set scheduler-locking off"
FAIL: gdb.mi/mi-cmd-param-changed.exp: cmd param: "set scheduler-locking step"
FAIL: gdb.mi/mi-cmd-param-changed.exp: cmd param: interpreter-exec
"set scheduler-locking on"
FAIL: gdb.mi/mi-cmd-param-changed.exp: cmd param: interpreter-exec
"set scheduler-locking off"
FAIL: gdb.mi/mi-cmd-param-changed.exp: cmd param: interpreter-exec
"set scheduler-locking step"
FAIL: gdb.mi/mi-cmd-param-changed.exp: cmd param: "set
scheduler-locking on" no event (requested by MI)
FAIL: gdb.mi/mi-cmd-param-changed.exp: cmd param: "set
scheduler-locking step" no event (requested by MI interp)
FAIL: gdb.mi/mi-cmd-param-changed.exp: cmd param: "set
scheduler-locking stepr" no event
Running ../../../or1k-src_Franck79/gdb/testsuite/gdb.mi/mi-console.exp ...
ERROR: Unable to select sim target (timeout)
ERROR: Undefined command "220-exec-next".
FAIL: gdb.mi/mi-console.exp: finished step over hello (unknown output
after running)
Running ../../../or1k-src_Franck79/gdb/testsuite/gdb.mi/mi-disassemble.exp ...
.....

It's been running for 10 hours......

Franck.

Gmane