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Sean Breheny | 1 May 2011 02:08
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Re: [OT]: Solar panel, battery sizing, calculations check

I think we're saying the same thing. My point is that a fully-depleted
lead acid battery usually will be able to draw more current than the
charger can apply, therefore the beginning of the charge is a constant
current charge at the max that the charger can supply. Even chargers
that can supply 100s of amps usually would not cause a
fully-discharged LA battery to reach the CV voltage right away. Either
the charger or the wires or the interconnects inside the battery are
usually the limiting factor for charge current at low SOC, but that
still results in a CC charge as the fastest way to charge the battery
within this region.

Sean

On Sat, Apr 30, 2011 at 4:15 PM, Dwayne Reid <dwayner@...> wrote:
> At 10:19 AM 4/30/2011, Sean Breheny wrote:
>
>>Why do you say that lead acid does not have a "current then voltage"
>>charging cycle? In my experience, it is quite typical for chargers to
>>apply their maximum current until the lead acid battery reaches some
>>voltage threshold, and then that voltage threshold is held until
>>charge is complete. Better chargers will temperature compensate that
>>CV (constant voltage) setpoint, but still, the overall charge is
>>CC-CV, which is quite similar to what you do with Lithium chemistries.
>
> Flooded Lead-Acid can accept astonishingly-high charge currents
> without being damaged or destroyed.  Most people don't need to charge
> that quickly, so they use a much smaller charger that is then run in
> constant-current mode until the battery terminal voltage reaches the
> appropriate threshold.
>
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RussellMc | 1 May 2011 04:54
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Re: [OT]: Solar panel, battery sizing, calculations check

> I think we're saying the same thing.

If that's what you originally meant then it's quite different from
what is neant by CC in a typical LiIon call, which was the point I was
originally dealing with.

Common or garden [tm] LiIon have a 1C max charge current. Exceeding
this rate substantially tends to lead to a JLLB (Jerry Lee Lewis
Battery) situation. (Great balls of fire).
Lead Acid tends to just die at greater or lesser rates depending on
how the high rate affects the cell. LiFePO4 aretypically rates at 10C
charge and som newer Lithium chemistry variants are claiming around 1
minute charge times. (60*C)

> My point is that a fully-depleted
> lead acid battery usually will be able to draw more current than the
> charger can apply, therefore the beginning of the charge is a constant
> current charge at the max that the charger can supply.

Yes. So its a AC-CV mode (Available current, constant-Voltage) unlike
the CC-CV mode fr LiIon where battery characteritics set both limits.

> Even chargers
> that can supply 100s of amps usually would not cause a
> fully-discharged LA battery to reach the CV voltage right away. Either
> the charger or the wires or the interconnects inside the battery are
> usually the limiting factor for charge current at low SOC, but that
> still results in a CC charge as the fastest way to charge the battery
> within this region.
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Sean Breheny | 1 May 2011 05:17
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Re: [OT]: Solar panel, battery sizing, calculations check

But it seems that the only difference between LA and Lithium Ion in
what you are saying is which piece of equipment requires that the
charge current be limited. Even for lead acid, it may well be that it
is not safe (or good for the life of the battery) to allow it to
charge at the highest current it will accept at the CV point. All of
the battery books I have read, as well as all of the charger
documentation I've seen, refers to typical lead acid charge profile as
CC-CV (they sometimes talk about CC-CV-CC to describe putting in a
fixed fraction of a C at the end to make the tail of the charge curve
more deterministic, to protect against thermal runaway, and to ensure
a controlled amount of overcharge).

Sean

On Sat, Apr 30, 2011 at 10:54 PM, RussellMc <apptechnz@...> wrote:
>> I think we're saying the same thing.
>
> If that's what you originally meant then it's quite different from
> what is neant by CC in a typical LiIon call, which was the point I was
> originally dealing with.
>
> Common or garden [tm] LiIon have a 1C max charge current. Exceeding
> this rate substantially tends to lead to a JLLB (Jerry Lee Lewis
> Battery) situation. (Great balls of fire).
> Lead Acid tends to just die at greater or lesser rates depending on
> how the high rate affects the cell. LiFePO4 aretypically rates at 10C
> charge and som newer Lithium chemistry variants are claiming around 1
> minute charge times. (60*C)
>
>> My point is that a fully-depleted
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Josh Koffman | 1 May 2011 05:30
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[EE] Homebrew Reflow Soldering

Hi all. I'm considering dabbling in some homebrew reflow soldering
techniques. It's something that's intrigued me for awhile and I'd like
to see if I can speed my assembly time versus hand soldering.

The two main methods seem to be toaster oven and electric skillet. I'm
having trouble deciding which way to go. At the moment I'm leaning
towards toaster over as according to some folks you can even do double
sided (http://store.curiousinventor.com/guides/Surface_Mount_Soldering/Solder_Paste_and_Toaster_Oven
just past 3/4 of the way down the page). The Sparkfun guys use an
electric skillet. Their method seems a bit easier, but double sided
would be out.

So I was wondering...has anyone here tried either technique? Any
advice or comments?

Thanks!

Josh
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Herbert Graf | 1 May 2011 05:32
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Re: [EE] Verilog modules

On Sat, 2011-04-30 at 14:35 -0400, V G wrote:
> On Sat, Apr 30, 2011 at 8:19 AM, Herbert Graf <hkgraf@...> wrote:
> 
> > There are two net types in verilog (actually there are more, but to
> > remain safe in the world of compilable code, stick with the following
> > two):
> >
> > wire
> > reg
> >
> 
> Yeah, that's the same thing Pong Chu's book says. It's a pretty good book,
> but still leaves questions.

Such as?

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V G | 1 May 2011 05:41
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Re: [EE] Verilog modules

On Sat, Apr 30, 2011 at 11:32 PM, Herbert Graf <hkgraf@...> wrote:

>  Such as?
>
>
I'll post them when I get to them :)
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Bob Blick | 1 May 2011 05:41

Re: [EE] Homebrew Reflow Soldering


On Sat, 30 Apr 2011 23:30 -0400, "Josh Koffman" wrote:

> The two main methods seem to be toaster oven and electric skillet.
> 
> So I was wondering...has anyone here tried either technique? Any
> advice or comments?

I have done both and found skillet to be easier to monitor and easier on
large electrolytics. But I never used fancy timers on the oven, just a
stopwatch.

And I always use lead-tin.

Bob

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Josh Koffman | 1 May 2011 05:59
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Re: [EE] Homebrew Reflow Soldering

On Sat, Apr 30, 2011 at 11:41 PM, Bob Blick <bobblick@...> wrote:
> I have done both and found skillet to be easier to monitor and easier on
> large electrolytics. But I never used fancy timers on the oven, just a
> stopwatch.

I wasn't planning on using anything fancy, at least not to begin with.
Someday it might be nice to have a proper ramp/soak controller on the
toaster, but I'd like to try it a few times before sinking more money
into it.

The board I'm looking to try this on has a 28 pin SSOP PIC, some 0603
components, an 0805 cap, and a few SMT resistor networks on the top.
The bottom has a couple different style SMT diodes, a couple SMT
resistor networks and a 5x7mm oscillator module. I ran out of space on
the top of the board, hence the bottom components. I'd love to be able
to reflow both sides, but I designed it so I could hand assemble the
bottom without too much trouble. That's why I was leaning towards
toaster.

> And I always use lead-tin.

Me too.

Thanks!

Josh
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Oli Glaser | 1 May 2011 06:31

Re: [EE] Verilog modules

On 30/04/2011 19:34, V G wrote:
>   But I don't understand what a "reg" does and
> what it really does inside the chip.

A reg is short for register, e.g. a place to store bits, usually one or 
more D type flip-flops.
This is the basis of sequential (as opposed to combinational) designs 
(if your knowledge of digital design is rusty, read a book on it, you 
need to know this stuff well for FPGAs)
When you compile your design, have a look at the "schematic" in ModelSim 
(or whatever Xilinx uses)
This is a graphical representation of your design.
You will be able to see what different verilog constructs turn into on 
the chip. I found this quite useful for getting the hang of visualising 
what my Verilog is doing, and when to use what construct.
Try and keep it reasonably simple though, otherwise it will be difficult 
to read easily. You might be surprised what a couple of statements can 
turn into.
Try things like seeing what an addition of two registers becomes, and 
compare a case statement to an if else statement. Pong Chu's book goes 
into things like priority routing and much more, so it should all make 
sense soon enough if you keep at it.

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V G | 1 May 2011 07:54
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Re: [EE] Verilog modules

On Sun, May 1, 2011 at 12:31 AM, Oli Glaser <oli.glaser@...> wrote:

> When you compile your design, have a look at the "schematic" in ModelSim
> (or whatever Xilinx uses)
> This is a graphical representation of your design.
>

Thanks. I didn't know this was possible. This should help a lot.
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