Yao Qi | 1 Aug 2010 10:36
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[PATCH, ARM] Fix PR45094

This patch fixes generated wrong instructions reported in PR45094,
which is caused by typo.

Tested on arm-unknown-linux-gnueabi, fixes the new test.

OK for mainline?

ChangeLog:
gcc/
	PR target/45094
	* config/arm/arm.c (output_move_double): Fix typo generating 
	instructions ('ldr'->'str').

gcc/testsuite/

	PR target/45094
	* gcc.target/arm/pr45094.c: New test.

--

-- 
Yao Qi
CodeSourcery
yao <at> codesourcery.com
(650) 331-3385 x739
Attachment (pr45094.patch): text/x-diff, 1598 bytes
Ian Lance Taylor | 1 Aug 2010 12:20
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[gccgo] Use __go_thread_ids_lock to lock mcache alloc and free

There is no lock on the FixAlloc used to allocate and free mcache
structures.  With this patch, we use __go_thread_ids_lock as a lock for
it.  This also fixes the problem of accessing the mcache field of an M
structure which has been freed by the garbage collector after the thread
has been taken off the list of all threads.  Committed to gccgo branch.

Ian

Attachment (foo.patch): text/x-diff, 1550 bytes
Ian Lance Taylor | 1 Aug 2010 12:28
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[gccgo] Register all global variables explicitly

This patch changes libgo to use an explicit list of global variables
defined in Go which may contain pointers, rather than scanning the
entire data section of the executable.  Each package registers its own
list of variables.  This has the advantage of only scanning variables
for imported packages in libgo, rather than all packages.  This also
removes the changes to crtstuff.c I added to support finding the data
section at runtime.  Committed to gccgo branch.

Ian

Attachment (foo.patch): text/x-diff, 14 KiB
Uros Bizjak | 1 Aug 2010 12:40
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[PATCH, i386]: Fix PR target/45142, split for *vec_set<mode>_0_sse2 incomplete

Hello!

We should also split V4SI operands in addition to V4SF.

2010-08-01  Uros Bizjak  <ubizjak <at> gmail.com>

	PR target/45142
	* config/i386/sse.md (vec_set<mode>_0): Do not set mode attribute for
	alternative 2.
	(vec_set<moode>_0 splitter): Use SSEMODE4S mode iterator to also
	split V4SI operands.

(There is no testcase, since the failure happens only with
non-released patch from vector-enhancement GSoC project, see PR).

Bootstrapped and regression tested on x86_64-pc-linux-gnu {,-m32}.
Also tested with the vector enhancement patch, where the patch fixes
reported failure. Patch was committed to mainline SVN.

Uros.
Index: config/i386/sse.md
===================================================================
--- config/i386/sse.md	(revision 162744)
+++ config/i386/sse.md	(working copy)
 <at>  <at>  -4040,7 +4040,7  <at>  <at> 
    movss\t{%2, %0|%0, %2}
    #"
   [(set_attr "type" "ssemov")
(Continue reading)

Richard Guenther | 1 Aug 2010 14:05
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Re: [PATCH 3/3] Add -ftree-loop-distribute-patterns.

On Sat, Jul 31, 2010 at 5:30 PM, Sebastian Pop <sebpop <at> gmail.com> wrote:
> I forgot this part in the patch below:

I thought of renaming -ftree-loop-distribute-memset-zero to
-ftree-loop-distribute-patterns, not adding an unused option.

Richard.

> diff --git a/gcc/tree-loop-distribution.c b/gcc/tree-loop-distribution.c
> index c677ecb..34d6e21 100644
> --- a/gcc/tree-loop-distribution.c
> +++ b/gcc/tree-loop-distribution.c
>  <at>  <at>  -1237,7 +1237,8  <at>  <at>  static bool
>  gate_tree_loop_distribution (void)
>  {
>   return flag_tree_loop_distribution
> -    || flag_tree_loop_distribute_memset_zero;
> +    || flag_tree_loop_distribute_memset_zero
> +    || flag_tree_loop_distribute_patterns;
>  }
>
>  struct gimple_opt_pass pass_loop_distribution =
>
>
> On Sat, Jul 31, 2010 at 10:27, Sebastian Pop <sebpop <at> gmail.com> wrote:
>> ---
>>  gcc/common.opt               |    4 ++++
>>  gcc/doc/invoke.texi          |    5 +++++
>>  gcc/tree-loop-distribution.c |    3 ++-
>>  3 files changed, 11 insertions(+), 1 deletions(-)
(Continue reading)

Richard Guenther | 1 Aug 2010 14:10
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Re: [PATCH 0/2] Loop distribution for memset zero

On Sat, Jul 31, 2010 at 6:55 PM, Sebastian Pop <sebpop <at> gmail.com> wrote:
> On Sat, Jul 31, 2010 at 11:43, Michael Matz <matz <at> suse.de> wrote:
>> Some math libraries (the one from AMD at least for instance) provide not
>> only vectorized intrinsics for a fixed vector size (e.g. 4 float
>> elements), but also for a generic arbitrarily sized array.
>> For instance:
>>
>>  void vrsa_expf(int n, float *src, float *dest);
>>
>> is equivalent to:
>>
>>  for (i = 0; i < n; i++)
>>    dest[i] = expf (src[i]);
>>
>
> I see.  I think it would not be difficult to detect this kind of
> pattern as well.
>
> I would need some help on the code generation part, as I don't know
> how to generate the calls.  For the memset and memcpy we have
> BUILT_IN_MEMSET and BUILT_IN_MEMCPY.  How should I
> generate code for the vrsa_expf function?

Conditional on -mveclibabi=acml you simply assume the availability
and ABI of acml (you need to build a function type and decl, look
at ix86_veclibabi_acml in i386.c).

Richard.

> Thanks,
(Continue reading)

Richard Guenther | 1 Aug 2010 14:19
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Re: [PATCH 0/2] Loop distribution for memset zero

On Sat, Jul 31, 2010 at 5:00 PM, Sebastian Pop <sebpop <at> gmail.com> wrote:
> On Sat, Jul 31, 2010 at 05:01, Richard Guenther
> <richard.guenther <at> gmail.com> wrote:
>> The new pass should be disabled when loop-distribution is enabled, no?
>> Thus, I think it would make more sense to fold it into the existing pass
>> which then runs in different modes depending on the flags used.
>
> I will do that and resubmit the patch.
>
>>
>> The flag should be named more general, like -ftree-loop-distribute-patterns
>
> What about adding both -ftree-loop-distribute-patterns and
> -ftree-loop-distribute-memset-zero, such that we can control what
> patterns are detected, and to enable all these patterns together we'll
> have -ftree-loop-distribute-patterns.

Hm.  I don't like inflation of command-line arguments too much, but
it might make sense ...

>> as we probably want to add memcpy or array sin/cos operations as well
>> here.
>
> I can imagine the memcpy pattern, but could you please provide an
> example for sin/cos patterns?

See other responses.  Can we detect for eample daxpy?

for (i=0; i<n; ++i)
  dy[i] = dy[i] + da * dx[i];
(Continue reading)

Ian Lance Taylor | 1 Aug 2010 14:25
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[gccgo] s/TARGET_SUPPORTS_SPLIT_STACK/TARGET_CAN_SPLIT_STACK/

I managed to not notice that TARGET_SUPPORTS_SPLIT_STACK is already
defined, in target-def.h.  This changes the i386 backend to define
TARGET_CAN_SPLIT_STACK instead.  Committed to gccgo branch.

Ian

Attachment (foo.patch): text/x-diff, 886 bytes
Ian Lance Taylor | 1 Aug 2010 14:28
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[gccgo] Check TARGET_CAN_SPLIT_STACK

This fixes the gccgo frontend to check TARGET_CAN_SPLIT_STACK rather
than TARGET_SUPPORTS_SPLIT_STACK, since the latter is always defined.
Committed to gccgo branch.

Ian

Attachment (foo.patch): text/x-diff, 384 bytes
John Tytgat | 1 Aug 2010 14:43

Re: [PATCH, ARM] Fix PR45094

In message <20100801083614.GA2569 <at> qiyaows>
          Yao Qi <yao <at> codesourcery.com> wrote:

> This patch fixes generated wrong instructions reported in PR45094,
> which is caused by typo.
> 
> Tested on arm-unknown-linux-gnueabi, fixes the new test.
> [...]

> Index: config/arm/arm.c
> ===================================================================
> --- config/arm/arm.c	(revision 162792)
> +++ config/arm/arm.c	(working copy)
>  <at>  <at>  -12570,13 +12570,13  <at>  <at> 
>  	    {
>  	      if (GET_CODE (XEXP (operands[0], 0)) == PRE_MODIFY)
>  		{
> -		  output_asm_insn ("ldr%?\t%0, [%1, %2]!", otherops);
> -		  output_asm_insn ("ldr%?\t%H0, [%1, #4]", otherops);
> +		  output_asm_insn ("str%?\t%0, [%1, %2]!", otherops);
> +		  output_asm_insn ("strr%?\t%H0, [%1, #4]", otherops);
                                      ^^^

Typo (one 'r') ?

>  		}
>  	      else
>  		{
> -		  output_asm_insn ("ldr%?\t%H0, [%1, #4]", otherops);
> -		  output_asm_insn ("ldr%?\t%0, [%1], %2", otherops);
(Continue reading)


Gmane