Blue Swirl | 1 Mar 13:07 2008

TCG: register survival outside basic block


I'd like to use TCG for the remaining Sparc ops, the attached patch
converts addcc for Sparc32. But I have a problem with register
handling. I'd like to use some registers across basic blocks, but
currently they get eliminated like tmp0 and tmp3 below. Is it possible
to add some kind of register locking to prevent this? Or would you
have other suggestions?

0xffd0ea84:  addcc  %i1, %g3, %i1

 ld_i64 tmp1,env,$0x20
 ld_i32 T0,tmp1,$0x44
 ld_i32 T1,env,$0xc
 mov_i32 tmp0,T0
 add_i32 T0,T0,T1
 movi_i32 tmp2,$0x0
 mov_i32 tmp3,tmp2
 brcond_i32 T0,tmp2,$0x1,$0x0
 movi_i32 tmp3,$0x400000
 set_label $0x0
 brcond_i32 T0,tmp2,$0x3,$0x1
 or_i32 tmp3,tmp3,$0x800000
 set_label $0x1
 st_i32 tmp3,env,$0xb4
 brcond_i32 T0,tmp0,$0x7,$0x2
 ld_i32 tmp5,env,$0xb4
 or_i32 tmp5,tmp5,$0x100000
(Continue reading)

Clemens Kolbitsch | 1 Mar 13:34 2008

Re: Re: Atheros Wireless Device Emulation

On Friday 29 February 2008 19:22:53 Sylvain Petreolle wrote:
> Look at pci.c.rej.
> Because of the lines of the recent e1000 pci card inclusion,
> patch refuses to apply it.
> Its just a matter of resynch...

Now I got it ;-)

This one (
is for the current CVS version. Do we have writing access to the CVS?? Since I 
doubt it, could someone apply the patch (in case you think it is good 
enough ;-) )

Some more infos on the wlan emulation:
 - if you cannot connect to the router (happens to me sometimes with windows 
guests), simply cancel connecting and retry
 - i experienced problems when getting a dynamic ip from qemu (dhcp) when 
using multiple NICs. Simply disable all other NICs and it always worked for 
me or use static IPs.
 - Inbound connections still buggy
 - Still does not work with current CVS of Madwifi drivers. Use MadWifi 0.9.3 
(and don't forget to use the _linux_ model type as explained in previous 
 - I just tried the patch and got a "qemu: fatal: triple fault" ... i 
restarted qemu and everything worked fine. either there is still a major bug 
in my code, or the snapshots inside my image were a little messed up.

Have fun with the code ;-)

(Continue reading)

Edgar E. Iglesias | 1 Mar 18:25 2008

qemu hw/etraxfs_ser.c hw/etraxfs_timer.c target...

CVSROOT:	/sources/qemu
Module name:	qemu
Changes by:	Edgar E. Iglesias <edgar_igl>	08/03/01 17:25:33

Modified files:
	hw             : etraxfs_ser.c etraxfs_timer.c 
	target-cris    : helper.c op.c 

Log message:
	* target-cris/op.c: Make sure the bit-test insn only updates the XNZ flags.
	* target-cris/helper.c: Update ERP for user-mode simulation aswell.
	* hw/etraxfs_timer.c: Support multiple timers.
	* hw/etraxfs_ser.c: Multiple ports, the data just goes to stdout.


Edgar E. Iglesias | 1 Mar 19:50 2008

qemu/tests/cris check_btst.s

CVSROOT:	/sources/qemu
Module name:	qemu
Changes by:	Edgar E. Iglesias <edgar_igl>	08/03/01 18:50:55

Modified files:
	tests/cris     : check_btst.s 

Log message:
	Add test-case for btst CCS flags updates.


Arnon Gilboa | 1 Mar 22:05 2008

RE: [kvm-devel] [PATCH] USB 2.0 EHCI emulation

Can you give me some details about the device? 

-----Original Message-----
From: <at>
[ <at>] On Behalf Of
Gerb Stralko
Sent: Friday, February 29, 2008 4:17 PM
To: Arnon Gilboa
Cc: kvm-devel <at>; qemu-devel <at>
Subject: Re: [kvm-devel] [Qemu-devel] [PATCH] USB 2.0 EHCI emulation

On Fri, Feb 29, 2008 at 2:33 AM, Arnon Gilboa
<arnon.gilboa <at>> wrote:
> In hw/pc.c, replace usb_uhci_piix3_init(pci_bus, piix3_devfn + 2);  
> With usb_ehci_init(pci_bus, piix3_devfn + 2);

With these changes.. I can't add the usb devices anymore to a Windows XP
(32 bit).

This is the command i use to start kvm:
/usr/local/bin/kvm/qemu-system-x86_64 -localtime -m 512 -usb -hda

To add usb device i normally go to the qemu console and type:
info usbhost
<find the number for my device i want to connect to> usb_add

But with your patch, when i try to add a usb device i get:
Could not add 'USB device host:03f0:01cda'
(Continue reading)

Edgar E. Iglesias | 1 Mar 23:23 2008

qemu configure tests/Makefile tests/test-mmap.c

CVSROOT:	/sources/qemu
Module name:	qemu
Changes by:	Edgar E. Iglesias <edgar_igl>	08/03/01 22:23:17

Modified files:
	.              : configure 
	tests          : Makefile 
Added files:
	tests          : test-mmap.c 

Log message:
	Add a tests for user-mode mmap


Hervé Poussineau | 1 Mar 23:43 2008

[PATCH] Let ESP SCSI adapter to be usable outside sun4m (v2)


At the moment, ESP SCSI adapter can only be used inside sun4m machines.

Attached patch moves the declaration outside sun4m.h, so other machines 
can also use it. Declaration has been added to a new file scsi.h.
As Blue Swirl suggested, DMA access functions are sent to the init function.

RCS file: /sources/qemu/qemu/,v
retrieving revision 1.246
diff -u -r1.246
---	27 Feb 2008 17:53:27 -0000	1.246
+++	1 Mar 2008 22:03:35 -0000
 <at>  <at>  -514,7 +514,7  <at>  <at> 

 # SCSI layer
-OBJS+= lsi53c895a.o
+OBJS+= lsi53c895a.o esp.o

 # USB layer
 OBJS+= usb-ohci.o
 <at>  <at>  -576,7 +576,7  <at>  <at> 
 OBJS+= cirrus_vga.o parallel.o ptimer.o
(Continue reading)

Blue Swirl | 2 Mar 09:48 2008

qemu hw/esp.c hw/sun4m.c hw/sun...

CVSROOT:	/cvsroot/qemu
Module name:	qemu
Changes by:	Blue Swirl <blueswir1>	08/03/02 08:48:47

Modified files:
	.              : 
	hw             : esp.c sun4m.c sun4m.h 
Added files:
	hw             : scsi.h 

Log message:
	Let ESP SCSI adapter to be usable outside sun4m (Hervé Poussineau)


Aurelien Jarno | 2 Mar 14:39 2008

[PATCH] GT64XXX: fix endianness issues

The GT64XXX code has some endianness issues on big endian as shown by
  00:00.0 Network and computing encryption device: Unknown device 2046:ab11 (rev 06)
  00:0a.0 ISA bridge: Intel Corporation 82371AB/EB/MB PIIX4 ISA

The first device ID is obviously wrong.

This patch attempts to fix endianness issues:
- Byte swapping for internal GT64XXX registers is controlled by the bit
  12 of the Configuration Register and not by the PCI Internal Command
- The bit 0 of the PCI Internal Command register controls byte swapping
  for PCI access *except for the internal PCI device*, that is when both
  bus and device numbers are 0.

PCI access is now done directly via pci_data_read/write and not via
pci_host_data_readl/writel as the later functions assume that the host
always handle PCI data in its own endianness.

Signed-off-by: Aurelien Jarno <aurelien <at>>
 hw/gt64xxx.c |   19 ++++++++++++++-----
 1 files changed, 14 insertions(+), 5 deletions(-)

diff --git a/hw/gt64xxx.c b/hw/gt64xxx.c
index 46d6a76..8e8adad 100644
--- a/hw/gt64xxx.c
+++ b/hw/gt64xxx.c
 <at>  <at>  -309,7 +309,7  <at>  <at>  static void gt64120_writel (void *opaque, target_phys_addr_t addr,
(Continue reading)

Blue Swirl | 2 Mar 19:20 2008

qemu/tcg tcg-op.h

CVSROOT:	/cvsroot/qemu
Module name:	qemu
Changes by:	Blue Swirl <blueswir1>	08/03/02 18:20:59

Modified files:
	tcg            : tcg-op.h 

Log message:
	 Add brcond_tl