Abbas Fairouz | 12 Feb 21:05 2016
Picon

Add new x86 instruction, NOT pseudo instruction.

Hi dear,

Can I extend x86 by adding new instruction to it?

If so, how can I do it?

--

--------------------
Best regards,
Abbas Fairouz
--------------------
_______________________________________________
gem5-users mailing list
gem5-users <at> gem5.org
http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users
Abbas Fairouz | 11 Feb 22:42 2016
Picon

Add new Functional Unit to x86

Hi,  

First of all, Where can I find the implementation code for each Function Unit of x86? (i.e. IntAlu functional unit)  

I am trying to ass new Functional Unit that run new customised instructions. Is there a way to create new Functional Unit in x86? Which file(s) should handle all Functional Units?

--

--------------------
Best regards,
Abbas Fairouz
--------------------
_______________________________________________
gem5-users mailing list
gem5-users <at> gem5.org
http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users
Timothy Chong | 11 Feb 15:47 2016

Knowing when the system is about to end.

Hello everyone,

I’m wondering if there’s a way inside the ruby system (or the normal system) to know if the system is in
the process of ending.

For example, inside ruby system there is a variable, « m_cooldown_enabled », I found that this variable
is set to true when the system’s in the state after writing a checkpoint. However, I found that this
variable is not set to true, when the system is ending due to —relative-max-tick or those kind of parameters.

Is there another variable that I can check that works for both cases?

Thank you,
Timothy Chong
_______________________________________________
gem5-users mailing list
gem5-users <at> gem5.org
http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users
Panayiotis Englezakis | 10 Feb 20:43 2016

Cannot run ruby network test

Dear all,

I am trying to run the example of Ruby using gem5. I am trying to run nothing more than the example as shown in
the wiki.
http://www.m5sim.org/Ruby_Network_Test

I compile with:

scons build/ALPHA_Network_test/gem5.debug

And I run with:

./build/ALPHA_Network_test/gem5.debug configs/example/ruby_network_test.py  \  
 --num-cpus=16 --num-dirs=16 --topology=Mesh --mesh-rows=4  \ 
 --sim-cycles=1000 \  
 --injectionrate=0.01 \  
 --synthetic=0 \  
 --fixed-pkts \  
 --maxpackets=1 \  
 --garnet-network=fixed

The simulation never finishes and it crashes with the following message:

panic: Cannot test intersection of [0 : 0x1ffffffff], [9 : 6] XOR [23 : 20] = 0 and [0 : 0x7ffffff]
  <at>  tick 0
[intersects:build/ALPHA_Network_test/base/addr_range.hh, line 304]
Memory Usage: 103624 KBytes
Program aborted at cycle 0

I tried to update in order to solve the problem but to no avail. I also noticed that other users had the same problem.

Any thoughts?

Thanks,
Panayiotis Englezakis
_______________________________________________
gem5-users mailing list
gem5-users <at> gem5.org
http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users
Felipe Rocha da Rosa | 10 Feb 19:31 2016
Picon

Checkpoint in detailed cpu causing error

<!-- .hmmessage P { margin:0px; padding:0px } body.hmmessage { font-size: 12pt; font-family:Calibri } -->
Hi!

I'm trying to execute several slightly different executions of the same application using the Detailed (DerivO3CPU) CPU mode and compare then. For the purpose, my idea was executing the application and create a checkpoint at the end. However, the checkpoint is never complete. I trace the cause to the drain function in gem5-stable/src/python/m5/simulate.py, where the simulator is called again and so remaining in the loop forever. My question is if I can comment/change this line and do not perform the drain() without changing the final results.


def drain(root):
    # Try to drain all objects. Draining might not be completed unless
    # all objects return that they are drained on the first call. This
    # is because as objects drain they may cause other objects to no
    # longer be drained.
    def _drain():
        all_drained = False
        dm = internal.drain.createDrainManager()
        unready_objs = sum(obj.drain(dm) for obj in root.descendants())
        # If we've got some objects that can't drain immediately, then simulate
        if unready_objs > 0:
            dm.setCount(unready_objs)
            #WARNING: if a valid exit event occurs while draining, it will not
            # get returned to the user script
            exit_event = simulate()
            while exit_event.getCause() != 'Finished drain':
                exit_event = simulate()
        else:
            all_drained = True
        internal.drain.cleanupDrainManager(dm)
        return all_drained

    all_drained = _drain()
    while (not all_drained):
        all_drained = _drain()

def checkpoint(dir):
    root = objects.Root.getInstance()
    if not isinstance(root, objects.Root):
        raise TypeError, "Checkpoint must be called on a root object."
    drain(root)
    memWriteback(root)
    print "Writing checkpoint"
    internal.core.serializeAll(dir)
    resume(root)

Command:
./build/ARM/gem5.opt ./configs/example/se.py  -c queens -o 10 --cpu-type=detailed --caches --l1i_size=32kB --l1i_assoc=4 --l1d_size=32kB --l1d_assoc=4  --l2_size=512kB --l2_assoc=8 --checkpoint-at-end

Thanks in advance!

Best regards, 
Felipe Rocha da Rosa
_______________________________________________
gem5-users mailing list
gem5-users <at> gem5.org
http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users
Zuhal Öztürk | 10 Feb 17:02 2016
Picon

Data Location

Hi all,

I'm working on a project and try to detect where a specific application data stores in the cache.
How can I view location of the data?


Thanks in advance!
Zuhal Ozturk
_______________________________________________
gem5-users mailing list
gem5-users <at> gem5.org
http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users
minopold@alice.it | 10 Feb 15:18 2016
Picon

HDLCD driver availability for gem5

Hi all,

I've read in the changeset note "dev, arm: Disable R/B swap in HDLCD by default" at url: http://repo.gem5.org/gem5/rev/2d5d847aab27 that the HDLCD model used by gem5 has been changed in the last december in order to adapt it to the new version of hdlcd driver.
Is it available a version of HDLCD driver or a version of linux kernel that contains it,  capable to run on gem5 simulator, that is newer than the one available on https://github.com/gem5 (20150122) ? Is it compatible with armv8 architetcure?

Thanks

Dionisio

_______________________________________________
gem5-users mailing list
gem5-users <at> gem5.org
http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users
tod | 10 Feb 13:18 2016
Picon

Selecting ARM CPU model

Hi,


This (http://pages.cs.wisc.edu/~markhill/cs757/Spring2012/includes/isca_pres_2011.pdf) documentation describes CPU models as:


Simple CPUs

Two Types: AtomicSimpleCPU and TimingSimpleCPU 


Detailed CPUs 

Two Types: InOrderCPU and O3CPU


While the simulator gave me the options as: 


choose from 'arm_detailed', 'AtomicSimpleCPU', 'DerivO3CPU', 'TimingSimpleCPU', 'timing', 'detailed', 'atomic'


So, which one corresponds to what*? 


*Except AtomicSimpleCPU and TimingSimpleCPU, which are having the same names in the simulator too.


Regards,

Tod

_______________________________________________
gem5-users mailing list
gem5-users <at> gem5.org
http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users
minopold@alice.it | 8 Feb 11:48 2016
Picon

Android Full System simulation for ARMv8 architecture

Hi all and maintainers,

I'm interested to run a Full System simulation with android Lollipop/Marshmallow on VExpress_EMM64 in gem5 in order to use more than 4GBs of main memory.

I know that android is not able to boot without a display support (SurfaceFlinger process requires the frambuffer and tries to open it undefinetly during android boot generating an unbreakable loop).

The last available version of kernel for aarch64 gem5 downloaded from https://github.com/gem5/linux-arm64-gem5/tags (20150122) doesn't contain a driver for hdlcd, then it is not usable for my goal.

I'm trying to use the last kernel version (4.3.0) from

git://git.linaro.org/kernel/linux-linaro-tracking.git

that contains hdlcd support for juno board, but the hdlcd driver doesn't work properly on gem5 VExpress_EMM64.

Are you planning to release soon a new kernel version for arm64 on gem5 that supports hdlcd usable with 64bit android images?

More generally, are you planning to support soon a Full System simulation with Android on ARMv8 architecture?


Thanks

Dionisio
_______________________________________________
gem5-users mailing list
gem5-users <at> gem5.org
http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users
Gongjin Sun | 8 Feb 01:04 2016
Picon

About UpgradeReq and write hit

Hi All,

Does any know the function of the request called "UpgradeReq"?  Under what circumstance will this request be generated? After this request is sent to other cache levels, what will happen to that level? There are so few comments about it. Accord to its use, I guess it is related to write miss. But I'm not sure about the specific functions.

In addition, I noticed that when a "write hit" happens in a cache level, this cache will NOT send an invalidate message to its lower levels (closer to mem) to invalidate this line's other copies. Is that correct? (Note: now this cache's upper level (closer to cpu) definitely doesn't contain this line, otherwise there must a write hit in that upper level rather than this cache level.)

Thank you in advance

Best
gjins
_______________________________________________
gem5-users mailing list
gem5-users <at> gem5.org
http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users
Ayaz Akram | 7 Feb 19:46 2016
Picon

Gem5 inside Gem5

I am trying to run gem5 binary inside gem5 in FS mode. The gem5 binary which is running inside the simulated system crashes with the error : "terminate called after throwing an instance of 'std::bad_alloc' " . I have increased the mem-size from 4 GB to 16 GB, but i am getting the same issue. Can anyone point what I am missing here ?

Thanks
_______________________________________________
gem5-users mailing list
gem5-users <at> gem5.org
http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users

Gmane