Energy and Power

Hi everyone!

I would like to know how to get energy/power results from gem5 using Ruby Mem System and Garnet.

I already know McPAT, that was useful when using Classic Mem System, but with Garnet, I don't know how to use it.

Is Orion still working?

Have a nice weekend!

FS mode with 03CPU withtout caches

Hi, all!

I want to remove the caches from the full system configuration. I want 
multiple processors that are directly connected to the membus and the 
memory. As far as I saw the O3CPU demands caches, why? I managed to modify 
the function request_caches from True to False. I managed to instantiate 
all the objects without errors but Gem5 freezes up at the very beginning:

Entering event queue  <at>  0.  Starting simulation...

Any ideas.

Thanks so much

Problem with

Hi all,
after I compile gem5 by this command:
scons PROTOCOL=MESI_CMP_directory build/ALPHA/gem5.opt
I wanted to build it by:build/ALPHA/gem5.opt configs/example/ -n 4 --ruby --cpu-clock=1GHz --caches --l1i_size=16KB --l1i_assoc=2 --l1d_size=16KB --l1d_assoc=2 --l2cache --l2_size=512KB --l2_assoc=8 --mem-type=lpddr2_s4_1066_x32 --mem-size=512M
but I found is removed.
then i decided to build it by:
build/ALPHA/gem5.opt configs/example/ -n 4 --ruby --cpu-clock=1GHz --caches --l1i_size=16KB --l1i_assoc=2 --l1d_size=16KB --l1d_assoc=2 --l2cache --l2_size=512KB --l2_assoc=8 --mem-type=lpddr2_s4_1066_x32 --mem-size=512M

but I face this error:
Error: could not create sytem for ruby protocol MOESI_CMP_directory
Traceback (most recent call last):
  File "<string>", line 1, in <module>
  File "/home/sahar/gem5/src/python/m5/", line 388, in main
    exec filecode in scope
  File "configs/example/", line 297, in <module>
    test_sys = build_test_system(np)
  File "configs/example/", line 139, in build_test_system
  File "/home/sahar/gem5/configs/ruby/", line 191, in create_system
    % protocol)
  File "<string>", line 1, in <module>
  File "/home/sahar/gem5/configs/ruby/", line 83, in create_system
    is_icache = True)
  File "/home/sahar/gem5/src/python/m5/", line 1044, in __init__
    setattr(self, key, val)
  File "/home/sahar/gem5/src/python/m5/", line 1122, in __setattr__
    value = param.convert(value)
  File "/home/sahar/gem5/src/python/m5/", line 212, in convert
    return self.ptype(value)
  File "/home/sahar/gem5/src/python/m5/", line 677, in __init__
    self.value = convert.toMemorySize(value)
  File "/home/sahar/gem5/src/python/m5/util/", line 250, in toMemorySize
    return long(value[:-1])
ValueError: invalid literal for long() with base 10: '16K'
Error setting param L1Cache.size to 16KB

Can anybody help me out with this ?
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Question on L2 Cache Configurations


I've been working with Gem5 full-system with MESI_CMP_Directory and I just wanted to verify a few configuration parameters. Based on the documentation on the website, I see that --num-l2caches creates a shared L2 cache structure split among the number of cores (which equals the # of cores when using a Mesh with Garnet) and I was hoping to verify this is indeed true. Also, I looked through the source code to figure out the details behind l2_size; based on looking at,, and I believe the l2_size is per l2 cache slice. I.e. if we have 8 cores with 1024kB set as l2_size, then we'll have a total cache size of 8MB. Is this indeed the case?


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Hi! I have managed to connect DRAMsim2 to gem5 and I am trying to capture 
information about the requests that go to main memory. So for the execution 
time I see something is happening, however when I am going to the file 
produced by DRAMsim2 I get only nans and do not see any requests being 

Can someone help?

Having the Gem5 system without caches


I would like to configure the system I am running without any caches, all the 
request I want to be directed towards the main memory. Does anyone have any 
scripts or information on how to do that?

I ran the AtomicSimple case without specifying the --caches, but when I start 
telnet into the image I get the following:
Calibrating delay loop (skipped) preset value.. 3999.96 BogoMIPS 
CPU: L1 I Cache: 64K (64 bytes/line), D cache 64K (64 bytes/line)
CPU: L2 Cache: 1024K (64 bytes/line)
CPU1: M5 Simulator Fake M5 x86_64 CPU stepping 01

Can someone help?


Using GEM5 sim for instruction tracing replay.

Hi all,

I'm trying to use gem5 for replaying instruction trace from QEMU.

To be specific, I'm trying to get instruction trace from QEMU emulator, and I wanna put this trace into gem5 sim for replaying.

And, from the mailing list and wiki, I found some words and information about trafficgen module.

However, I cannot find more information to make trace with right format to fit with trafficgen.

So, if some of you have information about that, please let me know about that.



김 혁 중
성균관대학교 IT 융합학과 박사과정
임베디드 소프트웨어 연구실

Kim, Hyukjoong
Sungkyunkwan University
Ph.D Course in Computer Engineering, IT Convergence 
Embedded Software Lab.
phone : +82 10-9489-8974
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Valid thread ID assertion

Hi all,

Running the latest stable gem5, ghb and tagged prefetchers cause assertions to fail when uses as last level (L2) prefetchers with the classic memory model in FS Alpha:

gem5.opt: build/ALPHA_MESI_Two_Level/mem/request.hh:575: int Request::threadId() const: Assertion `privateFlags.isSet(VALID_THREAD_ID)' failed.

It's pretty consistent in that it fails in all of my benchmarks.

Is there an easy way to fix this?

  George M

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Ahmad Hassan via gem5-users | 19 Nov 10:27 2014

parsec vips with M5thread

Compiling VIPS with m5thread gives the following error:

/usr/lib/gcc/x86_64-linux-gnu/4.6/../../../x86_64-linux-gnu/libglib-2.0.a(gthread-posix.o): In function `g_cond_impl_new':
(.text+0x246): undefined reference to `pthread_condattr_setclock'

Is there any workaround to build VIPS using m5thread and run in syscall mode?

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Unable to find destination address

Hi all,

If I run this command using the last stable gem5 version:

./build/ALPHA_MESI_Two_Level/gem5.opt configs/example/ --mem-size=2048MB --num-cpus=16 --cpu-clock=400MHz --ruby --caches --l2_size=256kB --num-l2caches=16 --num-dirs=16 --topology=Mesh --mesh-rows=4 --garnet-network=fixed --script=scripts/bodytrack/bodytrack_16c_simsmall.rcS

I get this output, with the fatal error:

info: Launching CPU 14 <at> 1465660500
info: Launching CPU 15 <at> 1484348000
warn: Prefetch instructions in Alpha do not do anything
warn: Prefetch instructions in Alpha do not do anything
fatal: Unable to find destination for addr 0x7ff000028 on bus system.iobus
  <at> tick 24311040
[findPort:build/ALPHA_MESI_Two_Level/mem/, line 353]
Memory Usage: 24311040 KBytes

Any suggestions? I the same way, I can't check through the svg or pdf config file, where is the L2_Cache_Controller. It is OK at and it is configured properly to Something wrong in the stable version?

Thank you!
Matheus A. Souza
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Re: x86 SE mode kvm support?

Hi Mike,

There are some patches ready to be committed for this to work.
I expect them to be committed by the end of this week.

Best regards,
---------- Forwarded message ----------

From: Mike Upton via gem5-users <gem5-users <at>>
Date: Mon, Nov 17, 2014 at 3:15 PM
Subject: [gem5-users] x86 SE mode kvm support?
To: "gem5-users <at>" <gem5-users <at>>


How do I do a gem5 run in SE with KVM enabled?

I tried:


./build/X86/gem5.opt configs/example/ –c <hello_world_path/hello> --cpu-type=kvm


I get an error :


Can’t resolve proxy ‘any’ of type ‘KvmVM’ from ‘system.cpu’

Looking in, I think I have the right type setting…


I see a few other folks have asked the same question, but I could not find an answer.








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