Performance change after changeset 10338

Hi,

After updating to changeset 10338 (condition code registers for ARM), I observed some (relatively significant) performance improvement. On a particular workload which I usually check when I update gem5, the execution time improves by 9%. It seems like the perf improvement is caused by having more registers as FullRegisterEvents goes down by 25%, which makes sense. While I understand that introducing CC registers could improve performance, I did not expect adding half a dozen CC registers could have such a huge perf impact. Any thoughts?

ARM, SE, O3 4-way, 128 int registers

Thanks,
Amin
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Fulya via gem5-users | 18 Sep 23:50 2014

Re: System Hangs

Hi Ivan,
I am having the same problem with running X86 FS with PARSEC, multicore, detailed cpu and classic memory
model. I have been using the same linux-2.6.22 kernel (which i configured to run with up to 64 CPUs). I have
been getting “bad page” errors after switching to detailed cpu posted below:
….
[HOOKS] Entering ROI
Bad page state in process 'blackscholes'
page:ffffffff80721d68 flags:0x0000000000000000 mapping:000000baffffffff mapcount:1 count:0
Trying to fix it up, but a reboot is needed
Backtrace:

Call Trace:
 [<ffffffff8025d28d>] bad_page+0x5d/0x90
 [<ffffffff8025dcdb>] get_page_from_freelist+0x41b/0x430
 [<ffffffff8025dd81>] __alloc_pages+0x91/0x350
 [<ffffffff8025e074>] get_zeroed_page+0x34/0x70
 [<ffffffff80267558>] __pte_alloc+0x28/0x100
 [<ffffffff80268239>] __handle_mm_fault+0xc09/0xcd0
 [<ffffffff8026c32e>] vma_adjust+0x13e/0x500
 [<ffffffff805be58f>] do_page_fault+0x1af/0x900
 [<ffffffff8026dbac>] do_mmap_pgoff+0x71c/0xab0
 [<ffffffff80378c21>] __up_write+0x21/0x140
 [<ffffffff805bc8bd>] error_exit+0x0/0x84

Unable to handle kernel paging request at 926cee92209ab000 RIP: 
 [<ffffffff8037b092>] clear_page+0x12/0x40
PGD 0
…..

Could you share with me the linux patch you got from Jiuyue Ma and walk me through how you applied the patch briefly?
If my problem is instead related to the "unimplemented x86 atomics in the classic memory hierarchy”, how
can I run X86 FS with multicore, detailed cpu and ruby model? Do you know of a configuration (protocol,
simple cpu type, detailed cpu type to use, whether to use fast forwarding or checkpointing etc.) that
works with a given gem5 stable version?
Best,
Fulya
sanem.arslan via gem5-users | 18 Sep 13:48 2014

thread migration

Hello, I am working on migrating application threads from one core to another on gem5. I have implemented a pseudo-instruction to trigger thread migration. When an application thread calls this pseudo-instruction, I want to migrate the thread to another cpu. My problem is that I cannot migrate application threads from simulator side by using pthread library. So I need to migrate all thread context in simulator side. According to this presentation on gem5 web site, I should use drain, switchOut, takeOverFrom and resume functions of gem5. However I do not know how to use them inside the pseudo-instruction. If you have studied on this issue before, could you please inform me about how to migrate threads step by step from simuator side? I put the codes inside my pseudo-instruction. Without using drainResume() function, the system hangs. With using drainResume() function, it gives cpu status error. void my_func(ThreadContext *tc) { BaseCPU *oldcpu = tc->getCpuPtr(); System *sys = tc->getSystemPtr(); ThreadContext *other_tc = sys->threadContexts[0]; //migrate from calling cpu to cpu0. BaseCPU *newcpu = other_tc->getCpuPtr(); oldcpu->drain(NULL); oldcpu->switchOut(); tc->suspend(); other_tc->takeOverFrom(tc); //timing cpu does not have resume function, instead it has drainResume() function. //newcpu->drainResume(); } Thank you in advance for your time and help. Best Regards, Sanem
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Chao Zhang via gem5-users | 17 Sep 16:45 2014

How to get a shared L1 cache

Hi all,

I’m working on ruby memory system. And I want to share a L1 cache for 2 cpu in ruby cache system with MESI two
level protocol. How to config it? Which part should I work on? Thanks!

Chao.

Running Assembly code on ARM SE mode

Hi all

Is it possible to write my own assembly code containing around 10-15 instructions and run it on gem5 without converting it into a binary with header and footer code?

Thanks in advance.

V Vanchinathan
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assertion failure in DirectoryMemory when running x86-ruby-fs-8GB mem

Sorry I forgot to put subject...

Hi,

I am using the latest stable version for x86+ruby+FS. I encountered the same assertion failure as the following email (posted in May) when I increased the memory size to 8GB. Could you please give me any suggestions? 

Thanks,
Yingying


====================================
HI everybody:

am also facing the assertaion error which is described by

Panagiotis Grivas.? Also, I want to increase the mem-size to 8GB in the (ruby+FS+ALPHA+) what is required to do that. I tried by using (ruby+FS+X86) to increase the memory size to 8GB (using the gem5 development version) unfortunately there was assertaion error at the kernel booting in the file?src/mem/ruby/system/DirectoryMemory.cc

AbstractEntry*
DirectoryMemory::lookup(PhysAddress address)
{
??? assert(isPresent(address));
??? DPRINTF(RubyCache, "Looking up address: %s\n", address);

??? if (m_use_map) {
??????? return m_sparseMemory->lookup(address);
??? }
else
{
??????? uint64_t idx = mapAddressToLocalIdx(address);
??????? assert(idx < m_num_entries); ===============================================================>Here the error
??????? return m_entries[idx];
??? }
}



I use the follwing command line:

./build/X86/gem5.opt blackscholes? configs/example/ruby_fs.py -n 16 --num-dirs=16 --topology=Mesh --mesh-rows=4 --caches --l2cache --num-l2caches=16 --l1d_size=32kB --l1i_size=32kB --l2_size=256kB --l1d_assoc=4 --l1i_assoc=4 --l2_assoc=8 --cpu-clock=3GHz --mem-size=8GB --disk-image=x86root-parsec.img --kernel=x86_64-vmlinux-2.6.28.4-smp --script=small_sim/runscript_blackscholes.rcs? -s 5100000000000


Thank you in advanced
Tareq

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(no subject)

Hi,

I am using the latest stable version for x86+ruby+FS. I encountered the same assertion failure as the following email (posted in May) when I increased the memory size to 8GB. Could you please give me any suggestions? 

Thanks,
Yingying

====================================
HI everybody:

am also facing the assertaion error which is described by

Panagiotis Grivas.? Also, I want to increase the mem-size to 8GB in the (ruby+FS+ALPHA+) what is required to do that. I tried by using (ruby+FS+X86) to increase the memory size to 8GB (using the gem5 development version) unfortunately there was assertaion error at the kernel booting in the file?src/mem/ruby/system/DirectoryMemory.cc

AbstractEntry*
DirectoryMemory::lookup(PhysAddress address)
{
??? assert(isPresent(address));
??? DPRINTF(RubyCache, "Looking up address: %s\n", address);

??? if (m_use_map) {
??????? return m_sparseMemory->lookup(address);
??? }
else
{
??????? uint64_t idx = mapAddressToLocalIdx(address);
??????? assert(idx < m_num_entries); ===============================================================>Here the error
??????? return m_entries[idx];
??? }
}



I use the follwing command line:

./build/X86/gem5.opt blackscholes? configs/example/ruby_fs.py -n 16 --num-dirs=16 --topology=Mesh --mesh-rows=4 --caches --l2cache --num-l2caches=16 --l1d_size=32kB --l1i_size=32kB --l2_size=256kB --l1d_assoc=4 --l1i_assoc=4 --l2_assoc=8 --cpu-clock=3GHz --mem-size=8GB --disk-image=x86root-parsec.img --kernel=x86_64-vmlinux-2.6.28.4-smp --script=small_sim/runscript_blackscholes.rcs? -s 5100000000000


Thank you in advanced
Tareq
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Casting Message to RubyRequest

Hello,

I try to cast a MessagePtr into a RubyRequest Pointer, but it won't work.
Does somebody know why?

The RubyRequest is created in the Network-Tester. Maybe the Message passed to the NetworkInterface is not this original RubyRequest? But if so, where is it converted?

This:
RubyRequest *new_ruby_request_ptr = safe_cast<RubyRequest *>(msg_ptr.get());

Fails with:
gem5.debug: build/ARM/base/cast.hh:49: T safe_cast(U) [with T = RubyRequest*; U = Message*]: Assertion `ret' failed.


Best regards,
Fabian Weber
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Use CommMonitor to capture L1/L2 cache bandwidth

Hi Andreas,

I would like to use the commMonitor to capture/trace the bandwidth for
cache memory using periodic dumping. I actually never used the
commMonitor in gem5. Could you point out to me how can I insert a
CommMonitor, for example between to only capture the bandwidth (for
instance for L2) in a simple way, please ?

I am using the last version of gem5-stable.

Thanks for your time

--

-- 
Cordialement / Best Regards

SENNI Sophiane
Ph.D. candidate - Microelectronics
LIRMM - www.lirmm.fr

[gem5] not able to find domainConfig() object to enable DVFS

Hi,

I am using a script mentioned in www.it.uu.se/katalog/vassp447/gem5_dvfs.pdf%20 to use dvfs for x86.
However, I am getting an error that says that DomainConfig is not defined. 
I checked in the source directory and I couldn't find this object anywhere.
Below is the output that I am getting


command line: ./build/X86/gem5.opt configs/example/dvfs.py -c tests/test-progs/hello/bin/x86/linux/hello

Traceback (most recent call last):

  File "<string>", line 1, in <module>

  File "/home/rahuls/gem5-stable-0e86fac7254c/src/python/m5/main.py", line 388, in main

    exec filecode in scope

  File "configs/example/dvfs.py", line 6, in <module>

clk_dom_config = DomainConfig(clk_domain = clk_dom, freq_op_points = ['1.7GHz', '1.2GHz', '0.7GHz', '0.2GHz'], voltage_op_points = ['1.28V', '1.08V', '0.96V', '0.93V'], domain_id = 0, transition_latency = '100us')

NameError: name 'DomainConfig' is not defined 



Has anyone used DVFS in gem5. Could you please let me know if I am missing something


Regards
Rahul

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how to use dvfs in gem5

Hi,

Could you please direct me to the documentation of compiling and using dvfs with GEM5. 
Also, could you please let me know if dvfs support is enabled for all architectures


Regards
Rahul
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Gmane