Universal Boot Loader general discussion ()

sbedara edara | 1 Jan 2007 04:02

U-boot-1.1.4 cache issue on MPIS24KE

Hi,

I have been trying to port u-boot-1.1.4 on to MIPS 24KE processor.

It runs fine if i run u-boot in uncache area.

If i try to run in cache area( before calling relocation() in the board_init_f () ,i change CFG_SDRAM address to 0x80000000 instead of 0xa0000000).

The u-boot hangs when it comes to relocation function.

Please note that i am using the cache routines in the cpu/mips/cache.S file to initilize/invalidate and lock the cache.

Could please guide me what could be the problem.

Can i use the cache routines available in cpu/mips/cache.S to initilize the caches during the boot up process for MIPS24KE?

Has anybody tried to use the same cache routines to initilize the cache for MIPS24KE processor?.

Thanks in advance.

Regards,

Sathesh

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sbedara edara | 1 Jan 2007 04:04

U-boot-1.1.4 cache issue on MIPS24KE

Hi,

I have been trying to port u-boot-1.1.4 on to MIPS 24KE processor.

It runs fine if i run u-boot in uncache area.

If i try to run in cache area( before calling relocation() in the board_init_f () ,i change CFG_SDRAM address to 0x80000000 instead of 0xa0000000).

The u-boot hangs when it comes to relocation function.

Please note that i am using the cache routines in the cpu/mips/cache.S file to initilize/invalidate and lock the cache.

Could please guide me what could be the problem.

Can i use the cache routines available in cpu/mips/cache.S to initilize the caches during the boot up process for MIPS24KE?

Has anybody tried to use the same cache routines to initilize the cache for MIPS24KE processor?.

Thanks in advance.

Regards,

sedara

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sbedara edara | 1 Jan 2007 04:05

U-boot-1.1.4 cache issue on MIPS24KE

Hi,

I have been trying to port u-boot-1.1.4 on to MIPS 24KE processor.

It runs fine if i run u-boot in uncache area.

If i try to run in cache area( before calling relocation() in the board_init_f () ,i change CFG_SDRAM address to 0x80000000 instead of 0xa0000000).

The u-boot hangs when it comes to relocation function.

Please note that i am using the cache routines in the cpu/mips/cache.S file to initilize/invalidate and lock the cache.

Could please guide me what could be the problem.

Can i use the cache routines available in cpu/mips/cache.S to initilize the caches during the boot up process for MIPS24KE?

Has anybody tried to use the same cache routines to initilize the cache for MIPS24KE processor?.

Thanks in advance.

Regards,

sedara

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Michal Simek | 1 Jan 2007 21:32

Re: u-boot port for MicroBlaze

Hi,
yes.
Now, U-BOOT supports the Suzaku development board from AtmarkTechno.
And I ported U-BOOT to the ML401 and the XUPV2P but Wolfgang didn't accept 
my patch because I had some problems with indentations.

If you want to port U-BOOT to your board, you can download my development 
version of U-BOOT from my page -  section download- U-BOOT. (www.monstr.eu )

Michal Simek

----- Original Message ----- 
From: "Leonid" <Leonid <at> a-k-a.net>
To: <u-boot-users <at> lists.sourceforge.net>
Sent: Wednesday, December 27, 2006 4:31 AM
Subject: [U-Boot-Users] u-boot port for MicroBlaze

> Does MicroBlaze u-boot port actually work on any Xilinx board? Which
> one? From Xilinx boards I only saw ML300 on u-boot tree and that one is
> PPC405 based.
>
> I am bringing up uClinux on Spartan-2e based custom board (similar to
> ML401) need bootloader and would appreciate any information how to port
> u-boot there.
>
> Thanks,
>
> Leonid.
>
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> _______________________________________________
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>
>
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> Version: 7.5.432 / Virus Database: 268.16.2/613 - Release Date: 1.1.2007 
> 14:50
>
> 

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Sangmoon Kim | 2 Jan 2007 09:24

(no subject)

Hi,

This patch fixes kvme080 board compiling error and enables the board in
MAKEALL file.

Best Regards,
Sangmoon Kim

Signed-off-by: Sangmoon Kim <dogoil <at> etinsys.com>

diff --git a/MAKEALL b/MAKEALL
index d2159ef..d95be12 100755
--- a/MAKEALL
+++ b/MAKEALL
 <at>  <at>  -106,7 +106,7  <at>  <at>  ########################################
 LIST_824x="	\
 	A3000		barco		BMW		CPC45		\
 	CU824		debris		eXalion		HIDDEN_DRAGON	\
-			MOUSSE		MUSENKI		MVBLUE		\
+	kvme080		MOUSSE		MUSENKI		MVBLUE		\
 	OXC		PN62		Sandpoint8240	Sandpoint8245	\
 	sbc8240		SL8245		utx8245				\
 "
diff --git a/board/etin/kvme080/u-boot.lds b/board/etin/kvme080/u-boot.lds
index dda3687..13b38b2 100644
--- a/board/etin/kvme080/u-boot.lds
+++ b/board/etin/kvme080/u-boot.lds
 <at>  <at>  -67,6 +67,8  <at>  <at>  SECTIONS
     . = ALIGN(16);
     *(.rodata)
     *(.rodata1)
+    *(.rodata.str1.4)
+    *(.eh_frame)
   }
   .fini      : { *(.fini)    } =0
   .ctors     : { *(.ctors)   }
 <at>  <at>  -99,10 +101,12  <at>  <at>  SECTIONS
   _edata  =  .;
   PROVIDE (edata = .);

+  . = .;
   __u_boot_cmd_start = .;
   .u_boot_cmd : { *(.u_boot_cmd) }
   __u_boot_cmd_end = .;

+  . = .;
   __start___ex_table = .;
   __ex_table : { *(__ex_table) }
   __stop___ex_table = .;

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Sachin Rane | 2 Jan 2007 09:25

purpose of calling 'cache_post_dinvalidate' before writing

Hi,

I just want to know the purpose of calling ‘invalidate’ (cache_post_dinvalidate) command before writing cached area in file ‘cache_8xx.S’.

The code snippet is appended for reference.

Regards,

Sachin Rane

cache_post_test1:

mflr r0

stw r0, 4(r1)

stwu r3, -4(r1)

stwu r4, -4(r1)

bl cache_post_dwb

bl cache_post_dinvalidate

/* Write the negative pattern to the test area */

lwz r0, 0(r1)

mtctr r0

li r0, 0xff

lwz r3, 4(r1)

subi r3, r3, 1

1:

stbu r0, 1(r3)

bdnz 1b

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Sangmoon Kim | 2 Jan 2007 09:42

[PATCH] Fix kvme080 board compiling error

Hi,

Sorry, I forgot to fill the subject field. So I resend it.

This patch fixes kvme080 board compiling error and enables the board in
MAKEALL file.

Best Regards,
Sangmoon Kim

Signed-off-by: Sangmoon Kim <dogoil <at> etinsys.com>

diff --git a/MAKEALL b/MAKEALL
index d2159ef..d95be12 100755
--- a/MAKEALL
+++ b/MAKEALL
 <at>  <at>  -106,7 +106,7  <at>  <at>  ########################################
 LIST_824x="	\
 	A3000		barco		BMW		CPC45		\
 	CU824		debris		eXalion		HIDDEN_DRAGON	\
-			MOUSSE		MUSENKI		MVBLUE		\
+	kvme080		MOUSSE		MUSENKI		MVBLUE		\
 	OXC		PN62		Sandpoint8240	Sandpoint8245	\
 	sbc8240		SL8245		utx8245				\
 "
diff --git a/board/etin/kvme080/u-boot.lds b/board/etin/kvme080/u-boot.lds
index dda3687..13b38b2 100644
--- a/board/etin/kvme080/u-boot.lds
+++ b/board/etin/kvme080/u-boot.lds
 <at>  <at>  -67,6 +67,8  <at>  <at>  SECTIONS
     . = ALIGN(16);
     *(.rodata)
     *(.rodata1)
+    *(.rodata.str1.4)
+    *(.eh_frame)
   }
   .fini      : { *(.fini)    } =0
   .ctors     : { *(.ctors)   }
 <at>  <at>  -99,10 +101,12  <at>  <at>  SECTIONS
   _edata  =  .;
   PROVIDE (edata = .);

+  . = .;
   __u_boot_cmd_start = .;
   .u_boot_cmd : { *(.u_boot_cmd) }
   __u_boot_cmd_end = .;

+  . = .;
   __start___ex_table = .;
   __ex_table : { *(__ex_table) }
   __stop___ex_table = .;

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Sachin Rane | 2 Jan 2007 14:28

Docs on ppc440 cache manipulation

Hi,

I am looking for a document which gives more focus on the PPC440GX cache operation.

I have been using ppc440GX Users Manual but some of the terms are not clear like ‘cache Index’ or how to disable L1 cache.

Regards,

Sachin Rane

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Brandon Clarke | 2 Jan 2007 22:37

Fw: cpu POST hang

----- Original Message ----

From: Andy Fleming <afleming <at> gmail.com>
To: Brandon Clarke <bmclarke2001 <at> yahoo.com>
Sent: Sunday, December 31, 2006 1:18:47 PM
Subject: Re: [U-Boot-Users] cpu POST hang

> The first argument to the function is in r3.  It's the code you want
> to execute.  Rather, it's a pointer to a function which executes that
> code.  This instruction is used to branch to that function with op1
> and op2 as arguments.  By commenting it out, you have circumvented the
> function entirely, and written op1 to *res.

> If you are hanging, it is because code is not set properly,

Beyond setting the CFG_POST_CPU flag in uboot I was unaware of other code modifications that needed to be made. I was kind of curious as to how general cpu post code could be created. Does the cpu post code not support particular processors? Can you elaborate on this further?

> or points to a function that never terminates.

cpu_post_exec_12 is the function that is being called (in the cpu_post_test_cmp function) and it's testing the "cmp" function of the cpu. The code pointer (*code) contains this data:

unsigned long code[] =
        {
            ASM_2C(test->cmd, test->cr, 3, 4),
            ASM_MFCR(3),
            ASM_BLR
        };

test->cmd = OP_CMPW=0x7c000000 (which is the opcode for a cmp according to BookE)
test->cr=2=which is the register that will contain the result of the compare.

and 3, and 4 which are the registers (r3 and r4) which are supposed to contain the data to be compared.

Since the rest of the POST runs without a problem and, since the other cpu functions being tested also have an ASM_MFCR and an ASM_BLR function, I thought that the code causing the system to hang could be found in the ASM_2C definition. In calculating the numbers for ASM_2C (opcode+res...etc.) the code looks like it should function fine. Since this is the code that is supposed to be executed at the hanging branch I'm kind of confussed as to why it won't work. Can anyone point me to other possibilities for this hang?

Thanks,

Brandon

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mitsy | 3 Jan 2007 00:01

u-boot size and boot issue

Hello list,

I have mips board (au1550) and I'm having issues booting the board on
its own when the u-boot size gets larger than 256k. It will boot fine
when it's connected to BDI.

What am I doing wrong? I've been trying to figure out where I need to
make a change to support u-boot with larger size since as long as the
size if smaller than 256k, it works just fine.

Any suggestion will be greatly appreciated.

Thank you so much for your help.

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