Wolfgang Denk | 1 Aug 2004 19:52
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Re: [patch] definition of PCMBCR

In message <20040723083001.GB22240 <at> smtp.barco.com> you wrote:
> 
> In response to the messages from this week, a re-submission of the patch
> that defines the PCI/Memory Buffer Configuration Register

Thanks, added.

[But the CHANGELOG entry was missing again!]

Best regards,
Viele Grüße,
Wolfgang Denk

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Bus error -- driver executed.

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Wolfgang Denk | 1 Aug 2004 19:55
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Re: [patch] corrected comments in cpu_init

In message <20040723083209.GC22240 <at> smtp.barco.com> you wrote:
> 
> The comments in the cpu_init file (concerning the PCI memory accesses)
> are corrected (the PPC is _slave_ instead of _master_). In our case, the
> DSP is the _master_ and read/writes to the PPC memory over PCI.

Added, thanks.

But:

* Please provide a CHANGELOG entry netx time!
* Don't add trailing white space!

Best regards,

Wolfgang Denk

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You Don't Have To Be 'Damned' To Work Here, But It Helps!!!
                                             - Terry Pratchett, _Eric_


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Wolfgang Denk | 2 Aug 2004 00:35
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Re: [PATCH] Generic Support for Motorola i.MX architecture

Dear Sasha,

in message <20040628120334.GA27672 <at> herry.saufen> you wrote:
> 
> I removed the trailing white spaces, dos line endings, etc from the
> patch. Ming-Len Wu sent me a patch for mx1ads boards, which I included
> into the patch. I can't test mx1ads support, but he says it works.
> 
> You can download the patch here:
> 
> http://www.pengutronix.de/software/u-boot/u-boot-imx1-20040628-1.diff

Added, thanks.

I understand that this patch obsoletes all your previous patches,
i. e. the following messages:

06/17 Sascha Hauer       [U-Boot-Users] [PATCH] Motorola i.MX support (1/2)<<--HlL+5n6rz5pIUxb
06/17 Sascha Hauer       [U-Boot-Users] [PATCH] Motorola i.MX support (2/2)<<--cmJC7u66zC7hs+8
06/18 Sascha Hauer       Re: [U-Boot-Users] [PATCH] Motorola i.MX support (1/2)<<I've just had
06/19 Robert Schwebel    Re: [U-Boot-Users] [PATCH] Motorola i.MX support (1/2)<<Hi, On Fri, J
06/19 Sascha Hauer       Re: [U-Boot-Users] [PATCH] Motorola i.MX support (1/2)<<On Sat, Jun 1
06/21 Robert Schwebel    Re: [U-Boot-Users] [PATCH] Motorola i.MX support (1/2)<<--SO98HVl1bnM
06/21 Steven Scholz      Re: [U-Boot-Users] [PATCH] Motorola i.MX support (1/2)<<Robert Schweb
06/21 Robert Schwebel    Re: [U-Boot-Users] [PATCH] Motorola i.MX support (1/2)<<On Mon, Jun 2

Please confirm.

Technical problems:

(Continue reading)

Wolfgang Denk | 2 Aug 2004 00:45
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Re: New NAND code

In message <007d01c46b59$d7ebc230$0212000a <at> PCSTEFAN> you wrote:
> 
> I was just wondering about state of the NAND code. When I remember
> correctly a pretty big rewrite was done but not commited yet. Is the
> last patch sent to this list from Pantelis Antoniou on 5th May still the
> latest version?

Did anybody actually test this rewrite extensively? I don't  remember
any feedback?

Best regards,

Wolfgang Denk

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days.                                     - Daniel Boone (Attributed)

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Wolfgang Denk | 2 Aug 2004 01:08
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Re: [PATCH] MPC85XXADS-20040716.patch for TLB/DDR

In message <1090004761.21477.43.camel <at> blarg.somerset.sps.mot.com> you wrote:
> 
> * Patch by Jon Loeliger, 16-Jul-2004:
>   Fixes for the MPC8540ADS, MPC8560ADS, and stxgp3 boards:
>     * Includes Dan Malek's mods of my mods for large DDR on STXGP3 
>     * Updated OR3 to only use 1M, not 16M, for CADMUS. Thanks York!
>     * Made MPC8540/8560ADS be 33Mhz PCI by default.
>     * Incorporated Tom Armistead's spd_sdram patches for picosecond
>       resolution, banksize calculations, and dynamic DDR sizing.
>     * Better TLB and LAWBAR size determination.
>     * Reworked the TLB setup to support up to 2G DDR.
>     * DDR setup without SPD_EEPROM is not fully supported.
>     * Removed moldy CONFIG_RAM_AS_FLASH, CFG_FLASH_PORT_WIDTH_16
>       and CONFIG_L2_INIT_RAM options.
>     * Refactor Local Bus initialization out of SDRAM setup.
>     * Re-implement new version of LBC11/DDR11 errata workarounds.
>     * Moved board specific PCI init parts out of CPU directory.
>     * Added TLB entry for PCI-1 IO Memory
>     * Updated README.mpc85xxads

Added, thanks.

Best regards,

Wolfgang Denk

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A well-written program is its own heaven; a poorly-written program is
(Continue reading)

Wolfgang Denk | 2 Aug 2004 01:14
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Re: Patch for Cogent CSB336 (3)

In message <6.0.1.1.0.20040729130736.02bd3bd8 <at> 192.168.2.1> you wrote:
> Here http://www.dave-tech.it/download/misc/sw/csb336/up-csb336-3 it is 
> available for download the latest patch for the Cogent CSB336. It has been 
> tested with Linux 2.6.7. SDRAM clock settings are still conservative.

After checking in some previous patches, you patch does not apply any
more. Do you think you can provide an update?

Best regards,

Wolfgang Denk

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The joys of love made her human and the  agonies  of  love  destroyed
her.
	-- Spock, "Requiem for Methuselah", stardate 5842.8

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Wolfgang Denk | 2 Aug 2004 02:01
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Re: Question About New Board Support

In message <1090254334.10357.53.camel <at> blarg.somerset.sps.mot.com> you wrote:
>
> > > I am proposing introducing the board/mpc85xx directory,
> > 
> > Rejected.
> 
> Uh, ok?

Definitely rejected.

> > > initially with support for my two new processors (and board),
> > 
> > Processor support does not belong into the board directory.
> 
> I think you misunderstood me.  The processor support itself
> is still in the 85xx directory already.  These are specific
> boards being introduced using the 85xx family of processors.

Either the code is board specific, and belongs to a board  directory,
or  it  is generic for many boards using the same CPU, then it is CPU
specific and belongs to the cpu directory.

> Ultimately, much of this may actually boil down to a refactoring
> of the so-called config file for the 5 85[46]0 ADS boards, and
> the new ones that I need to release.  In my opinion, the shared
> parts need to be factored out of all of these config .h files
> into one common .h file for the family.

I don't see a need for this.

(Continue reading)

llandre | 2 Aug 2004 09:50
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Re: Patch for Cogent CSB336 (3)

Hi Wolfgang,

> > Here http://www.dave-tech.it/download/misc/sw/csb336/up-csb336-3 it is
> > available for download the latest patch for the Cogent CSB336. It has been
> > tested with Linux 2.6.7. SDRAM clock settings are still conservative.
>
>After checking in some previous patches, you patch does not apply any
>more. Do you think you can provide an update?

the latest patch (the 3rd) provides just few changes respect to the 2nd one:
- board init invokes SetAsynchMode();
- bi_arch_number has been updated with the master database hosted at 
http://www.arm.linux.org.uk/developer/machines/
- fixed PCDR clock settings for TFT LCD panel Sharp LQ050Q5DR01
- copy of ramdisk from Flash to RAM before booting Linux kernel (we chose 
to not patch the kernel 2.6 basically for tight schedule constraints)

Regards,

llandre

DAVE Electronics System House - R&D Department
www.dave-tech.it 

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Stefan Roese | 2 Aug 2004 10:17

RE: New NAND code

Hello!

> > I was just wondering about state of the NAND code. When I remember
> > correctly a pretty big rewrite was done but not commited yet. Is the
> > last patch sent to this list from Pantelis Antoniou on 5th 
> May still the
> > latest version?
> 
> Did anybody actually test this rewrite extensively? I don't  remember
> any feedback?

I just searched the archieve:
Dave Ellis gave a feedback (3rd May) for an earlier version of the
rewritten code. And Wolfgang Denk mentioned on 7th June that the code
doesn't compile (for the PPChameleon Board).

Right now the patch from 5th May doesn't even apply to the current CVS.

Pantelis or Dave, could you give us any info about the status of the
code? Are you still using your patch? Is there a newer version that
applies to the current CVS? I am willing to do some testing...

Best regards,
Stefan

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Wolfgang Denk | 2 Aug 2004 10:22
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Re: Patch for Cogent CSB336 (3)

Dear Andrea,

in message <6.0.1.1.0.20040802092442.02c40c90 <at> 192.168.2.1> you wrote:
> 
> >After checking in some previous patches, you patch does not apply any
> >more. Do you think you can provide an update?
> 
> the latest patch (the 3rd) provides just few changes respect to the 2nd one:
> - board init invokes SetAsynchMode();
> - bi_arch_number has been updated with the master database hosted at 
> http://www.arm.linux.org.uk/developer/machines/
> - fixed PCDR clock settings for TFT LCD panel Sharp LQ050Q5DR01

Well, it would definitely help if you followed the  instructions  for
submitting  patches  as given in the README (read: I will reject this
patch until you do).

Problems:

* There is no CHANGELOG entry nor any description what the patch does
  or why.

* There is no description that there is more than just one patch;  in
  your  posting  you wrote "download the latest patch" - how should I
  know if the "-3" suffix indicates a version or a sequence number?

* Even if I try to apply the two other patches  (which  you  did  not
  mention in your posting) it does not work. An I wrote: the code has
  changed  a  lot  -  there  is  for  example  no  such  directory as
  cpu/mc9328/ 
(Continue reading)


Gmane