headers
Rob Herring | 22 May 2013 00:44
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[PATCH 1/7] ahci: use ports implemented map instead of num_ports

From: Richard Gibbs <richard.gibbs <at> calxeda.com>

The AHCI driver was incorrectly using the Capabilities register NP (number
of ports) field to determine which ports to activate. This commit changes
it to correctly use the PORTS_IMPL register as a port map.

Signed-off-by: Richard Gibbs <richard.gibbs <at> calxeda.com>
---
 drivers/block/ahci.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/drivers/block/ahci.c b/drivers/block/ahci.c
index cab7f8c..b89be06 100644
--- a/drivers/block/ahci.c
+++ b/drivers/block/ahci.c
 <at>  <at>  -136,6 +136,7  <at>  <at>  static int ahci_host_init(struct ahci_probe_ent *probe_ent)
 	u32 tmp, cap_save, cmd;
 	int i, j;
 	volatile u8 *port_mmio;
+	u32 port_map;

 	debug("ahci_host_init: start\n");

 <at>  <at>  -177,6 +178,7  <at>  <at>  static int ahci_host_init(struct ahci_probe_ent *probe_ent)
 #endif
 	probe_ent->cap = readl(mmio + HOST_CAP);
 	probe_ent->port_map = readl(mmio + HOST_PORTS_IMPL);
+	port_map = probe_ent->port_map;
 	probe_ent->n_ports = (probe_ent->cap & 0x1f) + 1;
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headers
Stephen Warren | 21 May 2013 22:25

[PATCH 1/3] mmc: report capacity for the selected partition

From: Stephen Warren <swarren <at> nvidia.com>

Enhance the MMC core to calculate the size of each MMC partition, and
update mmc->capacity whenever a partition is selected. This causes:

mmc dev 0 1 ; mmcinfo

... to report the size of the currently selected partition, rather than
always reporting the size of the user partition.

Signed-off-by: Stephen Warren <swarren <at> nvidia.com>
---
 drivers/mmc/mmc.c |   68 +++++++++++++++++++++++++++++++++++++++++++++++------
 include/mmc.h     |    7 ++++++
 2 files changed, 68 insertions(+), 7 deletions(-)

diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c
index f65a7b0..abeff35 100644
--- a/drivers/mmc/mmc.c
+++ b/drivers/mmc/mmc.c
 <at>  <at>  -678,16 +678,49  <at>  <at>  static int mmc_change_freq(struct mmc *mmc)
 	return 0;
 }

+static int mmc_set_capacity(struct mmc *mmc, int part_num)
+{
+	switch (part_num) {
+	case 0:
+		mmc->capacity = mmc->capacity_user;
+		break;
(Continue reading)

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headers
davewellz-wurk@yahoo.co.uk | 21 May 2013 22:11
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MPC834x U-Boot problem

Hi,

I am trying to get U-Boot to work on hardware very similar to the SBC8347 dev board. The main differences are:

            SBC8347:    My HW:
/CS0        8M Flash    64M Flash
/CS1        8K EEPROM   128M SDRAM
/CS[2:3]    128M SDRAM  
MCS[0:1]    256M DDR    1G DDR

And the significant changes in start.S (for reference):
#define CONFIG_SYS_TEXT_BASE      0xF8000000
#define CONFIG_SYS_FLASH_BASE     0xF8000000
#define CONFIG_SYS_FLASH_SIZE     64
#define CONFIG_SYS_INIT_RAM_ADDR  0xF6000000

I am not setting up any registers using the HW probe, just relying on the HRCW's and debugging in ROM.

So far the code executes ok through start.S up to the call to cpu_init_f() in cpu_init.c where it crashes in
the call to memset(), gd=0xF6000F50. CONFIG_SYS_INIT_RAM_ADDR = 0xF6000000. Perhaps the
stack-in-cache trick isn't working, or should some RAM be initialised by this point? I don't see where
this would have been done though.

Has anyone got any experience with the SBC8347/9 board or anything similar, or is able to provide any
suggestions please?

I realise this is old-ish hardware but it's what I'm working with. Any help would be much appreciated.

Regards,
David Wells.
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headers
Fabio Estevam | 21 May 2013 19:32
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[PATCH 1/9] wandboard: Return error if the SDHC port index is invalid

When the SDHC port number index is invalid we should return an error code 
immediately.

Currently we return 'status', which has a value of zero, causing  
board_mmc_init() to incorrectly return sucess.

Fix this by returning -EINVAL instead.

Signed-off-by: Fabio Estevam <fabio.estevam <at> freescale.com>
---
 board/wandboard/wandboard.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/board/wandboard/wandboard.c b/board/wandboard/wandboard.c
index bb98352..70e070c 100644
--- a/board/wandboard/wandboard.c
+++ b/board/wandboard/wandboard.c
 <at>  <at>  -164,7 +164,7  <at>  <at>  int board_mmc_init(bd_t *bis)
 			printf("Warning: you configured more USDHC controllers"
 			       "(%d) then supported by the board (%d)\n",
 			       index + 1, CONFIG_SYS_FSL_USDHC_NUM);
-			return status;
+			return -EINVAL;
 		}

 		status |= fsl_esdhc_initialize(bis, &usdhc_cfg[index]);
--

-- 
1.8.1.2
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headers
Albert ARIBAUD | 21 May 2013 18:45
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Re: ARM v7: Flush icache when executing a program with go

Hi Kees,

On Tue, 21 May 2013 14:38:01 +0200, Kees Jongenburger
<kees.jongenburger <at> gmail.com> wrote:

> To my
> understanding also enabling d-cache on ARM has no effect as long as
> the MMU is not turned on so I totally miss the point.

Enabling dcache gives DDR access performance benefits regardless of
enabling MMU.

> Greetings

Amicalement,
--

-- 
Albert.
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headers
Piotr Wilczek | 21 May 2013 15:39

[PATCH] arm:exynos:gpio: fix s5p_gpio_part_max for exynos4x12

This patch fix wrong value returned by 's5p_gpio_part_max' function
for Exynos4412.

Signed-off-by: Piotr Wilczek <p.wilczek <at> samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park <at> samsung.com>
CC: Minkyu Kang <mk7.kang <at> samsung.com>
---
 arch/arm/include/asm/arch-exynos/gpio.h |   17 +++++++++++++----
 1 file changed, 13 insertions(+), 4 deletions(-)

diff --git a/arch/arm/include/asm/arch-exynos/gpio.h b/arch/arm/include/asm/arch-exynos/gpio.h
index cfe1024..20a4e3f 100644
--- a/arch/arm/include/asm/arch-exynos/gpio.h
+++ b/arch/arm/include/asm/arch-exynos/gpio.h
 <at>  <at>  -303,10 +303,19  <at>  <at>  static inline unsigned int s5p_gpio_part_max(int nr)
 			return EXYNOS5_GPIO_PART2_MAX;

 	} else if (cpu_is_exynos4()) {
-		if (nr < EXYNOS4_GPIO_PART1_MAX)
-			return 0;
-		else
-			return EXYNOS4_GPIO_PART1_MAX;
+		if (proid_is_exynos4412()) {
+			if (nr < EXYNOS4X12_GPIO_PART1_MAX)
+				return 0;
+			else if (nr < EXYNOS4X12_GPIO_PART2_MAX)
+				return EXYNOS4X12_GPIO_PART1_MAX;
+			else
+				return EXYNOS4X12_GPIO_PART2_MAX;
+		} else {
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headers
Piotr Wilczek | 21 May 2013 15:00

[PATCH] drivers:power:max77693: add support for new multi function pmic max77693

This patch add support for new multi function pmic max77693.
The driver is split into three modules: pmic, muic and fuelgage.

Signed-off-by: Piotr Wilczek <p.wilczek <at> samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park <at> samsung.com>
CC: Minkyu Kang <mk7.kang <at> samsung.com>
---
 Makefile                          |    1 +
 drivers/power/mfd/Makefile        |   49 +++++++++++++
 drivers/power/mfd/fg_max77693.c   |  143 +++++++++++++++++++++++++++++++++++++
 drivers/power/mfd/muic_max77693.c |   91 +++++++++++++++++++++++
 drivers/power/mfd/pmic_max77693.c |  110 ++++++++++++++++++++++++++++
 include/power/max77693_fg.h       |   65 +++++++++++++++++
 include/power/max77693_muic.h     |   90 +++++++++++++++++++++++
 include/power/max77693_pmic.h     |   56 +++++++++++++++
 8 files changed, 605 insertions(+)
 create mode 100644 drivers/power/mfd/Makefile
 create mode 100644 drivers/power/mfd/fg_max77693.c
 create mode 100644 drivers/power/mfd/muic_max77693.c
 create mode 100644 drivers/power/mfd/pmic_max77693.c
 create mode 100644 include/power/max77693_fg.h
 create mode 100644 include/power/max77693_muic.h
 create mode 100644 include/power/max77693_pmic.h

diff --git a/Makefile b/Makefile
index c52f0f1..ea2cc11 100644
--- a/Makefile
+++ b/Makefile
 <at>  <at>  -298,6 +298,7  <at>  <at>  LIBS-y += drivers/pci/libpci.o
 LIBS-y += drivers/pcmcia/libpcmcia.o
(Continue reading)

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headers
Piotr Wilczek | 21 May 2013 14:54

[PATCH V2] drivers:power:max77686: add function to set voltage and mode

This patch add new functions to pmic max77686 to set voltage and mode.

Signed-off-by: Piotr Wilczek <p.wilczek <at> samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park <at> samsung.com>
CC: Minkyu Kang <mk7.kang <at> samsung.com>
CC: Rajeshwari Shinde <rajeshwari.s <at> samsung.com>

Acked-by: Rajeshwari Shinde <rajeshwari.s <at> samsung.com>
---
Changes in v2:
- changed printf to debug

 drivers/power/pmic/pmic_max77686.c |  186 ++++++++++++++++++++++++++++++++++++
 include/power/max77686_pmic.h      |   11 +++
 2 files changed, 197 insertions(+)

diff --git a/drivers/power/pmic/pmic_max77686.c b/drivers/power/pmic/pmic_max77686.c
index 7fcb4c0..dabd6b6 100644
--- a/drivers/power/pmic/pmic_max77686.c
+++ b/drivers/power/pmic/pmic_max77686.c
 <at>  <at>  -30,6 +30,192  <at>  <at> 

 DECLARE_GLOBAL_DATA_PTR;

+static const char max77686_buck_addr[] = {
+	0xff, 0x10, 0x12, 0x1c, 0x26, 0x30, 0x32, 0x34, 0x36, 0x38
+};
+
+static unsigned int max77686_ldo_volt2hex(int ldo, ulong uV)
+{
(Continue reading)

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headers
Rajeshwari Birje | 21 May 2013 14:54
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Issue in DWMMC in mainline

Hi All,

I use the DWMMC driver in u-boot mainline on exynos board and face the
following issue.

I do a mmc rescan 3 times, then fourth time I get a DATA ERROR, which
is due to FIFO underun/overun, after which I don't even get Command
done interrupt.
Later on the mmcinfo value also is displayed wrong.

Please do let me know if anybody have a solution for same.
--

-- 
Thanks and Regards,
Rajeshwari Shinde
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headers
Andreas Bießmann | 21 May 2013 11:59

[PULL] please pull u-boot-atmel/master

Dear Albert Aribaud,

please pull the following changes from u-boot-atmel/master into
u-boot-arm/master.

The following changes since commit d0a51373131c4ba565a2391d5ed78b87c406ce98:

  at91sam9260ek: move board id setup to config header (2013-05-12 16:49:14 +0200)

are available in the git repository at:

  git://git.denx.de/u-boot-atmel.git master

for you to fetch changes up to 5ba444f092ae9f68a0bd1f53956be2e69d26cf61:

  ARM: at91: add NAND partition table and index (2013-05-21 11:54:21 +0200)

----------------------------------------------------------------
Bo Shen (6):
      ARM: at91: add Atmel sama5d3 SoC new pmc register
      USB: ohci-at91: support sama5d3x devices
      ARM: atmel: add sama5d3xek support
      ARM: at91: fix and update README.at91 document
      ARM: at91: add at91sam9x5 and sama5d3x information
      ARM: at91: add NAND partition table and index

 MAINTAINERS                                  |    1 +
 arch/arm/cpu/armv7/at91/Makefile             |   52 +++++
 arch/arm/cpu/armv7/at91/clock.c              |  125 ++++++++++++
 arch/arm/cpu/armv7/at91/cpu.c                |   90 +++++++++
(Continue reading)

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headers
Alison Wang | 21 May 2013 11:02
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[PATCH v3 0/6] arm: mvf600: Add Freescale Vybrid MVF600 CPU and MVF600TWR board support

This series contain the support for Freescale Vybrid MVF600 CPU and MVF600TWR board.

Vybird devices are built on an asymmetrical-multiprocessing architecture
using ARM cores. The families in the Vybrid portfolio span entry-level,
single core Cortex-A class SoCs all the way to dual heterogeneous core SoCs
with multiple communication and connectivity options.

Part of the Vybrid platform, MVF600 is a dual-core eMPU combining the ARM
Cortex A5 and Cortex M4 cores.

MVF600 shares some IPs with i.MX family, such as FEC,ESDHC,WATCHDOG,I2C,ASRC and ESAI.
MVF600 also shares some IPs with ColdFire family, such as eDMA and DSPI.
MVF600 still has its own IPs, such as PIT,SAI,UART,QSPI and DCU.

More documents for this soc can be found at:
http://www.freescale.com/webapp/sps/site/prod_summary.jsp?code=VF6xx&fsrch=1&sr=5
http://www.freescale.com/webapp/sps/site/homepage.jsp?code=VYBRID

The u-boot runs on Cortex A5 core.

Changes in v3:
- Rename the common functions and enums
- Move the structure definitions to imx-regs.h
- Define PAD_CTL_PUE with PKE enabled
- Remove the changes for FEC_RCNTRL_RGMII / FEC_RCNTRL_RMII / FEC_RCNTRL_MII_MODE
bits, as they are already set in fec_reg_setup()
- Replace BOOT_FROM by BOOT_OFFSET
- Enable CONFIG_OF_LIBFDT option
- Add useful define instead of raw number
- Use clrsetbits_le32 to set the single bits
(Continue reading)

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Gmane